Dondee Navarro

18 papers C 1Journal 10Unranked 7
YearRankTypeTitle / Venue / Authors
2025 — conf
Physics-based Modeling to Extend a MOSFET Compact Model for Cryogenic Operation.
ASP-DAC
Dondee Navarro, Shin Taniguchi, Chika Tanaka, Kazutoshi Kobayashi, Takashi Sato, Michihiro Shintani
2021 J jnl
Simulation-Based Power-Loss Optimization of General-Purpose High-Voltage SiC MOSFET Circuit Under High-Frequency Operation.
IEEE Access
Abhishek Kar, Mitiko Miura-Mattausch, Mainak Sengupta, Dondee Navarro, Hideyuki Kikuchihara, Takahiro Iizuka, Hafizur Rahaman, Hans Jürgen Mattausch
2020 J jnl
Prediction of DC-AC Converter Efficiency Degradation due to Device Aging Using a Compact MOSFET-Aging Model.
IEICE Trans. Electron.
Kenshiro Sato, Dondee Navarro, Shinya Sekizaki, Yoshifumi Zoka, Naoto Yorino, Hans Jürgen Mattausch, Mitiko Miura-Mattausch
2019 — conf
Analysis of Embedded-Diode Performance in MOSFET under Switching Condition.
ISDCS
Takao Yamamoto, Yukiya Fukunaga, Daisaku Ikoma, Mitiko Miura-Mattausch, Dondee Navarro, Hans Jürgen Mattausch
2019 C conf
NVDL-Cache: Narrow-Width Value Aware Variable Delay Low-Power Data Cache.
ICCD
Nezam Rohbani, Tapas Kumar Maiti, Dondee Navarro, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Hirotaka Takatsuka
2019 J jnl
Power Reduction and BTI Mitigation of Data-Cache Memory Based on the Storage Management of Narrow-Width Values.
IEEE Trans. Very Large Scale Integr. Syst.
Nezam Rohbani, Hiroaki Gau, Sara Mohammadinejad, Tapas Kumar Maiti, Dondee Navarro, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Hirotaka Takatsuka
2019 J jnl
Prevention of Highly Power-Efficient Circuits due to Short-Channel Effects in MOSFETs.
IEICE Trans. Electron.
Arnab Mukhopadhyay, Tapas Kumar Maiti, Sandip Bhattacharya, Takahiro Iizuka, Hideyuki Kikuchihara, Mitiko Miura-Mattausch, Hafizur Rahaman, Sadayuki Yoshitomi, Dondee Navarro, Hans Jürgen Mattausch
2018 — conf
Compact Modeling for Power Efficient Circuit Design.
ESSDERC
Mitiko Miura-Mattausch, Hideyuki Kikuchihara, Tahahiro Kajiwara, Yuta Tanimoto, Atsushi Saito, Takahiro Iizuka, Dondee Navarro, Hans Jürgen Mattausch
2018 J jnl
Compact modeling of dynamic trap density evolution for predicting circuit-performance aging.
Microelectron. Reliab.
Mitiko Miura-Mattausch, Hidenori Miyamoto, Hideyuki Kikuchihara, Tapas K. Maiti, Nezam Rohbani, Dondee Navarro, Hans Jürgen Mattausch
2018 — conf
Self-controlled walking robot with gyro sensor network for stable movement on non-smooth surfaces.
SIMPAR
Sunandan Dutta, Tapas K. Maiti, Yoshihiro Ochi, Mitiko Miura-Mattausch, Sandip Bhattacharya, Dondee Navarro, Naoto Yorino, Hans Jürgen Mattausch
2017 — conf
Compact modeling approach for electro-mechanical system simulation.
ASICON
Tapas K. Maiti, Dondee Navarro, Mitiko Miura-Mattausch, Hans Jürgen Mattausch
2017 — conf
Modeling of dynamic trap density increase for aging simulation of any MOSFET circuits.
ESSDERC
Mitiko Miura-Mattausch, Hidenori Miyamoto, Hideyuki Kikuchihara, Dondee Navarro, Tapas K. Maiti, Nezam Rohbani, C. Ma, Hans Jürgen Mattausch, A. Schiffmann, Alexander Steinmair, Ehrenfried Seebacher
2009 J jnl
A GIDL-Current Model for Advanced MOSFET Technologies without Binning.
Inf. Media Technol.
Ryosuke Inagaki, Norio Sadachika, Dondee Navarro, Mitiko Miura-Mattausch, Yasuaki Inoue
2009 J jnl
A GIDL-Current Model for Advanced MOSFET Technologies without Binning.
IPSJ Trans. Syst. LSI Des. Methodol.
Ryosuke Inagaki, Norio Sadachika, Dondee Navarro, Mitiko Miura-Mattausch, Yasuaki Inoue
2008 J jnl
Non-quasi-static approach with surface-potential-based MOSFET model HiSIM for RF circuit simulations.
Math. Comput. Simul.
Tatsuya Ezaki, Dondee Navarro, Youichi Takeda, Norio Sadachika, Gaku Suzuki, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Tatsuya Ohguro, Takahiro Iizuka, Masahiko Taguchi, Shigetaka Kumashiro, Shunsuke Miyamoto
2007 J jnl
Shot Noise Modeling in Metal-Oxide-Semiconductor Field Effect Transistors under Sub-Threshold Condition.
IEICE Trans. Electron.
Yoshioki Isobe, Kiyohito Hara, Dondee Navarro, Youichi Takeda, Tatsuya Ezaki, Mitiko Miura-Mattausch
2005 J jnl
A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential.
IEICE Trans. Electron.
Dondee Navarro, Takeshi Mizoguchi, Masami Suetake, Kazuya Hisamitsu, Hiroaki Ueno, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama
2005 — conf
MOSFET harmonic distortion analysis up to the non-quasi-static frequency regime.
CICC
Youichi Takeda, Dondee Navarro, Shingo Chiba, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Tatsuya Ohguro, Takahiro Iizuka, Masahiko Taguchi, Shigetaka Kumashiro, Shunsuke Miyamoto