Donald Paterson

19 papers Journal 9Unranked 10
YearRankTypeTitle / Venue / Authors
2024 — conf
22.2 A 700MHZ-BW -164dBFS/Hz-Small-Signal-NSD 703mW Continuous-Time Pipelined ADC with On-Chip Digital Reconstruction Achieving 3 using Digital Cancellation of DAC Errors.
ISSCC
Sharvil Patil, Asha Ganesan, Hajime Shibata, Victor Kozlov, Gerry Taylor, Qingnan Yu, Zhao Li, Zeynep Lulec, Konstantinos Vasilakopoulos, Prawal Shrestha, Donald Paterson, Raviteja Theertham, Aseer Chowdhury
2024 J jnl
A -90-dBFS-IM
IEEE J. Solid State Circuits
Sharvil Patil, Asha Ganesan, Hajime Shibata, Victor Kozlov, Gerry Taylor, Prawal Shrestha, Zhao Li, Sevil Zeynep Lulec, Konstantinos Vasilakopoulos, Raviteja Theertham, Donald Paterson, Qingnan Yu, Aseer Chowdhury
2022 J jnl
Critical damages identification in a multi-level damage stability assessment framework for passenger ships.
Reliab. Eng. Syst. Saf.
Francesco Mauro, Dracos Vassalos, Donald Paterson
2020 — conf
16.6 An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter.
ISSCC
Hajime Shibata, Gerry Taylor, Bob Schell, Victor Kozlov, Sharvil Patil, Donald Paterson, Asha Ganesan, Yunzhi Dong, Wenhua Yang, Yue Yin, Zhao Li, Prawal Shrestha, Athreya Gopal, Aathreya S. Bhat, Shanthi Pavan
2018 — conf
Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS.
CICC
Yunzhi Dong, José B. Silva, Qingdong Meng, Jialin Zhao, Wenhua Yang, Trevor C. Caldwell, Hajime Shibata, Zhao Li, Donald Paterson, Jeffrey C. Gealow
2017 — conf
16.2 A 9GS/s 1GHz-BW oversampled continuous-time pipeline ADC achieving -161dBFS/Hz NSD.
ISSCC
Hajime Shibata, Victor Kozlov, Zexi Ji, Asha Ganesan, Haiyang Zhu, Donald Paterson
2017 — conf
16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology.
ISSCC
Siddharth Devarajan, Larry Singer, Dan Kelly, Steve Kosic, Tao Pan, José B. Silva, Janet Brunsilius, Daniel Rey-Losada, Frank Murden, Carroll Speir, Jeff Bray, Eric Otte, Nevena Rakuljic, Phil Brown, Todd Weigandt, Qicheng Yu, Donald Paterson, Corey Petersen, Jeffrey C. Gealow
2017 J jnl
A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology.
IEEE J. Solid State Circuits
Siddharth Devarajan, Larry Singer, Dan Kelly, Tao Pan, José B. Silva, Janet Brunsilius, Daniel Rey-Losada, Frank Murden, Carroll Speir, Jeff Bray, Eric Otte, Nevena Rakuljic, Phil Brown, Todd Weigandt, Qicheng Yu, Donald Paterson, Corey Petersen, Jeffrey C. Gealow, Gabriele Manganaro
2017 J jnl
A 9-GS/s 1.125-GHz BW Oversampling Continuous-Time Pipeline ADC Achieving -164-dBFS/Hz NSD.
IEEE J. Solid State Circuits
Hajime Shibata, Victor Kozlov, Zexi Ji, Asha Ganesan, Haiyang Zhu, Donald Paterson, Jialin Zhao, Sharvil Patil, Shanthi Pavan
2017 — conf
Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS.
CICC
Yunzhi Dong, José B. Silva, Qingdong Meng, Jialin Zhao, Wenhua Yang, Trevor C. Caldwell, Hajime Shibata, Zhao Li, Donald Paterson, Jeffrey C. Gealow
2016 — conf
15.5 A 930mW 69dB-DR 465MHz-BW CT 1-2 MASH ADC in 28nm CMOS.
ISSCC
Yunzhi Dong, Jialin Zhao, Wenhua Yang, Trevor C. Caldwell, Hajime Shibata, Richard Schreier, Qingdong Meng, José B. Silva, Donald Paterson, Jeffrey C. Gealow
2016 J jnl
A 72 dB-DR 465 MHz-BW Continuous-Time 1-2 MASH ADC in 28 nm CMOS.
IEEE J. Solid State Circuits
Yunzhi Dong, Jialin Zhao, Wenhua Yang, Trevor C. Caldwell, Hajime Shibata, Zhao Li, Richard Schreier, Qingdong Meng, José B. Silva, Donald Paterson, Jeffrey C. Gealow
2012 J jnl
A DC-to-1 GHz Tunable RF Delta Sigma ADC Achieving DR = 74 dB and BW = 150 MHz at f
IEEE J. Solid State Circuits
Hajime Shibata, Richard Schreier, Wenhua Yang, Ali Shaikh, Donald Paterson, Trevor C. Caldwell, David Alldred, Ping Wing Lai
2012 — conf
A DC-to-1GHz tunable RF ΔΣ ADC achieving DR = 74dB and BW = 150MHz at f0 = 450MHz using 550mW.
ISSCC
Hajime Shibata, Richard Schreier, Wenhua Yang, Ali Shaikh, Donald Paterson, Trevor C. Caldwell, David Alldred, Ping Wing Lai
2006 J jnl
A 375-mW Quadrature Bandpass$\Delta\Sigma$ADC With 8.5-MHz BW and 90-dB DR at 44 MHz.
IEEE J. Solid State Circuits
Richard Schreier, Nazmy Abaskharoun, Hajime Shibata, Donald Paterson, Steven Rose, Iuri Mehr, Qui Luu
2006 — conf
A 375mW Quadrature Bandpass ΔΣ ADC with 90dB DR and 8.5MHz BW at 44MHz.
ISSCC
Richard Schreier, Nazmy Abaskharoun, Hajime Shibata, Iuri Mehr, Steve Rose, Donald Paterson
2002 J jnl
A 10-300-MHz IF-digitizing IC with 90-105-dB dynamic range and 15-333-kHz bandwidth.
IEEE J. Solid State Circuits
Richard Schreier, Jennifer Lloyd, Larry Singer, Donald Paterson, Mike Timko, Michael Hensley, Greg Patterson, Kevin Behel, James Zhou
2002 J jnl
A 12-bit integrated analog front end for broadband wireline networks.
IEEE J. Solid State Circuits
Iuri Mehr, Prabir C. Maulik, Donald Paterson
2001 — conf
A 12-bit integrated analog front-end for broadband wireline networks.
CICC
Iuri Mehr, Prabir C. Maulik, Donald Paterson