Don E. Ross

15 papers A* 3A 1C 1Misc 7Journal 2Unranked 1
YearRankTypeTitle / Venue / Authors
2004 Misc conf
Memory BIST Using ESP.
VTS
Xiaogang Du, Sudhakar M. Reddy, Don E. Ross, Wu-Tung Cheng, Joseph Rayhawk
2000 A conf
Conversion of small functional test sets of nonscan blocks to scan patterns.
ITC
Don E. Ross, Tim Wood, Grady Giles
1995 J jnl
Built-in self test for C-testable ILA's.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Murali M. R. Gala, Don E. Ross, Karan L. Watson, Beena Vasudevan, Peter Utama
1995 Misc conf
Efficient variable ordering and partial representation algorithm.
VLSI Design
Jawahar Jain, Dinos Moundanos, James R. Bitner, Jacob A. Abraham, Donald S. Fussell, Don E. Ross
1994 Misc conf
Linear finite state machine for lD ILAs.
VTS
Murali M. R. Gala, Peter Utama, Don E. Ross, Karan L. Watson
1993 C conf
An Accurate Delay Model for BiCMOS Gates and Off-chip Drivers.
ISCAS
Sherif H. K. Embabi, R. Damodaran, R. Bhagwan, Don E. Ross
1993 Misc conf
LFSR based deterministic hardware for at-speed BIST.
VTS
Beena Vasudevan, Don E. Ross, Murali M. R. Gala, Karan L. Watson
1993 Misc conf
Signal probability calculations using partial functional manipulation.
VTS
Ravishankar Kodavarti, Don E. Ross
1993 Misc conf
Testability of one dimensional ILAs under multiple faults.
VTS
Murali M. R. Gala, Karan L. Watson, Don E. Ross
1992 A* conf
Functional Approaches to Generating Orderings for Efficient Symbolic Representations.
DAC
M. Ray Mercer, Rohit Kapur, Don E. Ross
1992 Misc conf
The roles of controllability and observability in design for test.
VTS
Kenneth M. Butler, Rohit Kapur, M. Ray Mercer, Don E. Ross
1991 J jnl
Exact ordered binary decision diagram size when representing classes of symmetric functions.
J. Electron. Test.
Don E. Ross, Kenneth M. Butler, M. Ray Mercer
1991 — conf
Fast functional evaluation of candidate OBDD variable orderings.
EURO-DAC
Don E. Ross, Kenneth M. Butler, Rohit Kapur, M. Ray Mercer
1991 A* conf
Heuristics to Compute Variable Orderings for Efficient Manipulation of Ordered Binary Decision Diagrams.
DAC
Kenneth M. Butler, Don E. Ross, Rohit Kapur, M. Ray Mercer
1988 A* conf
CATAPULT: Concurrent Automatic Testing Allowing Parallelization and Using Limited Topology.
DAC
Rhonda Kay Gaede, Don E. Ross, M. Ray Mercer, Kenneth M. Butler