Dominik Walter

15 papers A 1B 2C 3Journal 7Unranked 2
YearRankTypeTitle / Venue / Authors
2026 J jnl
Loop Control Management in Tightly Coupled Processor Arrays (TCPAs).
CoRR
Dominik Walter, Frank Hannig, Jürgen Teich
2025 A conf
Co-Design of Sustainable Embedded Systems-on-Chip.
DATE
Jan Spieck, Dominik Walter, Jan Waschkeit, Jürgen Teich
2025 — conf
Co-Design of Systems-On-Chip for Sustainability.
NG-RES@HiPEAC
Jan Spieck, Dominik Walter, Jan Waschkeit, Jürgen Teich
2025 J jnl
Evaluation of CGRA Toolchains.
CoRR
Dominik Walter, Marita Halm, Daniel Seidel, Indrayudh Ghosh, Christian Heidorn, Frank Hannig, Jürgen Teich
2025 J jnl
Mapping and Execution of Nested Loops on Processor Arrays: CGRAs vs. TCPAs.
CoRR
Dominik Walter, Marita Halm, Daniel Seidel, Indrayudh Ghosh, Christian Heidorn, Frank Hannig, Jürgen Teich
2024 J jnl
A Method to Correct the Temporal Drift of Single-Photon Detectors Based on Asynchronous Quantum Ghost Imaging.
Sensors
Carsten Pitsch, Dominik Walter, Leonardo Gasparini, Helge Bürsing, Marc Eichhorn
2024 C conf
ALPACA: An Accelerator Chip for Nested Loop Programs.
ISCAS
Dominik Walter, Marcel Brand, Christian Heidorn, Michael Witterauf, Frank Hannig, Jürgen Teich
2024 — conf
Analysis and Optimization of Block LU Decomposition for Execution on Tightly Coupled Processor Arrays.
ASAP
Dominik Walter, Thomas Adamtschuk, Frank Hannig, Jürgen Teich
2022 B conf
UavSim: An Open-Source Simulator for Multiple UAV Path Planning.
DCOSS
Kyle Thompson, Franz J. Kurfess, Dominik Walter, Roman Maksymiuk, Roey Mevorach, Gaurav Joshi
2022 J jnl
Using Multi-Dimensional Dynamic Time Warping to Identify Time-Varying Lead-Lag Relationships.
Sensors
Johannes Stübinger, Dominik Walter
2021 B conf
Hand Sign Recognition via Deep Learning on Tightly Coupled Processor Arrays.
FPL
Christian Heidorn, Dominik Walter, Yunus Emre Candir, Frank Hannig, Jürgen Teich
2021 C conf
LION: real-time I/O transfer control for massively parallel processor arrays.
MEMOCODE
Dominik Walter, Jürgen Teich
2021 J jnl
Symbolic Loop Compilation for Tightly Coupled Processor Arrays.
CoRR
Michael Witterauf, Dominik Walter, Frank Hannig, Jürgen Teich
2021 J jnl
Symbolic Loop Compilation for Tightly Coupled Processor Arrays.
ACM Trans. Embed. Comput. Syst.
Michael Witterauf, Dominik Walter, Frank Hannig, Jürgen Teich
2020 C conf
Real-time Scheduling of I/O Transfers for Massively Parallel Processor Arrays.
MEMOCODE
Dominik Walter, Michael Witterauf, Jürgen Teich