Dmitry Ponomarev

73 papers A* 12A 9B 11C 6Journal 15Unranked 19

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	CacheTrap: Injecting Trojans in LLMs without Leaving any Traces in Inputs or Weights. CoRR Mohaiminul Al Nahian, Abeer Matar A. Almalky, Gamana Aragonda, Ranyang Zhou, Sabbir Ahmed, Dmitry Ponomarev, Li Yang, Shaahin Angizi, Adnan Siraj Rakin
2025	A*	`conf`	Secure Caches for Compartmentalized Software. USENIX Security Symposium Kerem Arikan, Huaxin Tang, Williams Zhang Cen, Yu David Liu, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2024	A*	`conf`	TEE-SHirT: Scalable Leakage-Free Cache Hierarchies for TEEs. NDSS Kerem Arikan, Abraham Farrell, Williams Zhang Cen, Jack McMahon, Barry Williams, Yu David Liu, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2022	A*	`conf`	Composable Cachelets: Protecting Enclaves from Cache Side-Channel Attacks. USENIX Security Symposium Daniel Townley, Kerem Arikan, Yu David Liu, Dmitry Ponomarev, Oguz Ergin
2022	J	`jnl`	Efficient Hardware Malware Detectors That are Resilient to Adversarial Evasion. IEEE Trans. Computers Md. Shohidul Islam, Khaled N. Khasawneh, Nael B. Abu-Ghazaleh, Dmitry Ponomarev, Lei Yu
2021	B	`conf`	GVT-Guided Demand-Driven Scheduling in Parallel Discrete Event Simulation. ICPP Ali Eker, David Timmerman, Barry Williams, Kenneth Chiu, Dmitry Ponomarev
2021	—	`conf`	High-Performance PDES on Manycore Clusters. SIGSIM-PADS Barry Williams, Ali Eker, Kenneth Chiu, Dmitry Ponomarev
2021	—	`conf`	Load-Aware Dynamic Time Synchronization in Parallel Discrete Event Simulation. SIGSIM-PADS Ali Eker, Yehia Arafa, Abdel-Hameed A. Badawy, Nandakishore Santhi, Stephan J. Eidenbenz, Dmitry Ponomarev
2021	—	`conf`	Track Conventions, Not Attack Signatures: Fortifying X86 ABI and System Call Interfaces to Mitigate Code Reuse Attacks. SEED Sarp Özdemir, Rutvik Saptarshi, Aravind Prakash, Dmitry Ponomarev
2020	—	`conf`	Demand-Driven PDES: Exploiting Locality in Simulation Models. SIGSIM-PADS Ali Eker, Barry Williams, Kenneth Chiu, Dmitry Ponomarev
2020	J	`jnl`	EnsembleHMD: Accurate Hardware Malware Detectors with Specialized Ensemble Classifiers. IEEE Trans. Dependable Secur. Comput. Khaled N. Khasawneh, Meltem Ozsoy, Caleb Donovick, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2020	—	`conf`	Port or Shim? Stress Testing Application Performance on Intel SGX. IISWC Aisha Hasan, Ryan Riley, Dmitry Ponomarev
2019	B	`conf`	Controlled Asynchronous GVT: Accelerating Parallel Discrete Event Simulation on Many-Core Clusters. ICPP Ali Eker, Barry Williams, Kenneth Chiu, Dmitry Ponomarev
2019	—	`conf`	EA-PLRU: Enclave-Aware Cache Replacement. HASP@ISCA Atsuko Shimizu, Daniel Townley, Mohit Joshi, Dmitry Ponomarev
2019	A*	`conf`	LATCH: A Locality-Aware Taint CHecker. MICRO Daniel Townley, Khaled N. Khasawneh, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Lei Yu
2019	B	`conf`	SMT-COP: Defeating Side-Channel Attacks on Execution Units in SMT Processors. PACT Daniel Townley, Dmitry Ponomarev
2019	A*	`conf`	SafeSpec: Banishing the Spectre of a Meltdown with Leakage-Free Speculation. DAC Khaled N. Khasawneh, Esmaeil Mohammadian Koruyeh, Chengyu Song, Dmitry Evtyushkin, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
2018	A*	`conf`	BranchScope: A New Side-Channel Attack on Directional Branch Predictor. ASPLOS Dmitry Evtyushkin, Ryan Riley, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2018	J	`jnl`	Flexible Hardware-Managed Isolated Execution: Architecture, Software Support and Applications. IEEE Trans. Dependable Secur. Comput. Dmitry Evtyushkin, Jesse Elwell, Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Ryan Riley
2018	C	`conf`	Performance Implications of Global Virtual Time Algorithms on a Knights Landing Processor. DS-RT Ali Eker, Barry Williams, Nitesh Mishra, Dushyant Thakur, Kenneth Chiu, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
2018	J	`jnl`	SafeSpec: Banishing the Spectre of a Meltdown with Leakage-Free Speculation. CoRR Khaled N. Khasawneh, Esmaeil Mohammadian Koruyeh, Chengyu Song, Dmitry Evtyushkin, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
2017	A	`conf`	Hardening extended memory access control schemes with self-verified address spaces. ICCAD Jesse Elwell, Dmitry Evtyushkin, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Ryan Riley
2017	—	`conf`	Performance Characterization of Parallel Discrete Event Simulation on Knights Landing Processor. SIGSIM-PADS Barry Williams, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Philip A. Wilsey
2017	A*	`conf`	RHMD: evasion-resilient hardware malware detectors. MICRO Khaled N. Khasawneh, Nael B. Abu-Ghazaleh, Dmitry Ponomarev, Lei Yu
2016	J	`jnl`	Hardware-Based Malware Detection Using Low-Level Architectural Features. IEEE Trans. Computers Meltem Ozsoy, Khaled N. Khasawneh, Caleb Donovick, Iakov Gorelik, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2016	J	`jnl`	Understanding and Mitigating Covert Channels Through Branch Predictors. ACM Trans. Archit. Code Optim. Dmitry Evtyushkin, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
2014	A*	`conf`	A Non-Inclusive Memory Permissions architecture for protection against cross-layer attacks. HPCA Jesse Elwell, Ryan Riley, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2014	J	`jnl`	Efficiently Securing Systems from Code Reuse Attacks. IEEE Trans. Computers Mehmet Kayaalp, Meltem Ozsoy, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2014	J	`jnl`	Parallel Discrete Event Simulation for Multi-Core Systems: Analysis and Optimization. IEEE Trans. Parallel Distributed Syst. Jingjing Wang, Deepak Jagtap, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2014	J	`jnl`	SIFT: Low-Complexity Energy-Efficient Information Flow Tracking on SMT Processors. IEEE Trans. Computers Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Tameesh Suri
2013	—	`conf`	Can PDES scale in environments with heterogeneous delays? SIGSIM-PADS Jingjing Wang, Ketan Bahulkar, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
2013	—	`ch.`	Instruction Scheduling in Microprocessors. Automated Scheduling and Planning Gürhan Küçük, Isa Ahmet Güney, Dmitry Ponomarev
2013	—	`conf`	Interference resilient PDES on multi-core systems: towards proportional slowdown. SIGSIM-PADS Jingjing Wang, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2013	B	`conf`	PowerVisor: A Toolset for Visualizing Energy Consumption and Heat Dissipation Processes in Modern Processor Architectures. PaCT Alexey Baranov, Peter Panfilov, Dmitry Ponomarev
2013	A*	`conf`	SCRAP: Architecture for signature-based protection from Code Reuse Attacks. HPCA Mehmet Kayaalp, Timothy Schmitt, Junaid Nomani, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
2012	A*	`conf`	Branch regulation: Low-overhead protection from code reuse attacks. ISCA Mehmet Kayaalp, Meltem Ozsoy, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2012	J	`jnl`	Non-monopolizable caches: Low-complexity mitigation of cache side channel attacks. ACM Trans. Archit. Code Optim. Leonid Domnitser, Aamer Jaleel, Jason Loew, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2012	A	`conf`	Optimization of Parallel Discrete Event Simulator for Multi-core Systems. IPDPS Deepak Jagtap, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2012	—	`conf`	Tensor model of IMS network. ICUMT Dmitry Ponomarev
2011	B	`conf`	CacheVisor: A Toolset for Visualizing Shared Caches in Multicore and Multithreaded Processors. PaCT Dmitry Evtyushkin, Peter Panfilov, Dmitry Ponomarev
2011	—	`conf`	Mathematical limits of parallel computation for embedded systems. ASP-DAC Jason Loew, Jesse Elwell, Dmitry Ponomarev, Patrick H. Madden
2011	—	`conf`	SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors. Conf. Computing Frontiers Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Tameesh Suri
2011	A*	`conf`	TPM-SIM: a framework for performance evaluation of trusted platform modules. DAC Jared Schmitz, Jason Loew, Jesse Elwell, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
2010	—	`conf`	A Predictive Model for Cache-Based Side Channels in Multicore and Multithreaded Microprocessors. MMM-ACNS Leonid Domnitser, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2010	C	`conf`	A co-processor approach for accelerating data-structure intensive algorithms. ICCD Jason Loew, Jesse Elwell, Dmitry Ponomarev, Patrick H. Madden
2010	—	`conf`	Customized architectures for faster route finding in GPS-based navigation systems. SASP Jason Loew, Dmitry Ponomarev, Patrick H. Madden
2010	C	`conf`	Performance Evaluation of PDES on Multi-core Clusters. DS-RT Ketan Bahulkar, Nicole Hofmann, Deepak Jagtap, Nael B. Abu-Ghazaleh, Dmitry Ponomarev
2009	A	`conf`	Energy-efficient renaming with register versioning. ISLPED Hui Zeng, Ju-Young Jung, Kanad Ghose, Dmitry Ponomarev
2009	J	`jnl`	MPTLsim: a cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches. SIGARCH Comput. Archit. News Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry Ponomarev
2009	B	`conf`	Register Versioning: A Low-Complexity Implementation of Register Renaming in Out-of-Order Microarchitectures. ICPP Hui Zeng, Kanad Ghose, Dmitry Ponomarev
2008	C	`conf`	Aggressive Scheduling and Speculation in Multithreaded Architectures: Is it Worth its Salt? SBAC-PAD Jason Loew, Dmitry Ponomarev
2008	J	`jnl`	Selective Writeback: Reducing Register File Pressure and Energy Consumption. IEEE Trans. Very Large Scale Integr. Syst. Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
2008	B	`conf`	Two-Level Reorder Buffers: Accelerating Memory-Bound Applications on SMT Architectures. ICPP Jason Loew, Dmitry Ponomarev
2006	B	`conf`	Adaptive reorder buffers for SMT processors. PACT Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev
2006	B	`conf`	Address-Value Decoupling for Early Register Deallocation. ICPP Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Aneesh Aggarwal
2006	B	`conf`	Balancing ILP and TLP in SMT Architectures through Out-of-Order Instruction Dispatch. ICPP Joseph J. Sharkey, Dmitry Ponomarev
2006	J	`jnl`	Early Register Deallocation Mechanisms Using Checkpointed Register Files. IEEE Trans. Computers Oguz Ergin, Deniz Balkan, Dmitry Ponomarev, Kanad Ghose
2006	B	`conf`	SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency. PACT Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
2006	A	`conf`	Selective writeback: exploiting transient values for energy-efficiency and performance. ISLPED Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
2004	J	`jnl`	Complexity-Effective Reorder Buffer Designs for Superscalar Processors. IEEE Trans. Computers Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose
2004	—	`conf`	Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization. PACS Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin
2003	C	`conf`	Distributed Reorder Buffer Schemes for Low Power. ICCD Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose
2003	—	`conf`	Energy Efficient Register Renaming. PATMOS Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose
2003	A	`conf`	Power efficient comparators for long arguments in superscalar processors. ISLPED Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
2003	—	`conf`	Reducing Datapath Energy through the Isolation of Short-Lived Operands. IEEE PACT Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
2003	A	`conf`	Reducing reorder buffer complexity through selective operand caching. ISLPED Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose
2002	C	`conf`	A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors. ICCD Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev
2002	A	`conf`	AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors. DATE Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
2002	—	`conf`	Energy-Efficient Design of the Reorder Buffer. PATMOS Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
2002	A	`conf`	Low-complexity reorder buffer architecture. ICS Gurhan Kucuk, Dmitry Ponomarev, Kanad Ghose
2001	A	`conf`	Energy: efficient instruction dispatch buffer design for superscalar processors. ISLPED Gurhan Kucuk, Kanad Ghose, Dmitry Ponomarev, Peter M. Kogge
2001	—	`conf`	Optimal Polling for Latency-Throughput Tradeoffs in Queue-Based Network Interfaces for Clusters. Euro-Par Dmitry Ponomarev, Kanad Ghose, Evgeny Saksonov
2001	A*	`conf`	Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources. MICRO Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose