Djones Lettnin

36 papers A 5C 2Journal 8Unranked 21

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	HW/SW Formal Co-Verification of Rust-based Designs Using Hardware Abstraction Model. ISVLSI Sascha Neske, Bryan Olmos, Shuhang Zhang, Martin Kröning, Stefan Lankes, Wolfgang Kunz, Djones Lettnin
2025	—	`conf`	Hey AI, Generate Me a Hardware Code! Agentic AI-based Hardware Design & Verification. SBCCI Deepak Narayan Gadde, Keerthan Kopparam Radhakrishna, Vaisakh Naduvodi Viswambharan, Aman Kumar, Djones Lettnin, Wolfgang Kunz, Sebastian Simon
2025	J	`jnl`	Hey AI, Generate Me a Hardware Code! Agentic AI-based Hardware Design & Verification. CoRR Deepak Narayan Gadde, Keerthan Kopparam Radhakrishna, Vaisakh Naduvodi Viswambharan, Aman Kumar, Djones Lettnin, Wolfgang Kunz, Sebastian Simon
2025	—	`conf`	One Model, Multiple Verifications: A Framework for Holistic Security Assurance. SOCC Jaimini Nagar, Thorsten Dworzak, Sebastian Simon, Ulrich Heinkel, Djones Lettnin
2025	J	`jnl`	Saarthi: The First AI Formal Verification Engineer. CoRR Aman Kumar, Deepak Narayan Gadde, Keerthan Kopparam Radhakrishna, Djones Lettnin
2025	—	`conf`	Synthesis-Aware Area Optimization for Safety Registers in Automotive SoCs. ISVLSI Shuhang Zhang, Bryan Olmos, Wolfgang Kunz, Djones Lettnin
2024	C	`conf`	Adaptable FWHW Formal Co-Verification of SoC RISC-V Components. VLSI-SoC Paulette Iskandar, Bryan Olmos, Wolfgang Kunz, Djones Lettnin
2024	—	`conf`	Efficient Stimuli Generation using Reinforcement Learning in Design Verification. SMACD Deepak Narayan Gadde, Thomas Nalapat, Aman Kumar, Djones Lettnin, Wolfgang Kunz, Sebastian Simon
2024	J	`jnl`	Efficient Stimuli Generation using Reinforcement Learning in Design Verification. CoRR Deepak Narayan Gadde, Thomas Nalapat, Aman Kumar, Djones Lettnin, Wolfgang Kunz, Sebastian Simon
2024	C	`conf`	Exploring the Role of the Portable Stimulus Standard in Enhancing Security Property Verification. VLSI-SoC Jaimini Nagar, Thorsten Dworzak, Sebastian Simon, Ulrich Heinkel, Djones Lettnin
2024	J	`jnl`	FuzzWiz - Fuzzing Framework for Efficient Hardware Coverage. CoRR Deepak Narayan Gadde, Aman Kumar, Djones Lettnin, Sebastian Simon
2024	J	`jnl`	Improving Simulation Regression Efficiency using a Machine Learning-based Method in Design Verification. CoRR Deepak Narayan Gadde, Sebastian Simon, Djones Lettnin, Thomas Ziller
2024	J	`jnl`	Verifying Non-friendly Formal Verification Designs: Can We Start Earlier? CoRR Bryan Olmos, Daniel Gerl, Aman Kumar, Djones Lettnin
2018	—	`conf`	A Domain-specific Language for Automated Fault Injection in SystemC Models. ICECS Douglas Lohmann, Alexis Huf, Djones Lettnin, Frank Siqueira, José Luís Güntzel
2018	J	`jnl`	A Scalable Approach for Hardware Semiformal Verification. CoRR Tomás Grimm, Djones Lettnin, Michael Hübner
2018	—	`conf`	ARCHVerifyr: An Embedded Software-Driven Approach for Architecture Verification. ISVLSI Tomás Grimm, Djones Lettnin, Michael Hübner
2018	—	`conf`	Extending universal verification methodology with fault injection capabilities. LASCAS Douglas Lohmann, Fabrizio Maziero, Elço João dos Santos Jr, Djones Lettnin
2017	—	`conf`	Semiformal Verification of Software-Controlled Connections. ISVLSI Tomás Grimm, Djones Lettnin, Michael Hübner
2016	—	`conf`	A methodology for early functional verification of embedded software combining virtual platforms and bounded model checking. LATS Rogerio Paludo, Djones Lettnin
2016	—	`conf`	Automatic generation of RTL connectivity checkers from SystemC TLM and IP-XACT descriptions. NORCAS Tomás Grimm, Djones Lettnin, Michael Hübner
2015	J	`jnl`	Scalable and Optimized Hybrid Verification of Embedded Software. J. Electron. Test. Jörg Behrend, Djones Lettnin, Alexander Grünhage, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel
2014	—	`conf`	Optimized hybrid verification of embedded software. LATW Jörg Behrend, Alexander Grünhage, Douglas Schroeder, Djones Lettnin, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel
2013	—	`conf`	Automatic property generation for formal verification applied to HDL-based design of an on-board computer for space applications. LATW Wesley Silva, Eduardo Augusto Bezerra, Markus Winterholer, Djones Lettnin
2012	—	`conf`	Optimized Static Parameter Assignment for Semiformal Software Verification. MBMV Alexander Grünhage, Jörg Behrend, Patrick Heckeler, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Djones Lettnin
2011	—	`conf`	Hybrid verificatio of temporal properties in hardware dependent software. LATW Djones Lettnin, Wolfgang Rosenstiel
2011	—	`conf`	Scalable and Extendable Hybrid Verification Platform. MBMV Jörg Behrend, Patrick Heckeler, Stefan Huster, Djones Lettnin, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel
2011	A	`conf`	Scalable hybrid verification for embedded software. DATE Jörg Behrend, Djones Lettnin, Patrick Heckeler, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel
2010	A	`conf`	Simulation-based verification of the MOST NetInterface specification revision 3.0. DATE Andreas Braun, Oliver Bringmann, Djones Lettnin, Wolfgang Rosenstiel
2009	A	`conf`	Semiformal verification of temporal properties in automotive hardware dependent software. DATE Djones Lettnin, Pradeep Kumar Nalla, Jörg Behrend, Jürgen Ruf, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel, Volker Schönknecht, Stephan Reitemeyer
2008	A	`conf`	Verification of Temporal Properties in Automotive Embedded Software. DATE Djones Lettnin, Pradeep Kumar Nalla, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Tobias Kirsten, Volker Schönknecht, Stephan Reitemeyer
2007	—	`conf`	Coverage Driven Verification applied to Embedded Software. ISVLSI Djones Lettnin, Markus Winterholer, Axel G. Braun, Joachim Gerlach, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel
2007	—	`conf`	Semiformal Verification of Temporal Properties in Embedded Software. MBMV Djones Lettnin, Pradeep Kumar Nalla, Jürgen Ruf, Roland Weiss, Axel G. Braun, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel
2004	A	`conf`	Synthesis of Embedded SystemC Design: A Case Study of Digital Neural Networks. DATE Djones Lettnin, Axel G. Braun, Martin Bogdan, Joachim Gerlach, Wolfgang Rosenstiel
2003	—	`conf`	Automated Conversion of SystemC Fixed-Point Data Types. VLSI-SoC (Selected Papers) Axel G. Braun, Djones Lettnin, Joachim Gerlach, Wolfgang Rosenstiel
2002	—	`conf`	A New Learning Approach to Design Fault Tolerant ANNs: Finally a Zero HW-SW Overhead. Asian Test Symposium Fabian Vargas, Djones Lettnin, Diogo B. Brum, Dárcio Prestes
2002	—	`conf`	Electrocardiogram Pattern Recognition by Means of MLP Network and PCA: A Case Study on Equal Amount of Input Signal Types. SBRN Fabian Vargas, Maria Cristina Felippetto de Castro, Marcello Macarthy, Djones Lettnin