Dipankar Saha

15 papers A 1Misc 1Journal 5Unranked 8
YearRankTypeTitle / Venue / Authors
2024 J jnl
SPICE-PIDE: A Methodology for Design and Optimization of Integrated Circuits.
CoRR
Jehan Taraporewalla, Arun KP, Sugata Ghosh, Abhishek Agarwal, Bijaydoot Basak, Dipankar Saha
2021 — conf
Loss Reduction in a Grid-Connected Photovoltaic System Operated with P-&-O Algorithm based MPPT Control by introducing Diamond MOSFET.
ISDCS
Sudipta Mukherjee, Kasturi Saha, Dipankar Saha, Apurba Laha, Swaroop Ganguly
2021 — conf
Modeling of Thermal Properties of Semiconducting Monolayer MoSe2 and WSe2.
VDAT
Yuvam Bhateja, Joshua Roy Palathinkal, Tamajeet Mandal, Pronay Roy, Dipankar Saha
2019 J jnl
A Darbo fixed point theory approach towards the existence of a functional integral equation in a Banach algebra.
Appl. Math. Comput.
Mausumi Sen, Dipankar Saha, Ravi P. Agarwal
2018 — conf
Atomistic Analysis of Receptor Structure in Quantum Biomimetic Olfactory Sensor.
IEEE SENSORS
Swetapadma Sahoo, Nidhi Pandey, Dipankar Saha, Swaroop Ganguly
2018 Misc conf
New Asymmetric Atomistic Model for the Analysis of Phase-Engineered MoS2-Gold Top Contact.
VLSID
Richa Chakravarty, Dipankar Saha, Santanu Mahapatra
2013 J jnl
A Low-Voltage, Low-Power 4-bit BCD Adder, designed using the Clock Gated Power Gating, and the DVT Scheme.
CoRR
Dipankar Saha, Subhramita Basak, Sagar Mukherjee, Chandan Kumar Sarkar
2013 J jnl
Assessment of surface and subsurface waterlogging, water level fluctuations, and lithological variations for evaluating groundwater resources in Ganga Plains.
Int. J. Digit. Earth
Arvind Chandra Pandey, Suraj Kumar Singh, M. S. Nathawat, Dipankar Saha
2013 J jnl
Implementation of the Cluster Based Tunable Sleep Transistor Cell Power Gating Technique for a 4x4 Multiplier Circuit.
CoRR
Dipankar Saha, Subhramita Basak, Sagar Mukherjee, Sayan Chatterjee, Chandan Kumar Sarkar
2012 — conf
A 4-bit Asynchronous Binary Search ADC for Low Power, High Speed Applications.
ISED
Sagar Mukherjee, Dipankar Saha, Posiba Mostafa, Sayan Chatterjee, Chandan Kumar Sarkar
2012 — conf
Design and Analysis of a Robust, High Speed, Energy Efficient 18 Transistor 1-bit Full Adder Cell, Modified with the Concept of MVT Scheme.
ISED
Subhramita Basak, Dipankar Saha, Sagar Mukherjee, Sayan Chatterjee, Chandan Kumar Sarkar
2012 — conf
Implementation of a New Offset Generator Block for the Low-Voltage, Low-Power Self Biased Threshold Voltage Extractor Circuit.
VDAT
Rituparna Dasgupta, Dipankar Saha, Jagannath Samanta, Sayan Chatterjee, Chandan Kumar Sarkar
2011 — conf
SQL Injection Attack Mechanisms and Prevention Techniques.
ADCONS
Roshni Chandrashekhar, Manoj Mardithaya, P. Santhi Thilagam, Dipankar Saha
2009 — conf
Toward the Development of Cross-Platform Business Applications via Model-Driven Transformations.
SERVICES I
Rama Akkiraju, Tilak Mitra, Nilay Ghosh, Dipankar Saha, Usha Thulasiram, Soham Chakraborthy
2008 A conf
Toward the Development of Contextually Aware Business Applications via Model-Driven Transformations.
ICWS
Rama Akkiraju, Tilak Mitra, Pankaj Dhoolia, Wei Zhao, Shiwa Fu, Manisha Bhandar, Nilay Ghosh, Dipankar Saha