Dipanjan Sengupta

25 papers A* 1A 4B 1C 3Journal 6Unranked 9
YearRankTypeTitle / Venue / Authors
2020 J jnl
Procrustean Orthogonal Sparse Hashing.
CoRR
Mariano Tepper, Dipanjan Sengupta, Theodore L. Willke
2019 A conf
Deep Graph Similarity Learning for Brain Data Analysis.
CIKM
Guixiang Ma, Nesreen K. Ahmed, Theodore L. Willke, Dipanjan Sengupta, Michael W. Cole, Nicholas B. Turk-Browne, Philip S. Yu
2018 J jnl
NUMA-Caffe: NUMA-Aware Deep Learning Neural Networks.
ACM Trans. Archit. Code Optim.
Probir Roy, Shuaiwen Leon Song, Sriram Krishnamoorthy, Abhinav Vishnu, Dipanjan Sengupta, Xu Liu
2018 J jnl
Similarity Learning with Higher-Order Proximity for Brain Network Analysis.
CoRR
Guixiang Ma, Nesreen K. Ahmed, Theodore L. Willke, Dipanjan Sengupta, Michael W. Cole, Nicholas B. Turk-Browne, Philip S. Yu
2017 C conf
EvoGraph: On-the-Fly Efficient Mining of Evolving Graphs on GPU.
ISC
Dipanjan Sengupta, Shuaiwen Leon Song
2017 C conf
High-Performance Incremental SVM Learning on Intel
ISC
Dipanjan Sengupta, Yida Wang, Narayanan Sundaram, Theodore L. Willke
2016 — conf
GraphIn: An Online High Performance Incremental Graph Processing Framework.
Euro-Par
Dipanjan Sengupta, Narayanan Sundaram, Xia Zhu, Theodore L. Willke, Jeffrey S. Young, Matthew Wolf, Karsten Schwan
2016 — —
System design principles for heterogeneous resource management and scheduling in accelerator-based systems.
Dipanjan Sengupta
2015 B conf
A Framework for Emulating Non-Volatile Memory Systemswith Different Performance Characteristics.
ICPE
Dipanjan Sengupta, Qi Wang, Haris Volos, Ludmila Cherkasova, Jun Li, Guilherme Magalhaes, Karsten Schwan
2015 — conf
Constructing stability-based clock gating with hierarchical clustering.
PATMOS
Bao Le, Djordje Maksimovic, Dipanjan Sengupta, Erhan Ergin, Ryan Berryhill, Andreas G. Veneris
2015 — conf
GraphReduce: Large-Scale Graph Analytics on Accelerator-Based HPC Systems.
IPDPS Workshops
Dipanjan Sengupta, Kapil Agarwal, Shuaiwen Leon Song, Karsten Schwan
2015 A conf
GraphReduce: processing large-scale graphs on accelerator-based systems.
SC
Dipanjan Sengupta, Shuaiwen Leon Song, Kapil Agarwal, Karsten Schwan
2014 A conf
Scheduling Multi-tenant Cloud Workloads on Accelerator-Based Systems.
SC
Dipanjan Sengupta, Anshuman Goswami, Karsten Schwan, Krishna Pallavi
2013 C conf
Accelerating post silicon debug of deep electrical faults.
IOLTS
Bao Le, Dipanjan Sengupta, Andreas G. Veneris, Zissis Poulos
2013 A conf
Early detection of current hot spots in power gated designs.
ISLPED
Dipanjan Sengupta, Erhan Ergin, Andreas G. Veneris
2013 — conf
Multi-tenancy on GPGPU-based servers.
VTDC@HPDC
Dipanjan Sengupta, Raghavendra Belapure, Karsten Schwan
2013 — conf
Reviving erroneous stability-based clock-gating using partial Max-SAT.
ASP-DAC
Bao Le, Dipanjan Sengupta, Andreas G. Veneris
2012 — conf
Lazy suspect-set computation: fault diagnosis for deep electrical bugs.
ACM Great Lakes Symposium on VLSI
Dipanjan Sengupta, Flavio M. de Paula, Alan J. Hu, Andreas G. Veneris, André Ivanov
2012 J jnl
Multi-objective voltage island floorplanning using sequence pair representation.
Sustain. Comput. Informatics Syst.
Dipanjan Sengupta, Andreas G. Veneris, Steven J. E. Wilton, André Ivanov
2011 — conf
Sequence pair based voltage island floorplanning.
IGCC
Dipanjan Sengupta, Andreas G. Veneris, Steven J. E. Wilton, André Ivanov, Res Saleh
2009 J jnl
Application-Driven Voltage-Island Partitioning for Low-Power System-on-Chip Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dipanjan Sengupta, Resve A. Saleh
2008 A* conf
Application-driven floorplan-aware voltage island design.
DAC
Dipanjan Sengupta, Resve A. Saleh
2008 — conf
Supply voltage selection in Voltage Island based SoC design.
SoCC
Dipanjan Sengupta, Resve A. Saleh
2007 J jnl
Generalized Power-Delay Metrics in Deep Submicron CMOS Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dipanjan Sengupta, Resve A. Saleh
2005 — conf
Power-Delay Metrics Revisited for 90nm CMOS Technology.
ISQED
Dipanjan Sengupta, Resve A. Saleh