Dionysios I. Reisis

70 papers A* 1B 1C 4Journal 21Unranked 43

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Autonomously Reconfigurable Telemetry and Monitoring System for CubeSats. ISVLSI Christoforos Vasilakis, Alexandros Tsagkaropoulos, Angelos Motsios, Dionysios I. Reisis
2025	J	`jnl`	Combining Fault Tolerance Techniques and COTS SoC Accelerators for Payload Processing in Space. CoRR Vasileios Leon, Elissaios-Alexios Papatheofanous, George Lentaris, Charalampos Bezaitis, Nikolaos Mastorakis, Georgios Bampilis, Dionysios I. Reisis, Dimitrios Soudris
2025	J	`jnl`	FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks. CoRR Vasileios Leon, Charalampos Bezaitis, George Lentaris, Dimitrios Soudris, Dionysios I. Reisis, Elissaios-Alexios Papatheofanous, Angelos Kyriakos, Aubrey Dunne, Arne Samuelsson, David Steenari
2025	J	`jnl`	Improving the Fast Fourier Transform for Space and Edge Computing Applications with an Efficient In-Place Method. Softw. Christoforos Vasilakis, Alexandros Tsagkaropoulos, Ioannis Koutoulas, Dionysios I. Reisis
2025	B	`conf`	Nanosatellite Flight Software: A Rigorous Software Architecture Perspective. ECSA Christoforos Vasilakis, Alexandros Tsagkaropoulos, Angelos Motsios, Christos Tsigkanos, Dionysios I. Reisis
2025	—	`conf`	Reducing Onboard Power Consumption in CubeSats via Adaptive Telemetry and Monitoring. ACSOS-C Christoforos Vasilakis, Alexandros Tsagkaropoulos, Angelos Motsios, Panagiotis Karathanasis, Christos Tsigkanos, Dionysios I. Reisis
2023	J	`jnl`	Neural Network-Based Solar Irradiance Forecast for Edge Computing Devices. Inf. Georgios Venitourakis, Christoforos Vasilakis, Alexandros Tsagkaropoulos, Tzouma Amrou, George E. Konstantoulakis, Panagiotis Golemis, Dionysios I. Reisis
2022	C	`conf`	Combining Fault Tolerance Techniques and COTS SoC Accelerators for Payload Processing in Space. VLSI-SoC Vasileios Leon, Elissaios-Alexios Papatheofanous, George Lentaris, Charalampos Bezaitis, Nikolaos Mastorakis, Georgios Bampilis, Dionysios I. Reisis, Dimitrios Soudris
2022	—	`conf`	End-to-End Real-Time Service Provisioning over a SDN-controllable 60 GHz analog FiWi X-haul for 5G Hot-Spot Networks. OFC Christos Vagionas, Ronis T. Maximidis, Ioannis Stratakos, Aristotelis Margaris, Agapi Mesodiakaki, Marios Gatzianas, Konstantina Kanta, Panagiotis Toumasis, Giannis Giannoulis, Dimitrios Apostolopoulos, Elissaios-Alexios Papatheofanous, George Lentaris, Dionysios I. Reisis, Dimitrios Soudris, Kostas Tsagkaris, Nikolaos Argyris, Dimitris Syrivelis, Paraskevas Bakopoulos, R. M. Oldenbeuving, C. G. H. Roeloffzen, P. W. L. van Dijk, I. Dimogiannis, A. Kontogiannis, Hercules Avramopoulos, Amalia N. Miliou, Nikos Pleros, George Kalfas
2022	J	`jnl`	Live demonstration of an SDN-reconfigurable, FPGA-based TxRx for an analog-IFoF/mmWave radio access network in an MNO's infrastructure. JOCN Konstantina Kanta, Panagiotis Toumasis, Giannis Giannoulis, Ioannis Stratakos, George Lentaris, Elissaios-Alexios Papatheofanous, Ioanna Mesogiti, Eleni Theodoropoulou, Aristotelis Margaris, Dimitris Syrivelis, Evrydiki Kyriazi, Giorgos Brestas, Kostas Tokas, Nikolaos Argyris, Christos Vagionas, Ronis T. Maximidis, Paraskevas Bakopoulos, Agapi Mesodiakaki, Marios Gatzianas, George Kalfas, Kostas Tsagkaris, Nikos Pleros, Dionysios I. Reisis, George L. Lyberopoulos, Dimitrios Apostolopoulos, Dimitrios Soudris, Hercules Avramopoulos
2022	J	`jnl`	Resources and Power Efficient FPGA Accelerators for Real-Time Image Classification. J. Imaging Angelos Kyriakos, Elissaios-Alexios Papatheofanous, Charalampos Bezaitis, Dionysios I. Reisis
2022	C	`conf`	SoC FPGA Acceleration for Semantic Segmentation of Clouds in Satellite Images. VLSI-SoC Elissaios-Alexios Papatheofanous, Ph. Tziolos, V. Kalekis, Tzouma Amrou, George E. Konstantoulakis, Georgios Venitourakis, Dionysios I. Reisis
2021	—	`conf`	Demonstration of FPGA-based A-IFoF/mmWave transceiver integration in mobile infrastructure for beyond 5G transport. ECOC Panagiotis Toumasis, Konstantina Kanta, Kostas Tokas, Ioannis Stratakos, Elissaios-Alexios Papatheofanous, Giannis Giannoulis, Ioanna Mesogiti, Eleni Theodoropoulou, George L. Lyberopoulos, George Lentaris, Dimitrios Apostolopoulos, Dionysios I. Reisis, Dimitrios Soudris, Hercules Avramopoulos
2021	—	`conf`	FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks. ICECS Vasileios Leon, Charalampos Bezaitis, George Lentaris, Dimitrios Soudris, Dionysios I. Reisis, Elissaios-Alexios Papatheofanous, Angelos Kyriakos, Aubrey Dunne, Arne Samuelsson, David Steenari
2021	J	`jnl`	LDPC Hardware Acceleration in 5G Open Radio Access Network Platforms. IEEE Access Elissaios-Alexios Papatheofanous, Dionysios I. Reisis, Konstantinos Nikitopoulos
2021	—	`conf`	The LDPC Challenge in Software-Based 5G New Radio Physical Layer Processing. MeditCom Elissaios-Alexios Papatheofanous, Dionysios I. Reisis, Konstantinos Nikitopoulos
2021	—	`conf`	Towards sharing one FPGA SoC for both low-level PHY and high-level AI/ML computing at the edge. MeditCom Ioannis Stratakos, Elissaios-Alexios Papatheofanous, Dimitrios Danopoulos, George Lentaris, Dionysios I. Reisis, Dimitrios Soudris
2019	J	`jnl`	Acceleration techniques and evaluation on multi-core CPU, GPU and FPGA for image processing and super-resolution. J. Real Time Image Process. Georgios Georgis, George Lentaris, Dionysios I. Reisis
2019	—	`conf`	Design of a Real-Time DSP Engine on RF-SoC FPGA for 5G Networks. ONDM Vasileios Kitsakis, Konstantina Kanta, Ioannis Stratakos, Giannis Giannoulis, Dimitrios Apostolopoulos, George Lentaris, Hercules Avramopoulos, Dimitrios Soudris, Dionysios I. Reisis
2019	—	`conf`	High Performance Accelerator for CNN Applications. PATMOS Angelos Kyriakos, Vasileios Kitsakis, Alexandros Louropoulos, Elissaios-Alexios Papatheofanous, Ioannis Patronas, Dionysios I. Reisis
2018	J	`jnl`	NEPHELE: An End-to-End Scalable and Dynamically Reconfigurable Optical Architecture for Application-Aware SDN Cloud Data Centers. IEEE Commun. Mag. Paraskevas Bakopoulos, Konstantinos Christodoulopoulos, Giada Landi, Muzzamil Aziz, Eitan Zahavi, Domenico Gallico, Richard Pitwon, Konstantinos Tokas, Ioannis Patronas, Marco Capitani, Christos Spatharakis, Konstantinos Yiannopoulos, Kai Wang, Konstantinos Kontodimas, Ioannis Lazarou, Philipp Wieder, Dionysios I. Reisis, Emmanouel Manos Varvarigos, Matteo Biancani, Hercules Avramopoulos
2018	—	`conf`	NEPHELE: Vertical Integration and Real-Time Demonstration of an Optical Datacenter Network. ICTON Christos Spatharakis, Konstantinos Tokas, Ioannis Patronas, Paraskevas Bakopoulos, Dionysios I. Reisis, Hercules Avramopoulos
2018	J	`jnl`	Parallel Memory Accessing for FFT Architectures. J. Signal Process. Syst. Vasileios Kitsakis, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos
2018	—	`conf`	Parallel Robust Absolute Orientation on FPGA for Vision and Robotics. ICECS Nikolaos Dimou, Manolis I. A. Lourakis, George Lentaris, Dimitrios Soudris, Dionysios I. Reisis
2018	C	`conf`	Scheduler Accelerator for TDMA Data Centers. PDP Ioannis Patronas, Nikolaos Gkatzios, Vasileios Kitsakis, Dionysios I. Reisis, Konstantinos Christodoulopoulos, Emmanouel A. Varvarigos
2017	—	`conf`	SDN control framework with dynamic resource assignment for slotted optical datacenter networks. OFC Giada Landi, Ioannis Patronas, Kostas Kontodimas, Muzzamil Aziz, Kostas Christodoulopoulos, Angelos Kyriakos, Marco Capitani, Amirreza Fazely Hamedani, Dionysios I. Reisis, Emmanouel A. Varvarigos, Paraskevas Bakopoulos, Hercules Avramopoulos
2017	—	`conf`	Slotted TDMA and optically switched network for disaggregated datacenters. ICTON Konstantinos Tokas, Ioannis Patronas, Christos Spatharakis, Dionysios I. Reisis, Paraskevas Bakopoulos, Hercules Avramopoulos
2016	—	`conf`	A Co-Design Approach For Rapid Prototyping Of Image Processing On SoC FPGAs. PCI Ioannis Stratakos, Dionysios I. Reisis, George Lentaris, Konstantinos Maragos, Dimitrios Soudris
2016	—	`conf`	A scalable optically-switched datacenter network with multicasting. EuCNC Konstantinos Tokas, Christos Spatharakis, Ioannis Kanakis, Nikolaos Iliadis, Paraskevas Bakopoulos, Hercules Avramopoulos, Ioannis Patronas, Nikolaos Liakopoulos, Dionysios I. Reisis
2016	—	`conf`	Agora: Agent and market-based resource management for many-core systems. ICECS Themistoklis Melissaris, Iraklis Anagnostopoulos, Dimitrios Soudris, Dionysios I. Reisis
2016	J	`jnl`	Reduced Complexity Superresolution for Low-Bitrate Video Compression. IEEE Trans. Circuits Syst. Video Technol. Georgios Georgis, George Lentaris, Dionysios I. Reisis
2016	—	`conf`	Switching functions of a data center Top-of-Rack (ToR). ICECS Ioannis Patronas, Angelos Kyriakos, Dionysios I. Reisis
2015	—	`conf`	A configurable transmitter architecture & organization for XG-PON OLT/ONU/ONT network elements. ICECS Georgios Menoutis, Andreas Foteas, Nikolaos Liakopoulos, Georgios Georgis, Dionysios I. Reisis, George Synnefakis
2015	J	`jnl`	Exact Max-Log MAP Soft-Output Sphere Decoding via Approximate Schnorr-Euchner Enumeration. IEEE Trans. Veh. Technol. Konstantinos Nikitopoulos, Athanasios Karachalios, Dionysios I. Reisis
2015	—	`conf`	Towards real-time neuronal connectivity assessment: A scalable pipelined parallel generalized partial directed coherence engine. ICECS Georgios Georgis, Georgios Menoutis, Dionysios I. Reisis, Konstantinos S. Tsakalis, Ashfaque Bin Shafique
2014	—	`conf`	A MapReduce framework implementation for Network-on-Chip platforms. ICECS Konstantinos Gyftakis, Iraklis Anagnostopoulos, Dimitrios Soudris, Dionysios I. Reisis
2014	—	`conf`	Neuronal connectivity assessment for epileptic seizure prevention: Parallelizing the generalized partial directed coherence on many-core platforms. ICSAMOS Georgios Georgis, Dionysios I. Reisis, Panagiotis Skordilakis, Konstantinos S. Tsakalis, Ashfaque Bin Shafique, George Chatzikonstantis, George Lentaris
2014	—	`conf`	Using high-level synthesis to build memory and datapath optimized DSP accelerators. ICECS Dionysios Diamantopoulos, George Economakos, Dionysios I. Reisis
2014	—	`conf`	XG-PON optical network unit downstream FEC design based on truncated Reed-Solomon code. ICECS Georgios Georgis, Charalambos Tzeranis, Dionysios I. Reisis, George Synnefakis
2013	—	`conf`	PANDA: asymmetric passive optical network for xDSL and FTTH access. Panhellenic Conference on Informatics Konstantinos Yiannopoulos, Emmanouel A. Varvarigos, Dimitrios Klonidis, Ioannis Tomkos, Maria Spyropoulou, Ioannis Lazarou, Paraskevas Bakopoulos, Hercules Avramopoulos, George Heliotis, L.-P. Dimos, George Agapiou, Georgios Papastergiou, Ilias Koukouvinos, A. Orfanoudakis, Thanasis Oikonomou, Dimitrios Kritharidis, Spyridon Spyridakis, M. Dalakidis, G. Synnefakis, Dionysios I. Reisis, Georgios I. Papadimitriou, Panagiotis G. Sarigiannidis, Christos Liaskos
2013	—	`conf`	Single-image super-resolution using low complexity adaptive iterative back-projection. DSP Georgios Georgis, George Lentaris, Dionysios I. Reisis
2012	—	`conf`	Conflict free, parallel memory access for radix-2 FFT processors. ICECS Nikolaos Polychronakis, Dionysios I. Reisis, Emmanouil Tsilis, Ioannis Zokas
2012	J	`jnl`	Design and Comparison of FFT VLSI Architectures for SoC Telecom Applications with Different Flexibility, Speed and Complexity Trade-Offs. Circuits Syst. Signal Process. Sergio Saponara, Massimo Rovini, Luca Fanucci, Athanasios Karachalios, George Lentaris, Dionysios I. Reisis
2012	—	`conf`	Signal processing for deep-sea observatories with reconfigurable hardware. ICECS Konstantinos Manolopoulos, A. Belias, Georgios Georgis, Dionysios I. Reisis, E. G. Anasontzis
2011	J	`jnl`	A Control-Theoretic Approach for Efficient Design of Filters in DAC and Digital Audio Amplifiers. Circuits Syst. Signal Process. Konstantinos S. Tsakalis, Nikolaos Vlassopoulos, George Lentaris, Dionysios I. Reisis
2011	—	`conf`	Study of interpolation filters for motion estimation with application in H.264/AVC encoders. ICECS Georgios Georgis, George Lentaris, Dionysios I. Reisis
2010	J	`jnl`	A Graphics Parallel Memory Organization Exploiting Request Correlations. IEEE Trans. Computers George Lentaris, Dionysios I. Reisis
2010	—	`conf`	A continuous-flow, Variable-Length FFT SDF architecture. ICECS Nikolaos Polychronakis, Dionysios I. Reisis, Emmanouil Tsilis
2010	—	`conf`	An efficient dual-mode floating-point Multiply-Add Fused Unit. ICECS Konstantinos Manolopoulos, Dionysios I. Reisis, Vassilios A. Chouliaras
2010	J	`jnl`	Fully Systolic FFT Architecture for Giga-sample Applications. J. Signal Process. Syst. Konstantinos Babionitakis, Vassilios A. Chouliaras, Konstantinos Manolopoulos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos
2009	—	`conf`	A configurable length, Fused Multiply-Add floating point unit for a VLIW processor. SoCC Vassilios A. Chouliaras, Konstantinos Manolopoulos, Dionysios I. Reisis
2009	—	`conf`	Efficient cascaded VLSI FFT architecture for OFDM systems. ICECS Vassilios A. Chouliaras, Panagiotis Galiatsatos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos
2009	—	`conf`	Evaluating the performance of a configurable, extensible VLIW processor in FFT execution. ICECS David Stevens, Nick Glynn, Panagiotis Galiatsatos, Vassilios A. Chouliaras, Dionysios I. Reisis
2009	—	`conf`	Programmable Motion Estimation architecture. ICECS Anargyros Drolapas, George Lentaris, Dionysios I. Reisis
2008	J	`jnl`	A real-time H.264/AVC VLSI encoder architecture. J. Real Time Image Process. Konstantinos Babionitakis, Gregory Doumenis, George Georgakarakos, George Lentaris, Konstantinos Nakos, Dionysios I. Reisis, Ioannis Sifnaios, Nikolaos Vlassopoulos
2008	J	`jnl`	A real-time motion estimation FPGA architecture. J. Real Time Image Process. Konstantinos Babionitakis, Gregory Doumenis, George Georgakarakos, George Lentaris, Konstantinos Nakos, Dionysios I. Reisis, Ioannis Sifnaios, Nikolaos Vlassopoulos
2008	—	`conf`	Addressing technique for parallel memory accessing in radix-2 FFT processors. ICECS Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos
2008	J	`jnl`	Conflict-Free Parallel Memory Accessing Techniques for FFT Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. Dionysios I. Reisis, Nikolaos Vlassopoulos
2008	J	`jnl`	Customization of an embedded RISC CPU with SIMD extensions for video encoding: A case study. Integr. Vassilios A. Chouliaras, Vincent M. Dwyer, Shahrukh Agha, José L. Núñez-Yáñez, Dionysios I. Reisis, Konstantinos Nakos, Konstantinos Manolopoulos
2007	—	`conf`	High Performance 16K, 64K, 256K complex points VLSI Systolic FFT Architectures. ICECS Konstantinos Manolopoulos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos, Vassilios A. Chouliaras
2006	—	`conf`	A High Performance VLSI FFT Architecture. ICECS Konstantinos Babionitakis, Konstantinos Manolopoulos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos, Vassilios A. Chouliaras
2006	—	`conf`	Address Generation Techniques for Conflict Free Parallel Memory Accessing in FFT Architectures. ICECS Dionysios I. Reisis, Nikolaos Vlassopoulos
2006	—	`conf`	An Efficient H.264 VLSI Advanced Video Encoder. ICECS Konstantinos Babionitakis, George Lentaris, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos, Gregory Doumenis, George Georgakarakos, John Sifnaios
2006	C	`conf`	An approach for efficient design of digital amplifiers. ISCAS Nikolaos Vlassopoulos, Dionysios I. Reisis, George Lentaris, George S. Tombras, Evangelos A. Prosalentis, N. Ritas, Konstantinos S. Tsakalis
2003	—	`conf`	A VLSI architecture for minimizing the transmission power in OFDM transceivers. ICECS Konstantinos Babionitakis, Y. Dagres, Konstantinos Nakos, Dionysios I. Reisis
2003	J	`jnl`	Efficient Systolic Array Mapping of FIR Filters Used in PAM-QAM Modulators. J. VLSI Signal Process. A. Chorevas, Dionysios I. Reisis
1999	—	`conf`	An efficient component (IN-RAM) for buffer management and multi-protocol implementation in ATM systems. ICECS Gregory Doumenis, George E. Konstantoulakis, G. Korinthios, George Lykakis, Dionysios I. Reisis, G. Synnefakis
1999	—	`conf`	Developing an Efficient Model for Evaluating WWW Search Engines. Applied Informatics I. Despotopoulos, G. Korinthios, I. Nasios, Dionysios I. Reisis
1996	—	`conf`	An array based system for real time buffer management. ICECS George E. Konstantoulakis, Dionysios I. Reisis
1988	A*	`conf`	Image computations on reconfigurable VLSI arrays. CVPR Russ Miller, V. K. Prasanna Kumar, Dionysios I. Reisis, Quentin F. Stout