Diandian Zhang

15 papers A* 1A 2C 2Misc 1Journal 6Unranked 3
YearRankTypeTitle / Venue / Authors
2022 — conf
A High-Sensitivity Wake-up Receiver Using Tunnel Diode for ISM Band.
ICCT
Bingru Wu, Diandian Zhang, Tao Ma, Ruixuan Jiang, Hanming Gao, Guanghui Liu
2021 J jnl
OCR with the Deep CNN Model for Ligature Script-Based Languages like Manchu.
Sci. Program.
Diandian Zhang, Yan Liu, Zhuowei Wang, Depei Wang
2014 C conf
Improving ESL power models using switching activity information from timed functional models.
SCOPES
Stefan Schürmans, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Xiaotao Chen
2013 A* conf
Creation of ESL power models for communication architectures using automatic calibration.
DAC
Stefan Schürmans, Diandian Zhang, Dominik Auras, Rainer Leupers, Gerd Ascheid, Xiaotao Chen, Lun Wang
2013 J jnl
Efficient Implementation of Application-Aware Spinlock Control in MPSoCs.
Int. J. Embed. Real Time Commun. Syst.
Diandian Zhang, Li Lu, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout
2012 — conf
Application-aware spinlock control using a hardware scheduler in MPSoC platforms.
ISSoC
Diandian Zhang, Li Lu, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout
2011 J jnl
Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis.
Int. J. Embed. Real Time Commun. Syst.
Diandian Zhang, Han Zhang, Jerónimo Castrillón, Torsten Kempf, Bart Vanthournout, Gerd Ascheid, Rainer Leupers
2010 — conf
Optimized communication architecture of MPSoCs with a hardware scheduler: A system view.
SoC
Diandian Zhang, Han Zhang, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout
2009 A conf
Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves.
CHES
David Kammler, Diandian Zhang, Peter Schwabe, Hanno Scharwächter, Markus Langenberg, Dominik Auras, Gerd Ascheid, Rudolf Mathar
2009 J jnl
Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves.
IACR Cryptol. ePrint Arch.
David Kammler, Diandian Zhang, Peter Schwabe, Hanno Scharwächter, Markus Langenberg, Dominik Auras, Gerd Ascheid, Rainer Leupers, Rudolf Mathar, Heinrich Meyr
2009 J jnl
Integrated verification approach during ADL-driven processor design.
Microelectron. J.
Anupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2009 A conf
Task management in MPSoCs: An ASIP approach.
ICCAD
Jerónimo Castrillón, Diandian Zhang, Torsten Kempf, Bart Vanthournout, Rainer Leupers, Gerd Ascheid
2008 J jnl
Power-efficient Instruction Encoding Optimization for Various Architecture Classes.
J. Comput.
Diandian Zhang, Anupam Chattopadhyay, David Kammler, Ernst Martin Witte, Gerd Ascheid, Rainer Leupers, Heinrich Meyr
2007 Misc conf
Power-efficient Instruction Encoding Optimization for Embedded Processors.
VLSI Design
Anupam Chattopadhyay, Diandian Zhang, David Kammler, Ernst Martin Witte
2006 C conf
Integrated Verification Approach during ADL-Driven Processor Design.
IEEE International Workshop on Rapid System Prototyping
Anupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinrich Meyr