Dian Zhou - RankMe

226 papers A* 21A 27B 4C 21Misc 2Journal 88Unranked 62

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Atelier: An Automated Analog Circuit Design Framework via Multiple Large Language Model-Based Agents. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jinyi Shen, Zihao Chen, Ji Zhuang, Jiangli Huang, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng
2026	J	`jnl`	High-Dimensional Yield Optimization for Analog Circuits via Monte Carlo Tree Search and Self-Regressive Auto-Encoder Promoted Subspace Decomposed Gaussian Process. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zhaoting Chen, Jianping Guo, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2026	J	`jnl`	Variation-aware Analog Circuit Design via Contextual Modeling and Robust Optimization. ACM Trans. Design Autom. Electr. Syst. Jiangli Huang, Jinyi Shen, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng
2025	J	`jnl`	APPLE-DSE: Asynchronous Parallel Pareto Set Learning for Microarchitecture Design Space Exploration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xuyang Zhao, Tianning Gao, Zheng Wu, Zhaori Bi, Changhao Yan, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2025	J	`jnl`	ATOM: An Automatic Topology Synthesis Framework for Operational Amplifiers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jinyi Shen, Fan Yang, Li Shang, Changhao Yan, Zhaori Bi, Dian Zhou, Xuan Zeng
2025	J	`jnl`	An RISC-V PPA-Fusion Cooperative Optimization Framework Based on Hybrid Strategies. IEEE Trans. Very Large Scale Integr. Syst. Tianning Gao, Yifan Wang, Ming Zhu, Xiulong Wu, Dian Zhou, Zhaori Bi
2025	A	`conf`	INTO-OA: Interpretable Topology Optimization for Operational Amplifiers. DATE Jinyi Shen, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng
2025	A	`conf`	LCTMwalk: GPU-Accelerated Transient Thermal Simulation for Liquid-Cooled 2.5D/3D ICs via Random Walks on Circuit Networks of Modified Compact Thermal Models. ICCAD Zhixuan Dong, Yonghan Luo, Yuan Meng, Changhao Yan, Zhaori Bi, Keren Zhu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2025	A*	`conf`	Look Before You Leap: A Self-Review Bayesian Optimization Method for Constrained High-Dimensional Design Space Exploration. DAC Xuyang Zhao, Yiyang Zhao, Zheng Wu, Tianning Gao, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng
2025	A*	`conf`	MARIO: A Superadditive Multi-Algorithm Interworking Optimization Framework for Analog Circuit Sizing. DAC Wangzhen Li, Yuan Meng, Ruiyu Lyu, Changhao Yan, Keren Zhu, Zhaori Bi, Dian Zhou, Xuan Zeng
2025	A	`conf`	NSTherm: An Error-Bounded Network-Stochastic Fusion Thermal Simulator for Geometry-Adaptable Chiplets via Diffeomorphic Mapping and Neural-Guided Variance Reduction. ICCAD Yuan Meng, Yuyan Wang, Zhixuan Dong, Yonghan Luo, Changhao Yan, Keren Zhu, Zhaori Bi, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2025	A	`conf`	Seeing Through Designs: Attention-Based Knowledge Transfer for Preference-Guided Microarchitecture Search. ICCAD Yiyang Zhao, Xuyang Zhao, Zhaori Bi, Ming Zhu, Qiwei Zhan, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2025	—	`conf`	The Reasoning-Memorization Interplay in Language Models Is Mediated by a Single Direction. ACL (Findings) Yihuai Hong, Meng Cao, Dian Zhou, Lei Yu, Zhijing Jin
2025	J	`jnl`	The Reasoning-Memorization Interplay in Language Models Is Mediated by a Single Direction. CoRR Yihuai Hong, Dian Zhou, Meng Cao, Lei Yu, Zhijing Jin
2025	J	`jnl`	VTSMOC: An Efficient Voronoi Tree Search Boosted Multiobjective Bayesian Optimization With Constraints for High-Dimensional Analog Circuit Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Aidong Zhao, Ruiyu Lyu, Xuyang Zhao, Zhaori Bi, Fan Yang, Changhao Yan, Dian Zhou, Yangfeng Su, Xuan Zeng
2025	J	`jnl`	pPIRW: An Efficient and Accurate Precalculation Path Integral Random Walk Solver for Steady-State Thermal Simulation With Robin Boundary Conditions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zhixuan Dong, Longlong Yang, Cuiyang Ding, Changhao Yan, Zhaori Bi, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2024	B	`conf`	A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation : (Invited Paper). ASPDAC Ruiyu Lyu, Yuan Meng, Aidong Zhao, Zhaori Bi, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2024	A*	`conf`	Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model. DAC Zihao Chen, Jiangli Huang, Yiting Liu, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng
2024	B	`conf`	Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing. ASPDAC Xuyang Zhao, Zhaori Bi, Changhao Yan, Fan Yang, Ye Lu, Dian Zhou, Xuan Zeng
2024	J	`jnl`	BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Tianchen Gu, Wangzhen Li, Aidong Zhao, Zhaori Bi, Xudong Li, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng
2024	A	`conf`	Circuits Physics Constrained Predictor of Static IR Drop with Limited Data. DATE Yuan Meng, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Wenchuang Hu, Dian Zhou, Xuan Zeng
2024	J	`jnl`	D ACM Trans. Design Autom. Electr. Syst. Aidong Zhao, Tianchen Gu, Zhaori Bi, Fan Yang, Changhao Yan, Xuan Zeng, Zixiao Lin, Wenchuang Walter Hu, Dian Zhou
2024	A*	`conf`	EVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration. DAC Handa Sun, Zhaori Bi, Wenning Jiang, Ye Lu, Changhao Yan, Fan Yang, Wenchuang Hu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2024	A*	`conf`	Efficient ILT via Multigrid-Schwartz Method. DAC Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Dian Zhou, Xuan Zeng
2024	A	`conf`	Exploring High-dimensional Search Space via Voronoi Graph Traversing. UAI Aidong Zhao, Xuyang Zhao, Tianchen Gu, Zhaori Bi, Xinwei Sun, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2024	A*	`conf`	HiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing. DAC Tianchen Gu, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng
2024	J	`jnl`	Music conditioned 2D hand gesture dance generation with HGS. Comput. Animat. Virtual Worlds Dian Zhou, Shiguang Liu, Qing Xu
2024	J	`jnl`	ROI-HIT: Region of Interest-Driven High-Dimensional Microarchitecture Design Space Exploration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xuyang Zhao, Tianning Gao, Aidong Zhao, Zhaori Bi, Changhao Yan, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2024	A	`conf`	Revisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis. ICCAD Ruiyu Lyu, Aidong Zhao, Yuan Meng, Keren Zhu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2024	J	`jnl`	pNeurFill: Enhanced Neural Network Model-Based Dummy Filling Synthesis With Perimeter Adjustment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zhaoting Chen, Junzhe Cai, Changhao Yan, Zhaori Bi, Yuzhe Ma, Bei Yu, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng
2023	J	`jnl`	A Batched Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-Fidelity Modeling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Biao He, Shuhan Zhang, Yifan Wang, Tianning Gao, Fan Yang, Changhao Yan, Dian Zhou, Zhaori Bi, Xuan Zeng
2023	J	`jnl`	An Analog Circuit Building Block Generator via Nested Multi-Fidelity Modeling. IEEE Trans. Circuits Syst. I Regul. Pap. Jiangli Huang, Chuyu Wang, Yuyang Yan, Cong Tao, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng
2023	J	`jnl`	Identification and Evolution of Soil Organic Carbon Density Caused by Coastal Rapid Siltation Based on Imaging Spectroscopy. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. Aosheng Wang, Guanghui Zheng, Danping Wei, Caixia Jiao, Xianli Xie, Rong Zeng, Chengyi Zhao, Giri Kattel, Ying Xiong, Dian Zhou
2023	J	`jnl`	Machine Learning Electrocardiogram for Mobile Cardiac Pattern Extraction. Sensors Qingxue Zhang, Dian Zhou
2023	J	`jnl`	Quantitative Analysis of Tidal Creek Evolution and Vegetation Variation in Silting Muddy Flats on the Yellow Sea. Remote. Sens. Guanghui Zheng, Yan Wang, Chengyi Zhao, Wen Dai, Giri Raj Kattel, Dian Zhou
2023	A*	`conf`	cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis. DAC Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng
2022	C	`conf`	A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion. ISCAS Xu Fu, Changhao Yan, Zhaori Bi, Fan Yang, Dian Zhou, Xuan Zeng
2022	A	`conf`	A High-Precision Stochastic Solver for Steady-State Thermal Analysis with Fourier Heat Transfer Robin Boundary Conditions. ICCAD Longlong Yang, Cuiyang Ding, Changhao Yan, Dian Zhou, Xuan Zeng
2022	—	`conf`	A Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench. ASP-DAC Jingyao Zhao, Changhao Yan, Zhaori Bi, Fan Yang, Xuan Zeng, Dian Zhou
2022	J	`jnl`	An Efficient Batch-Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multiobjective Acquisition Ensemble. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2022	A*	`conf`	An efficient yield optimization method for analog circuits via gaussian process classification and varying-sigma sampling. DAC Xiaodong Wang, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2022	J	`jnl`	Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaodong Wang, Changhao Yan, Yuzhe Ma, Bei Yu, Fan Yang, Dian Zhou, Xuan Zeng
2022	J	`jnl`	Correlated Rare Failure Analysis via Asymptotic Probability Evaluation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jun Tao, Handi Yu, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li
2022	J	`jnl`	Efficient Layout Hotspot Detection via Neural Architecture Search. ACM Trans. Design Autom. Electr. Syst. Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng
2022	J	`jnl`	Fast Statistical Analysis of Rare Failure Events With Truncated Normal Distribution in High-Dimensional Variation Space. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li
2022	J	`jnl`	Learning From Highly Confident Samples for Automatic Knee Osteoarthritis Severity Assessment: Data From the Osteoarthritis Initiative. IEEE J. Biomed. Health Informatics Yifan Wang, Zhaori Bi, Yuxue Xie, Tao Wu, Xuan Zeng, Shuang Chen, Dian Zhou
2022	—	`conf`	LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces. MLCAD Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2022	J	`jnl`	Predicting the quality of answers with less bias in online health question answering communities. Inf. Process. Manag. Yan Qiu, Shuai Ding, Di Tian, Caiyun Zhang, Dian Zhou
2021	—	`conf`	A Fast Aging-aware Static Timing Analysis Prediction Frame of Digital Integrated Circuits. ASICON Jiahui Hu, Changhao Yan, Chao Guo, Ronggui Jiang, Dian Zhou, Xuan Zeng
2021	—	`conf`	A Robust Batch Bayesian Optimization for Analog Circuit Synthesis via Local Penalization. ASP-DAC Jiangli Huang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2021	J	`jnl`	An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis. CoRR Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng
2021	J	`jnl`	An Efficient Batch Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-objective Acquisition Ensemble. CoRR Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2021	A	`conf`	An Efficient Yield Estimation Method for Layouts of High Dimensional and High Sigma SRAM Arrays. DATE Yue Shen, Changhao Yan, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2021	—	`conf`	Bayesian Inference on Introduced General Region: An Efficient Parametric Yield Estimation Method for Integrated Circuits. ASP-DAC Zhengqi Gao, Zihao Chen, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng
2021	C	`conf`	Bayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process. ISCAS Jiangli Huang, Shuhan Zhang, Cong Tao, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2021	J	`jnl`	Deep learning of nanopore sensing signals using a bi-path network. CoRR Dario Dematties, Chenyu Wen, Mauricio David Pérez, Dian Zhou, Shi-Li Zhang
2021	J	`jnl`	Efficient Layout Hotspot Detection via Binarized Residual Neural Network Ensemble. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng
2021	—	`conf`	High-Dimensional Bayesian Optimization for Automated Analog Circuit Design via Add-Graph Structure. ASICON Yan Wang, Changhao Yan, Dian Zhou, Xuan Zeng
2021	J	`jnl`	IEEE Access Special Section Editorial: Advanced Information Sensing and Learning Technologies for Data-Centric Smart Health Applications. IEEE Access Qingxue Zhang, Vincenzo Piuri, Edward A. Clancy, Dian Zhou, Thomas Penzel, Wenchuang Walter Hu
2021	J	`jnl`	IEEE Access Special Section Editorial: Smart Health Sensing and Computational Intelligence: From Big Data to Big Impacts. IEEE Access Qingxue Zhang, Vincenzo Piuri, Edward A. Clancy, Dian Zhou, Thomas Penzel, Wenchuang Walter Hu, Hui Zheng
2021	J	`jnl`	LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces. CoRR Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2021	A*	`conf`	NeurFill: Migrating Full-Chip CMP Simulators to Neural Networks for Model-Based Dummy Filling Synthesis. DAC Junzhe Cai, Changhao Yan, Yuzhe Ma, Bei Yu, Dian Zhou, Xuan Zeng
2020	C	`conf`	A Mixed-Variable Bayesian Optimization Approach for Analog Circuit Synthesis. ISCAS Jialin Lu, Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng
2020	A*	`conf`	An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis. DAC Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng
2020	A	`conf`	An Efficient Bayesian Optimization Approach for Analog Circuit Synthesis via Sparse Gaussian Process Modeling. DATE Biao He, Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2020	C	`conf`	An Efficient Memory Partitioning Approach for Multi-Pattern Data Access in STT-RAM. ISCAS Binbin Liu, Fan Yang, Dian Zhou, Xuan Zeng
2020	A*	`conf`	An Efficient and Robust Yield Optimization Method for High-dimensional SRAM Circuits. DAC Xiaodong Wang, Tianchen Gu, Changhao Yan, Xiulong Wu, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2020	J	`jnl`	Analog/RF Post-silicon Tuning via Bayesian Optimization. ACM Trans. Design Autom. Electr. Syst. Renjian Pan, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li
2020	J	`jnl`	Application of Deep Learning Algorithm in Feature Mining and Rapid Identification of Colorectal Image. IEEE Access Mingchao Du, Min Tao, Jian Hong, Dian Zhou, Shuihua Wang
2020	—	`conf`	Bayesian Methods for the Yield Optimization of Analog and SRAM Circuits. ASP-DAC Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng
2020	J	`jnl`	Efficient Parametric Yield Estimation Over Multiple Process Corners via Bayesian Inference Based on Bernoulli Distribution. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zhengqi Gao, Jun Tao, Dian Zhou, Xuan Zeng
2020	J	`jnl`	Efficient Rare Failure Analysis Over Multiple Corners via Correlated Bayesian Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li
2020	J	`jnl`	Efficient Statistical Analysis for Correlated Rare Failure Events via Asymptotic Probability Approximation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Fulin Peng, Handi Yu, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li
2020	C	`conf`	Learning Low-Rank Structured Sparsity in Recurrent Neural Networks. ISCAS Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng
2020	C	`conf`	Multi-Corner Parametric Yield Estimation via Bayesian Inference on Bernoulli Distribution with Conjugate Prior. ISCAS Jiahe Shi, Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng
2020	J	`jnl`	Nonlinear CNN: improving CNNs with quadratic convolutions. Neural Comput. Appl. Yiyang Jiang, Fan Yang, Hengliang Zhu, Dian Zhou, Xuan Zeng
2020	J	`jnl`	Projection based Active Gaussian Process Regression for Pareto Front Modeling. CoRR Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng
2020	—	`conf`	VSFBS: Vulnerability Search in Firmware Based on String. DSA Zhibin Zhang, Dian Zhou, Jiqing Rao, Dongdong Zhao, Wenhua Hu, Jianwen Xiang, Zhongjin Liu, Yanzhen Xing
2019	J	`jnl`	An Efficient FPGA Implementation of Orthogonal Matching Pursuit With Square-Root-Free QR Decomposition. IEEE Trans. Very Large Scale Integr. Syst. Xiang Ge, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou
2019	A	`conf`	An Efficient FPGA-based Floating Random Walk Solver for Capacitance Extraction using SDAccel. DATE Xin Wei, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng
2019	J	`jnl`	An Efficient Memory Partitioning Approach for Multi-Pattern Data Access via Data Reuse. ACM Trans. Reconfigurable Technol. Syst. Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou
2019	A*	`conf`	An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis. DAC Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu
2019	J	`jnl`	An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis. CoRR Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu
2019	A	`conf`	Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network. DATE Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2019	J	`jnl`	Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network. CoRR Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2019	A*	`conf`	Efficient Layout Hotspot Detection via Binarized Residual Neural Network. DAC Yiyang Jiang, Fan Yang, Hengliang Zhu, Bei Yu, Dian Zhou, Xuan Zeng
2019	A	`conf`	Efficient Performance Trade-off Modeling for Analog Circuit based on Bayesian Neural Network. ICCAD Zhengqi Gao, Jun Tao, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng
2019	J	`jnl`	Graph-Constrained Sparse Performance Modeling for Analog Circuit Optimization via SDP Relaxation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li
2019	—	`conf`	Learning Sparse Patterns in Deep Neural Networks. ASICON Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng
2019	—	`conf`	Parallel Global Placement on CPU via Parallel Reduction. ASICON Huaidong Gao, Fan Yang, Dian Zhou, Xuan Zeng
2019	—	`conf`	VSkLCG A Method for Cross-Platform Vulnerability Search in Firmware. DSA Mushuai Han, Dongdong Zhao, Hong Lin, Dian Zhou, Jianwen Xiang, Zhongjin Liu, Yanzhen Xing
2019	—	`conf`	Vulnerability Detection in Firmware Based on Clonal Selection Algorithm. SSCI Man Yu, Dongdong Zhao, Dian Zhou, Linjun Ran, Jianwen Xiang, Zhongjin Liu, Yanzhen Xing
2018	A*	`conf`	A general graph based pessimism reduction framework for design optimization of timing closure. DAC Fulin Peng, Changhao Yan, Chunyang Feng, Jianquan Zheng, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2018	J	`jnl`	A novel single-arm-worn 24 h heart disease monitor empowered by machine intelligence. Biomed. Signal Process. Control. Qingxue Zhang, Dian Zhou, Xuan Zeng
2018	J	`jnl`	An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Wenlong Lyu, Pan Xue, Fan Yang, Changhao Yan, Zhiliang Hong, Xuan Zeng, Dian Zhou
2018	J	`jnl`	An Efficient Non-Gaussian Sampling Method for High Sigma SRAM Yield Analysis. ACM Trans. Design Autom. Electr. Syst. Jinyuan Zhai, Changhao Yan, Sheng-Guo Wang, Dian Zhou, Hai Zhou, Xuan Zeng
2018	A*	`conf`	An efficient Bayesian yield estimation method for high dimensional and high sigma SRAM circuits. DAC Jinyuan Zhai, Changhao Yan, Sheng-Guo Wang, Dian Zhou
2018	A	`conf`	An efficient data reuse strategy for multi-pattern data access. ICCAD Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou
2018	A*	`conf`	Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design. ICML Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2018	J	`jnl`	Cut Redistribution and Insertion for Advanced 1-D Layout Design via Network Flow Optimization. IEEE Trans. Very Large Scale Integr. Syst. Ye Zhang, Wenlong Lyu, Wai-Shing Luk, Fan Yang, Hai Zhou, Dian Zhou, David Z. Pan, Xuan Zeng
2018	J	`jnl`	Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mengshuo Wang, Wenlong Lv, Fan Yang, Changhao Yan, Wei Cai, Dian Zhou, Xuan Zeng
2018	J	`jnl`	Interlayer Cooling Network Design for High-Performance 3D ICs Using Channel Patterning and Pruning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hengliang Zhu, Feng Hu, Hao Zhou, David Z. Pan, Dian Zhou, Xuan Zeng
2018	A*	`conf`	Multi-objective bayesian optimization for analog/RF circuit synthesis. DAC Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2018	J	`jnl`	Smart-MSP: A Self-Adaptive Multiple Starting Point Optimization Approach for Analog Circuit Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yishi Yang, Hengliang Zhu, Zhaori Bi, Changhao Yan, Dian Zhou, Yangfeng Su, Xuan Zeng
2018	J	`jnl`	Thermal Stress and Reliability Analysis of TSV-Based 3-D ICs With a Novel Adaptive Strategy Finite Element Method. IEEE Trans. Very Large Scale Integr. Syst. Hao Zhou, Hengliang Zhu, Tao Cui, David Z. Pan, Dian Zhou, Xuan Zeng
2017	J	`jnl`	A Machine Learning-Empowered System for Long-Term Motion-Tolerant Wearable Monitoring of Blood Pressure and Heart Rate With Ear-ECG/PPG. IEEE Access Qingxue Zhang, Xuan Zeng, Wenchuang Walter Hu, Dian Zhou
2017	J	`jnl`	A Novel Framework for Motion-Tolerant Instantaneous Heart Rate Estimation by Phase-Domain Multiview Dynamic Time Warping. IEEE Trans. Biomed. Eng. Qingxue Zhang, Dian Zhou, Xuan Zeng
2017	—	`conf`	A Novel N-Retry Transactional Memory Model for Multi-Thread Programming. ISPA/IUCC Kun Lu, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng
2017	C	`conf`	A grid-based detailed routing algorithm for advanced 1D process. ISCAS Ye Zhang, Fan Yang, Dian Zhou, Xuan Zeng, Xiangdong Hu
2017	J	`jnl`	An Effective Layout Decomposition Method for DSA with Multiple Patterning in Contact-Hole Generation. ACM Trans. Design Autom. Electr. Syst. Yunfeng Yang, Wai-Shing Luk, Hai Zhou, David Z. Pan, Dian Zhou, Changhao Yan, Xuan Zeng
2017	—	`conf`	An efficient algorithm for stencil planning and optimization in E-beam lithography. ASP-DAC Jiabei Ge, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng
2017	J	`jnl`	An efficient and robust method to determine the optimal tap coefficients of high speed FIR equalizer. Sci. China Inf. Sci. Guanming Huang, Donesh Gillin, Dian Zhou, Jin Liu, Xuan Zeng, Po-Yu Kuo
2017	A	`conf`	An efficient leakage-aware thermal simulation approach for 3D-ICs using corrected linearized model and algebraic multigrid. DATE Chao Yan, Hengliang Zhu, Dian Zhou, Xuan Zeng
2017	J	`jnl`	C-YES: An Efficient Parametric Yield Estimation Approach for Analog and Mixed-Signal Circuits Based on Multicorner-Multiperformance Correlations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Wei Zeng, Hengliang Zhu, Xuan Zeng, Dian Zhou, Ruey-Wen Liu, Xin Li
2017	A*	`conf`	Correlated Rare Failure Analysis via Asymptotic Probability Evaluation. DAC Jun Tao, Handi Yu, Dian Zhou, Yangfeng Su, Xuan Zeng, Xin Li
2017	J	`jnl`	Efficient Memory Partitioning for Parallel Data Access in FPGA via Data Reuse. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou, Jie Chen
2017	C	`conf`	Efficient SVM-based hotspot detection using spectral clustering. ISCAS Fan Yang, Charles C. Chiang, Xuan Zeng, Dian Zhou
2017	C	`conf`	Efficient spectral graph sparsification via Krylov-subspace based spectral perturbation analysis. ISCAS Shuhan Zhang, Fan Yang, Xuan Zeng, Dian Zhou, Shun Li, Xiangdong Hu
2017	—	`conf`	Hear the heart: Daily cardiac health monitoring using Ear-ECG and machine learning. UEMCON Qingxue Zhang, Dian Zhou, Xuan Zeng
2017	J	`jnl`	HeartID: A Multiresolution Convolutional Neural Network for ECG-Based Biometric Human Identification in Smart Health Applications. IEEE Access Qingxue Zhang, Dian Zhou, Xuan Zeng
2017	J	`jnl`	High-Dimensional and Multiple-Failure-Region Importance Sampling for SRAM Yield Analysis. IEEE Trans. Very Large Scale Integr. Syst. Mengshuo Wang, Changhao Yan, Xin Li, Dian Zhou, Xuan Zeng
2017	J	`jnl`	Improved Tangent Space-Based Distance Metric for Lithographic Hotspot Classification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Fan Yang, Subarna Sinha, Charles C. Chiang, Xuan Zeng, Dian Zhou
2017	—	`conf`	Network flow based cut redistribution and insertion for advanced 1D layout design. ASP-DAC Ye Zhang, Wai-Shing Luk, Fan Yang, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng
2017	J	`jnl`	Optimization and Quality Estimation of Circuit Design via Random Region Covering Method. ACM Trans. Design Autom. Electr. Syst. Zhaori Bi, Dian Zhou, Sheng-Guo Wang, Xuan Zeng
2017	—	`conf`	PulsePrint: Single-arm-ECG biometric human identification using deep learning. UEMCON Qingxue Zhang, Dian Zhou, Xuan Zeng
2017	—	`conf`	Study on mechanical properties of radial permanent magnet bearing. CIS/RAM Dian Zhou, Gang Zhang
2017	A	`conf`	Subgradient based multiple-starting-point algorithm for non-smooth optimization of analog circuits. DATE Wenlong Lv, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2016	J	`jnl`	A yield-enhanced global optimization methodology for analog circuit based on extreme value theory. Sci. China Inf. Sci. Minghua Li, Guanming Huang, Xiulong Wu, Liuxi Qian, Xuan Zeng, Dian Zhou
2016	—	`conf`	An efficient trajectory-based algorithm for model order reduction of nonlinear systems via localized projection and global interpolation. ASP-DAC Chenjie Yang, Fan Yang, Xuan Zeng, Dian Zhou
2016	J	`jnl`	Efficient Hybrid Performance Modeling for Analog Circuits Using Hierarchical Shrinkage Priors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Changhai Liao, Jun Tao, Handi Yu, Zhangwen Tang, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li
2016	A	`conf`	Efficient Memory Partitioning for Parallel Data Access via Data Reuse. FPGA Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou
2016	J	`jnl`	Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits Via Hidden Markov Tree. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Changhai Liao, Jun Tao, Xuan Zeng, Yangfeng Su, Dian Zhou, Xin Li
2016	A	`conf`	Efficient multiple starting point optimization for automated analog circuit optimization via recycling simulation data. DATE Bo Peng, Fan Yang, Changhao Yan, Xuan Zeng, Dian Zhou
2016	A*	`conf`	Efficient performance modeling of analog integrated circuits via kernel density based sparse regression. DAC Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li
2016	A*	`conf`	Efficient performance modeling via Dual-Prior Bayesian Model Fusion for analog and mixed-signal circuits. DAC Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li
2016	A	`conf`	Efficient spatial variation modeling via robust dictionary learning. DATE Changhai Liao, Jun Tao, Xuan Zeng, Yangfeng Su, Dian Zhou, Xin Li
2016	A	`conf`	Efficient statistical analysis for correlated rare failure events via asymptotic probability approximation. ICCAD Handi Yu, Jun Tao, Changhai Liao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li
2016	C	`conf`	Fast compressive sensing reconstruction algorithm on FPGA using Orthogonal Matching Pursuit. ISCAS Zhelun Yu, Jincheng Su, Fan Yang, Yangfeng Su, Xuan Zeng, Dian Zhou, Weiping Shi
2016	C	`conf`	High-speed link verification based on statistical inference. ISCAS Xuan Zeng, Chenlei Fang, Qicheng Huang, Fan Yang, Dian Zhou, Wei Cai, Weiping Shi
2016	J	`jnl`	Layout Decomposition Co-Optimization for Hybrid E-Beam and Multiple Patterning Lithography. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yunfeng Yang, Wai-Shing Luk, David Z. Pan, Hai Zhou, Changhao Yan, Dian Zhou, Xuan Zeng
2016	J	`jnl`	PATer: A Hardware Prefetching Automatic Tuner on IBM POWER8 Processor. IEEE Comput. Archit. Lett. Minghua Li, Guancheng Chen, Qijun Wang, Yonghua Lin, H. Peter Hofstee, Per Stenström, Dian Zhou
2015	—	`conf`	Analog circuit performance bound estimation based on extreme value theory. MWSCAS Minghua Li, Zhaori Bi, Dian Zhou, Xuan Zeng
2015	J	`jnl`	Automated Technology Migration Methodology for Mixed-Signal Circuit Based on Multistart Optimization Framework. IEEE Trans. Very Large Scale Integr. Syst. Liuxi Qian, Zhaori Bi, Dian Zhou, Xuan Zeng
2015	—	`conf`	Layout decomposition co-optimization for hybrid e-beam and multiple patterning lithography. ASP-DAC Yunfeng Yang, Wai-Shing Luk, Hai Zhou, Changhao Yan, Xuan Zeng, Dian Zhou
2013	—	`conf`	A parallel sparse linear system solver for large-scale circuit simulation based on Schur Complement. ASICON Liuxi Qian, Dian Zhou, Xuan Zeng, Fan Yang, Shengguo Wang
2013	—	`conf`	A practical method for auto-design and optimization of DC-DC buck converter. ASICON Guanming Huang, Dian Zhou, Xuan Zeng, Shengguo Wang
2013	—	`conf`	An Adaptive Social Influence Propagation Model Based on Local Network Topology. EC-Web Haifeng Liu, Zheng Hu, Hui Tian, Dian Zhou
2013	J	`jnl`	An Efficient Optimization Based Method to Evaluate the DRV of SRAM Cells. IEEE Trans. Circuits Syst. I Regul. Pap. Guanming Huang, Liuxi Qian, Siwat Saibua, Dian Zhou, Xuan Zeng
2013	—	`conf`	Cumulative Probability Distribution Model for Evaluating User Behavior Prediction Algorithms. SocialCom Haifeng Liu, Zheng Hu, Dian Zhou, Hui Tian
2013	—	`conf`	Design automation of analog circuit considering the process variations. ASICON Dian Zhou, Guanming Huang
2013	—	`conf`	FMSSQP: An efficient global optimization tool for the robust design of Rail-to-Rail Op-Amp. ASICON Minghua Li, Dian Zhou, Sheng-Guo Wang, Xuan Zeng
2013	—	`conf`	Mixed-signal system verification by SystemC/SystemC-AMS and HSIM-VCS in near field communication tag design. ASICON Zhaori Bi, Wei Li, Dian Zhou, Xuan Zeng, Sheng-Guo Wang
2013	J	`jnl`	Near-Field Communication Transceiver System Modeling and Analysis Using SystemC/SystemC-AMS With the Consideration of Noise Issues. IEEE Trans. Very Large Scale Integr. Syst. Wei Li, Dian Zhou, Minghua Li, Binh P. Nguyen, Xuan Zeng
2013	—	`conf`	Oscillator phase noise verification accounting for process variations. ASICON Liuxi Qian, Dian Zhou, Xuan Zeng, Shengguo Wang
2012	—	`conf`	A context-aware computing mediated dynamic service composition and reconfiguration for ubiquitous environment. IOT Tao Gong, Zheng Hu, Haifeng Liu, Feng Lin, Dian Zhou, Hui Tian
2012	J	`jnl`	An Efficient Method for Evaluating Analog Circuit Performance Bounds Under Process Variations. IEEE Trans. Circuits Syst. II Express Briefs Po-Yu Kuo, Siwat Saibua, Guanming Huang, Dian Zhou
2012	J	`jnl`	Performance Analysis of Flow-Based Traffic Splitting Strategy on Cluster-Mesh Sensor Networks. Int. J. Distributed Sens. Networks Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng
2011	J	`jnl`	A Fast Analog Circuit Analysis Algorithm for Design Modification and Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Tracey Y. Zhou, Hang Liu, Dian Zhou, Tuna B. Tarim
2011	—	`conf`	A novel approach to estimate the impact of analog circuit performance based on the small signal model under process variations. SoCC Po-Yu Kuo, Siwat Saibua, Dian Zhou
2011	—	`conf`	An optimized mapping algorithm based on Simulated Annealing for regular NoC architecture. ASICON Liulin Zhong, Jiayi Sheng, Ming-e Jing, Zhiyi Yu, Xiaoyang Zeng, Dian Zhou
2011	B	`conf`	Modeling and analysis of Rayleigh fading channels using stochastic network calculus. WCNC Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng
2011	B	`conf`	Stochastic coverage in event-driven sensor networks. PIMRC Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng
2011	C	`conf`	Worst case analysis for evaluating VLSI circuit performance bounds using an optimization method. VLSI-SoC Siwat Saibua, Liuxi Qian, Dian Zhou
2010	—	`conf`	A Folding Strategy for SAT solvers based on Shannon's expansion theorem. SoCC Siwat Saibua, Po-Yu Kuo, Dian Zhou, Ming-e Jing
2010	J	`jnl`	Implementations of FFT and STBD for MIMO-OFDM on a Reconfigurable Baseband Platform. IEICE Trans. Inf. Syst. Shuang Zhao, Wenqing Lu, Xiaofang Zhou, Dian Zhou, Gerald E. Sobelman
2010	J	`jnl`	Stochastic Sparse-Grid Collocation Algorithm for Steady-State Analysis of Nonlinear System with Process Variations. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Jun Tao, Xuan Zeng, Wei Cai, Yangfeng Su, Dian Zhou
2009	—	`conf`	Analytical Evaluation of Retransmission Schemes in Wireless Sensor Networks. VTC Spring Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng
2009	C	`conf`	Incremental Circuit Simulation Analysis for Design Modification and Verification. ISCAS Tracey Y. Zhou, Dian Zhou, Xuan Zeng
2008	—	`conf`	A current shaping technique to lower phase noise in LC oscillators. ICECS Jian Chen, Fredrik Jonsson, Håkan K. Olsson, Li-Rong Zheng, Dian Zhou
2008	—	`conf`	An Efficient Multi-protocol RFID Interrogator Baseband Processor based on a Reconfigurable Architecture. ICESS Shuang Zhao, Wenqing Lu, Chao Lu, Xiaofang Zhou, Dian Zhou, Gerald E. Sobelman
2008	C	`conf`	Foundational-circuit-based spice simulation. ISCAS Tracey Y. Zhou, Dian Zhou, Hua Zhang, Xinyue Niu
2008	—	`conf`	Low noise amplifier architecture analysis for UWB system. SoC Peng Wang, Fredrik Jonsson, Dian Zhou, Lirong Zheng
2008	—	`conf`	PER performance enhancement through antenna and transceiver co-design for multi-band OFDM UWB communication. SoC Peng Wang, Hannu Tenhunen, Dian Zhou, Lirong Zheng
2007	J	`jnl`	A Novel Optimization Method for Parametric Yield: Uniform Design Mapping Distance Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ming-e Jing, Yue Hao, Dian Zhou, Xuan Zeng
2007	A	`conf`	A sparse grid based spectral stochastic collocation method for variations-aware capacitance extraction of interconnects under nanometer process technology. DATE Hengliang Zhu, Xuan Zeng, Wei Cai, Jintao Xue, Dian Zhou
2007	C	`conf`	RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect. ISCAS Fan Yang, Xuan Zeng, Yangfeng Su, Dian Zhou
2007	J	`jnl`	Solving SAT problem by heuristic polarity decision-making algorithm. Sci. China Ser. F Inf. Sci. Ming-e Jing, Dian Zhou, Pushan Tang, Xiaofang Zhou, Hua Zhang
2007	—	`conf`	Stochastic Sparse-grid Collocation Algorithm (SSCA) for Periodic Steady-State Analysis of Nonlinear System with Process Variations. ASP-DAC Jun Tao, Xuan Zeng, Wei Cai, Yangfeng Su, Dian Zhou, Charles C. Chiang
2007	—	`conf`	Traffic Splitting with Network Calculus for Mesh Sensor Networks. FGCN (2) Huimin She, Zhonghai Lu, Axel Jantsch, Li-Rong Zheng, Dian Zhou
2006	—	`conf`	A Spectral Stochastic Collocation Method for Capacitance Extraction of Interconnects with Process Variations. APCCAS Hengliang Zhu, Xuan Zeng, Wei Cai, Dian Zhou
2006	C	`conf`	A one-shot projection method for interconnects with process variations. ISCAS Jun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong Feng, Wei Cai, Dian Zhou, Charles C. Chiang
2006	J	`jnl`	LVS verification across multiple power domains for a quad-core microprocessor. ACM Trans. Design Autom. Electr. Syst. Wei Li, Daniel Blakely, Scott Van Sooy, Keven Dunn, David Kidd, Robert Rogenmoser, Dian Zhou
2006	A	`conf`	Time domain model order reduction by wavelet collocation method. DATE Xuan Zeng, Lihong Feng, Yangfeng Su, Wei Cai, Dian Zhou, Charles C. Chiang
2005	—	`conf`	A novel wavelet method for noise analysis of nonlinear circuits. ASP-DAC Xuan Zeng, Bang Liu, Jun Tao, Charles C. Chiang, Dian Zhou
2005	—	`conf`	Block SAPOR: block Second-order Arnoldi method for Passive Order Reduction of multi-input multi-output RCS interconnect circuits. ASP-DAC Bang Liu, Xuan Zeng, Yangfeng Su, Jun Tao, Zhaojun Bai, Charles C. Chiang, Dian Zhou
2005	J	`jnl`	Design and Verification of High-Speed VLSI Physical Design. J. Comput. Sci. Technol. Dian Zhou, Ruiming Li
2005	J	`jnl`	Integrating advanced reasoning into a SAT solver. Sci. China Ser. F Inf. Sci. Min Ding, Pushan Tang, Dian Zhou
2005	—	`conf`	Phase noise spectra analysis for LC oscillators. ISCAS (3) Hua Zhang, Dian Zhou, Yi Hu, Ruiming Li, Jianzhong Zhang
2005	—	`conf`	Power-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wires. ISCAS (1) Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng
2005	J	`jnl`	Power-optimal simultaneous buffer insertion/sizing and wire sizing for two-pin nets. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng
2004	—	`conf`	A closed-form phase noise solution for an ideal LC oscillator. ISCAS (4) Hua Zhang, Jianzhong Zhang, Dian Zhou, Jin Liu, Liangjun Jiang, Yan Pan
2004	—	`conf`	Analog circuit behavioral modeling via wavelet collocation method with auto-companding. ASP-DAC Jian Wang, Jun Tao, Xuan Zeng, Charles C. Chiang, Dian Zhou
2004	Misc	`conf`	Automated Architectural Optimization of Digital FIR Filters. VLSI Design Ronald W. Mehler, Dian Zhou
2004	A	`conf`	Direct Nonlinear Order Reduction with Variational Analysis. DATE Lihong Feng, Xuan Zeng, Charles C. Chiang, Dian Zhou, Qiang Fang
2004	—	`conf`	Frequency domain wavelet method with GMRES for large-scale linear circuit simulation. ISCAS (5) Jian Wang, Xuan Zeng, Wei Cai, Charles C. Chiang, Jiarong Tong, Dian Zhou
2004	—	`conf`	Frequency driven repeater insertion for deep submicron. ISCAS (5) Nisar Ahmed, Mohammad H. Tehranipour, Dian Zhou, Mehrdad Nourani
2004	A	`conf`	SAPOR: second-order Arnoldi method for passive order reduction of RCS circuits. ICCAD Yangfeng Su, Jian Wang, Xuan Zeng, Zhaojun Bai, Charles C. Chiang, Dian Zhou
2004	—	`conf`	Satisfiability and integer programming as complementary tools. ASP-DAC Ruiming Li, Dian Zhou, Donglei Du
2004	A	`conf`	Steady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution Method. DATE Xin Zhou, Dian Zhou, Jin Liu, Ruiming Li, Xuan Zeng, Charles C. Chiang
2004	—	`conf`	Two-sided projection method in variational equation model order reduction of nonlinear circuits. ISCAS (4) Lihong Feng, Xuan Zeng, Jiarong Tong, Charles C. Chiang, Dian Zhou
2003	—	`conf`	An efficient Sylvester equation solver for time domain circuit simulation by wavelet collocation method. ISCAS (4) Xuan Zeng, Sheng Huang, Yangfeng Su, Dian Zhou
2003	—	`conf`	An error distribution based nonlinear companding method for analog behavioral modeling via wavelet approximation. ISCAS (3) Xuan Zeng, Jun Tao, Yangfeng Su, Wenbing Chen, Dian Zhou
2003	J	`jnl`	Behavioral modeling for analog system-level simulation by wavelet collocation method. IEEE Trans. Circuits Syst. II Express Briefs Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling, Wei Cai
2003	A	`conf`	Power-Optimal Simultaneous Buffer Insertion/Sizing and Wire Sizing. ICCAD Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng
2002	Misc	`conf`	A DSP-based turbo codec for 3G communication systems. ICASSP Yingtao Jiang, Yiyan Tang, Yuke Wang, Dian Zhou
2002	—	`conf`	Architectural Synthesis of Finite Impulse Response Digital Filters. SBCCI Ronald W. Mehler, Dian Zhou
2002	—	`conf`	Wavelet method for high-speed clock tree simulation. ISCAS (1) Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling
2001	—	`conf`	An efficient balanced truncation realization algorithm for interconnect model order reduction. ISCAS (5) Dian Zhou, Wei Li, Wei Cai, Nailong Guo
2001	—	`conf`	Automatic clock tree design with IPs in the system. ISCAS (5) Wei Li, Dian Zhou, Haksu Kim, Xuan Zeng
2001	A	`conf`	Behavioral Modeling of Analog Circuits by Wavelet Collocation Method. ICCAD Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling
2000	J	`jnl`	Efficient implementation of a planar clock routing with thetreatment of obstacles. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Haksu Kim, Dian Zhou
2000	C	`conf`	Parasitic and mismatch modeling for optimal stack generation [in CMOS]. ISCAS Xuan Zeng, Mingyuan Li, Wenqing Zhao, Pushan Tang, Dian Zhou
2000	J	`jnl`	Wire space estimation and routability analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaoyu Song, Qian-Yu Tang, Dian Zhou, Yuke Wang
1999	—	`conf`	A constraint-based placement refinement method for CMOS analog cell layout. ISCAS (6) Xuan Zeng, J. Guan, Wenqing Zhao, Pushan Tang, Dian Zhou
1999	—	`conf`	An automatic clock tree design system for high-speed VLSI designs: planar clock routing with the treatment of obstacles. ISCAS (6) Haksu Kim, Dian Zhou
1999	—	`conf`	Buffer insertion for clock delay and skew minimization. ISPD Xuan Zeng, Dian Zhou, Wei Li
1997	—	`conf`	Minimization of chip size and power consumption of high-speed VLSI buffers. ISPD Dian Zhou, Xingya Liu
1995	C	`conf`	Optimization of VLSI Allocation. ISCAS Zhongli He, Dian Zhou
1994	J	`jnl`	Preface. VLSI Design Si-Qing Zheng, Dian Zhou
1993	C	`conf`	A Two-pole Circuit Model for VLSI High-speed Interconnection. ISCAS Dian Zhou, S. Su, F. Tsui, D. S. Gao, Jason Cong
1993	C	`conf`	Neighbour State Transition Method for VLSI Optimization Problems. ICCD Dian Zhou, F. Tsui
1993	A*	`conf`	Performance-Driven Interconnect Design Based on Distributed RC Delay Model. DAC Jason Cong, Kwok-Shing Leung, Dian Zhou
1993	C	`conf`	Propagation Delay in RLC Interconnection Networks. ISCAS D. S. Gao, Dian Zhou
1990	—	`—`	Algorithms for VLSI routing Dian Zhou
1990	J	`jnl`	An optimum channel routing algorithm in the restricted wire overlap model. Integr. Dian Zhou
1989	J	`jnl`	Routing in general junctions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sanjeev Rao Maddila, Dian Zhou