Dharmendar Boolchandani

21 papers C 1Journal 13Unranked 6
YearRankTypeTitle / Venue / Authors
2026 C conf
A Low-Phase Noise, Low-Power PFD Circuit Using GDI and Pass Transistor Logic with PVT tolerance.
ICCE
Dheeraj Singh Rajput, Bharat Choudhary, Archana Singhal, Dharmendar Boolchandani
2025 J jnl
A Novel 571.78 MHz-11.07 GHz Tuning Range Differential Ring Oscillator Application in a PLL Frequency Synthesizer with 895 ns Lock Time.
Circuits Syst. Signal Process.
Archana Singhal, Riyaz Ahmad, Dharmendar Boolchandani, C. Periasamy
2025 J jnl
A novel tunable capacitively-copuled instrumentation amplifier with 14.4 nV/ √(H z) noise and 190.47 nW micro-power for ECG applications.
Integr.
Sujeet Kumar Gupta, Riyaz Ahmad, Dharmendar Boolchandani, Sougata Kumar Kar
2025 J jnl
Design and Optimization of a Symmetrical Phase-Frequency Detector (SPFD) Through Statistical Techniques.
Circuits Syst. Signal Process.
Jyoti Sharma, Archana Singhal, Tarun Varma, Dharmendar Boolchandani
2024 J jnl
Design and optimization of phase frequency detector through Taguchi and ANOVA statistical techniques for fast settling low power frequency synthesizer.
Integr.
Jyoti Sharma, Riyaz Ahmad, Ashutosh Yadav, Tarun Varma, Dharmendar Boolchandani
2024 J jnl
Programmable Readout With Integrated Bandgap Reference Potentiostat for Glucose Sensing.
IEEE Trans. Instrum. Meas.
Riyaz Ahmad, Amit Mahesh Joshi, Dharmendar Boolchandani
2023 J jnl
A Novel Wide Tuning Range Differential Ring Oscillator Application in Dynamically Stable and 1.17 $\upmu $s Lock Time CP-PLL Frequency Synthesizer.
Circuits Syst. Signal Process.
Riyaz Ahmad, Gaurav Kumar Sharma, Dharmendar Boolchandani, Ashutosh Yadav
2023 — conf
A Signal Conditioning Circuit with Integrated Bandgap Reference for Glucose Concentration Measurement.
IFIPIoT (2)
Riyaz Ahmad, Amit Mahesh Joshi, Dharmendar Boolchandani
2023 J jnl
Novel Programmable Readout Amplifier and Potentiostat for Glucose Sensing Applications.
SN Comput. Sci.
Riyaz Ahmad, Amit M. Joshi, Dharmendar Boolchandani, Tarun Varma
2023 J jnl
Novel tunable current feedback instrumentation amplifier based on BBFC OP-AMP for biomedical applications with low power and high CMRR.
Integr.
Riyaz Ahmad, Narendra Choudhary, Sujeet Kumar Gupta, Amit Mahesh Joshi, Dharmendar Boolchandani
2023 J jnl
Optimization of Performance Parameters of Phase Frequency Detector Using Taguchi DoE and Pareto ANOVA Techniques.
J. Circuits Syst. Comput.
Jyoti Sharma, Gaurav Kumar Sharma, Tarun Varma, Dharmendar Boolchandani
2023 J jnl
Programmable Transimpedance Amplifier with Integrated Bandgap Reference for Glucose Concentration Measurement.
CoRR
Riyaz Ahmad, Amit M. Joshi, Dharmendar Boolchandani
2022 J jnl
A High Speed Phase Detection Circuit with No Dead Zone Suitable for Minimal Jitter and Low Power Applications.
J. Circuits Syst. Comput.
Jyoti Sharma, Gaurav Kumar Sharma, Tarun Varma, Dharmendar Boolchandani
2022 J jnl
A novel instrumentation amplifier with high tunable gain and CMRR forbiomedical applications.
Turkish J. Electr. Eng. Comput. Sci.
Riyaz Ahmad, Amit M. Joshi, Dharmendar Boolchandani
2022 J jnl
Low Power, Wide Range Synthesizer for 534 MHz-18.56 GHz Band with FoM of - 192.45 dBc/Hz.
J. Circuits Syst. Comput.
Gaurav Kumar Sharma, Arun Kishor Johar, Dharmendar Boolchandani
2021 — conf
A brief review of the various phase-frequency detector architectures.
iSES
Jyoti Sharma, Tarun Varma, Dharmendar Boolchandani
2021 — conf
Design of potentiostat and current mode read-out amplifier for glucose sensing.
iSES
Riyaz Ahmad, Amit M. Joshi, Dharmendar Boolchandani, Tarun Varma
2016 — conf
Variability and reliability aware surrogate model for sensing delay analysis of SRAM sense amplifier.
VDAT
Sapna Khandelwal, Jyoti Meena, Lokesh Garg, Dharmendar Boolchandani
2015 — conf
Optimal Tuning of PID Controller for Centrifugal Temperature Control System in Sugar Industry Using Genetic Algorithm.
SocProS (2)
Sanjay Kumar Singh, Dharmendar Boolchandani, S. G. Modani, Nitish Katal
2013 — conf
Architectural Level Sub-threshold Leakage Power Estimation of SRAM Arrays with its Peripherals.
VDAT
Nupur Navlakha, Lokesh Garg, Dharmendar Boolchandani, Vineet Sahula
2013 — ed.
VLSI Design and Test, 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papers
VDAT
Manoj Singh Gaur, Mark Zwolinski, Vijay Laxmi, Dharmendar Boolchandani, Virendra Singh, Adit D. Singh