Devarshi Mrinal Das

37 papers C 2Misc 2Journal 14Unranked 19

Year	Rank	Type	Title / Venue / Authors
2025	C	`conf`	A 2.9mW Inverter-based Quadrature Phase Clock Generator with ± 0.29° Phase Error. ISCAS Mayank Kumar Singh, M. Bhuvanesh, Rajasekhar Nagulapalli, Devarshi Mrinal Das, Mahendra Sakare
2025	J	`jnl`	A Modified Three Stage Dynamic Comparator Achieving Rail-to-Rail Input Common-Mode Range With <86 fJ · ns EDP. IEEE Trans. Circuits Syst. II Express Briefs Nidhi Sharma, Sherin A. Thomas, Vinayak Hande, Devarshi Mrinal Das
2025	J	`jnl`	A low-power common-mode insensitive rail-to-rail dynamic comparator for ADCs. Integr. Nidhi Sharma, Rajesh Kumar Srivastava, Deep Sehgal, Devarshi Mrinal Das
2025	J	`jnl`	SpiMAM: CMOS Implementation of Bio-Inspired Spiking Multidirectional Associative Memory Featuring In-Situ Learning. IEEE Trans. Circuits Syst. I Regul. Pap. Sahibia Kaur Vohra, Mahendra Sakare, Alex P. James, Devarshi Mrinal Das
2024	—	`conf`	A 0.006 mm MIXDES Sahil Sharma, Shivdeep, Nidhi Sharma, Devarshi Mrinal Das
2024	—	`conf`	A 66 $\mu \mathrm{W}$ Asynchronous Time-Domain Bulk-Tuned Offset Cancellation Circuit for High-Precision Dynamic Comparator. MIXDES Nidhi Sharma, Sahil Sharma, Devarshi Mrinal Das
2024	—	`conf`	A 66dBΩ 5 GHz and 44.88 √Hz/(pA·pW) Inductorless TIA in 65 nm CMOS. MIXDES Azhar Yaseen N. J, Shivdeep, Sahil Sharma, Hitesh Shrimali, Devarshi Mrinal Das
2024	—	`conf`	A Novel Charge Neutral, Programmable, Wireless Brain Stimulation System for Rat Experiments. ICBEA Sreenivas Bhaskara, Shabari Girishan K. V, Shubham Datta, Shivam Gupta, Kaushik Lakshmiramanan, Devarshi Mrinal Das, Hardik Jeetendra Pandya
2024	Misc	`conf`	A Pulse Oximeter and a Controller Designed for Automatic Regulation of Oxygen Concentrators. VLSID Dibya Chowdhury, Shivdeep, Devarshi Mrinal Das
2024	J	`jnl`	Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons. Integr. Sahibia Kaur Vohra, Sherin A. Thomas, Mahendra Sakare, Devarshi Mrinal Das
2024	J	`jnl`	Design and Analysis of 3D Integrated Folded Ferro-Capacitive Crossbar Array (FC²A) for Brain-Inspired Computing System. IEEE J. Emerg. Sel. Topics Circuits Syst. Sherin A. Thomas, Suyash Kushwaha, Rohit Sharma, Devarshi Mrinal Das
2024	Misc	`conf`	Finding a Promising Oxide Material for Resistive Random Access Memory with Graphene Electrode. VLSID Kanupriya Varshney, Mani Shankar Yadav, Devarshi Mrinal Das, Brajesh Rawat
2024	—	`conf`	Modeling and Comparing the Impact of Resistive and Capacitive Crossbar Associated Parasitics of Neuromorphic Circuits. MIXDES Sherin A. Thomas, Suyash Kushwaha, Rohit Sharma, Devarshi Mrinal Das
2023	—	`conf`	A Double Cross-Coupled Delay Cell for High-Frequency Differential Ring VCOs. APCCAS Mayank Kumar Singh, Manish Kumar Gautam, Puneet Singh, Rajasekhar Nagulapalli, Devarshi Mrinal Das, Mahendra Sakare
2023	—	`conf`	A Low Power Differential Delay Cell without Cross-Coupled Latch for Ring VCO. PRIME Mayank Kumar Singh, Puneet Singh, Devarshi Mrinal Das, Mahendra Sakare
2023	J	`jnl`	A PRBS Generator Using Merged XOR-D Flip-Flop as Building Blocks. Circuits Syst. Signal Process. Mayank Kumar Singh, Puneet Singh, Upendra Chichhula, Hirensh Mehra, Devarshi Mrinal Das, Mahendra Sakare
2023	—	`conf`	Analysing Mismatch effect of CMOS Neurons in Spiking Neural Network with Winner-take-all Mechanism. NorCAS Sahibia Kaur Vohra, Alex P. James, Mahendra Sakare, Devarshi Mrinal Das
2023	J	`jnl`	Full CMOS Circuit for Brain-Inspired Associative Memory With On-Chip Trainable Memristive STDP Synapse. IEEE Trans. Very Large Scale Integr. Syst. Sahibia Kaur Vohra, Sherin A. Thomas, Shivdeep, Mahendra Sakare, Devarshi Mrinal Das
2023	J	`jnl`	Optimization of Slew Mitigation Capacitor in Passive Charge Compensation-Based Delta-Sigma Modulator. IEEE Trans. Circuits Syst. II Express Briefs Mohd Asim Saeed, Manoj Kumar, B. Umapathi, Devarshi Mrinal Das
2022	—	`conf`	6-bit 1-GS/s Partially Active Flash ADC with Comparator Offset Correction. iSES Nidhi Sharma, Vinayak Hande, Rajesh Kumar Srivastava, Devarshi Mrinal Das
2022	—	`conf`	A Low-Overhead PUF Based Hardware Security Technique to Prevent Scan Chain Attacks for Industry-Standard DFT Architecture. MWSCAS Soniya Chittoriya, Shivdeep, Kundan Kumar Jha, Devarshi Mrinal Das, Rohit Sharma
2022	J	`jnl`	CMOS Circuit Implementation of Spiking Neural Network for Pattern Recognition Using On-chip Unsupervised STDP Learning. CoRR Sahibia Kaur Vohra, Sherin A. Thomas, Mahendra Sakare, Devarshi Mrinal Das
2021	—	`conf`	A CMOS based High Resolution All-Digital Temperature Sensor with Low Power Supply Sensitivity. MWSCAS Soumyashib Das, Sanjay Wadhwa, Devarshi Mrinal Das
2021	—	`conf`	A Robust Training Signal Generator for Trainable Memristive Digital to Analog Converter. iSES Shivdeep, Sahibia Kaur Vohra, Neeraj Goel, Devarshi Mrinal Das
2021	—	`conf`	A low power 8 × 2 MWSCAS Mayank Kumar Singh, Puneet Singh, Devarshi Mrinal Das, Mahendra Sakare
2021	—	`conf`	Analysis of Parasitics on CMOS based Memristor Crossbar Array for Neuromorphic Systems. MWSCAS Sherin A. Thomas, Sahibia Kaur Vohra, Rahul Kumar, Rohit Sharma, Devarshi Mrinal Das
2021	—	`conf`	Analytical Modelling of a CMOS Inter Spike Interval Decoder for Resistive Crossbar based Brain Inspired Computing. VDAT Sahibia Kaur Vohra, Sherin A. Thomas, Mahendra Sakare, Devarshi Mrinal Das
2021	—	`conf`	Full CMOS Implementation of Bidirectional Associative Memory Neural Network with Analog Memristive Synapse. MWSCAS Sahibia Kaur Vohra, Sherin A. Thomas, Mahendra Sakare, Devarshi Mrinal Das
2021	—	`conf`	Python-LTspice Co-Simulation to Train Neural Networks with Memristive Synapses to Learn Logic Gate Operations. iSES Shubham Kumar, Devarshi Mrinal Das
2020	J	`jnl`	Adaptive analogue calibration technique to compensate electrode motion artefacts in biopotential recording. IET Circuits Devices Syst. Arijit Karmakar, Devarshi Mrinal Das, Maryam Shojaei Baghini
2020	J	`jnl`	Noise-power-area optimised design procedure for OTAs with complementary input transistors for neural amplifiers. IET Circuits Devices Syst. Devarshi Mrinal Das, Kashyap Barot, Abhishek Srivastava, Maryam Shojaei Baghini
2019	J	`jnl`	Design and development of an Internet-of-Things enabled wearable ExG measuring system with a novel signal processing algorithm for electrocardiogram. IET Circuits Devices Syst. Devarshi Mrinal Das, Amogh Vidwans, Abhishek Srivastava, Meraj Ahmad, Saujal Vaishnav, Sourya Dewan, Maryam Shojaei Baghini
2018	J	`jnl`	A pulse oximeter system, Microelectron. J. Devarshi Mrinal Das, Aman Gupta, Abhishek Srivastava, Amogh Vidwans, Meraj Ahmad, Aniruddha Shelke, Salil Kale, J. Ananthapadmanabhan, Dinesh Kumar Sharma, Maryam Shojaei Baghini
2017	C	`conf`	A noise-power-area optimized novel programmable gain and bandwidth instrumentation amplifier for biomedical applications. ISCAS Devarshi Mrinal Das, Abhishek Srivastava, Aman Gupta, Kashyap Barot, Maryam Shojaei Baghini
2016	—	`conf`	A mismatch insensitive reconfigurable discrete time biosignal conditioning circuit in 180 nm MM CMOS technology. VDAT Priyanka Kimtee, Devarshi Mrinal Das, Maryam Shojaei Baghini
2016	J	`jnl`	A novel low-noise fully differential CMOS instrumentation amplifier with 1.88 noise efficiency factor for biomedical and sensor applications. Microelectron. J. Devarshi Mrinal Das, Abhishek Srivastava, J. Ananthapadmanabhan, Meraj Ahmad, Maryam Shojaei Baghini
2014	—	`conf`	Design considerations for high-CMRR low-power current mode instrumentation amplifier for biomedicai data acquisition systems. ICECS Devarshi Mrinal Das, J. Ananthapadmanabhan, Maryam Shojaei Baghini, Dinesh Kumar Sharma