Derong Liu - RankMe

14 papers A* 4A 2Journal 5Unranked 3

Year	Rank	Type	Title / Venue / Authors
2019	—	`conf`	Device Layer-Aware Analytical Placement for Analog Circuits. ISPD Biying Xu, Shaolan Li, Chak-Wa Pui, Derong Liu, Linxiao Shen, Yibo Lin, Nan Sun, David Z. Pan
2019	A	`conf`	Exploiting Wavelength Division Multiplexing for Optical Logic Synthesis. DATE Zheng Zhao, Derong Liu, Zhoufeng Ying, Biying Xu, Chenghao Feng, Ray T. Chen, David Z. Pan
2019	—	`conf`	Hardware-software co-design of slimmed optical neural networks. ASP-DAC Zheng Zhao, Derong Liu, Meng Li, Zhoufeng Ying, Lu Zhang, Biying Xu, Bei Yu, Ray T. Chen, David Z. Pan
2019	J	`jnl`	Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Derong Liu, Bei Yu, Vinicius S. Livramento, Salim Chowdhury, Duo Ding, Huy Vo, Akshay Sharma, David Z. Pan
2018	A*	`conf`	OPERON: optical-electrical power-efficient route synthesis for on-chip signals. DAC Derong Liu, Zheng Zhao, Zheng Wang, Zhoufeng Ying, Ray T. Chen, David Z. Pan
2018	—	`conf`	Prim-Dijkstra Revisited: Achieving Superior Timing-driven Routing Trees. ISPD Charles J. Alpert, Wing-Kai Chow, Kwangsoo Han, Andrew B. Kahng, Zhuo Li, Derong Liu, Sriram Venkatesh
2018	J	`jnl`	TILA-S: Timing-Driven Incremental Layer Assignment Avoiding Slew Violations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Derong Liu, Bei Yu, Salim Chowdhury, David Z. Pan
2017	J	`jnl`	Incremental Layer Assignment Driven by an External Signoff Timing Engine. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Vinicius S. Livramento, Derong Liu, Salim Chowdhury, Bei Yu, Xiaoqing Xu, David Z. Pan, José Luís Almada Güntzel, Luiz C. V. dos Santos
2017	J	`jnl`	Incremental Layer Assignment for Timing Optimization. ACM Trans. Design Autom. Electr. Syst. Derong Liu, Bei Yu, Salim Chowdhury, David Z. Pan
2017	A*	`conf`	Streak: Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups. DAC Derong Liu, Vinicius S. Livramento, Salim Chowdhury, Duo Ding, Huy Vo, Akshay Sharma, David Z. Pan
2016	A*	`conf`	Incremental layer assignment for critical path timing. DAC Derong Liu, Bei Yu, Salim Chowdhury, David Z. Pan
2016	J	`jnl`	OSFA: A New Paradigm of Aging Aware Gate-Sizing for Power/Performance Optimizations Under Multiple Operating Conditions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Subhendu Roy, Derong Liu, Jagmohan Singh, Junhyung Um, David Z. Pan
2015	A*	`conf`	OSFA: a new paradigm of gate-sizing for power/performance optimizations under multiple operating conditions. DAC Subhendu Roy, Derong Liu, Junhyung Um, David Z. Pan
2015	A	`conf`	TILA: Timing-Driven Incremental Layer Assignment. ICCAD Bei Yu, Derong Liu, Salim Chowdhury, David Z. Pan