Denis Flandre - RankMe

139 papers A* 1A 5C 6Journal 68Unranked 59

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	Experimental Demonstration of a Temperature-Sensitive VO2 Memristor-Based Spiking Circuit in Stochastic Bursting Regime. LASCAS Léopold Van Brandt, Noémie Bidoul, Thomas Ratier, Xi Zeng, Jean-Charles Delvenne, Denis Flandre
2026	—	`conf`	On the Excitability of Ultra-Low-Power CMOS Analog Spiking Neurons. LASCAS Léopold Van Brandt, Grégoire Brandsteert, Denis Flandre
2025	J	`jnl`	Electromechanical Measurements and Modeling of a High-Performance Small-Area Ultra-Thin SOI MEMS Piezoresistive Pressure Sensor. IEEE Trans. Instrum. Meas. Xi Zeng, Nicolas André, Eléonore Masarweh, Ottilie Bonfanti, Denis Flandre
2025	J	`jnl`	Modeling and Predicting Noise-Induced Failure Rates in Ultra-Low-Voltage SRAM Bitcells Affected by Process Variations. IEEE Trans. Circuits Syst. I Regul. Pap. Léopold Van Brandt, Michele Bonnin, Maurício Banaszeski da Silva, Pascal Bolcato, Gilson I. Wirth, Denis Flandre, Jean-Charles Delvenne
2025	J	`jnl`	On the Excitability of Ultra-Low-Power CMOS Analog Spiking Neurons. CoRR Léopold Van Brandt, Grégoire Brandsteert, Denis Flandre
2025	—	`conf`	Reliability Analyses of Ultra-Low Voltage Analog Spiking Neurons. MIXDES Grégoire Brandsteert, Léopold Van Brandt, Denis Flandre
2024	J	`jnl`	A Combined Analytical and Simulation-Based Methodology for Quantifying the Noise-Power-Area Trade-Offs in Biomedical Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. Sylvain Favresse, David Bol, Denis Flandre
2024	J	`jnl`	Stochastic Nonlinear Dynamical Modelling of SRAM Bitcells in Retention Mode. CoRR Léopold Van Brandt, Denis Flandre, Jean-Charles Delvenne
2024	—	`conf`	Variability-Aware Noise-Induced Dynamic Instability of Ultra-Low-Voltage SRAM Bitcells. LASCAS Léopold Van Brandt, Jean-Charles Delvenne, Denis Flandre
2024	J	`jnl`	Variability-Aware Noise-Induced Dynamic Instability of Ultra-Low-Voltage SRAM Bitcells. CoRR Léopold Van Brandt, Jean-Charles Delvenne, Denis Flandre
2023	J	`jnl`	A 1.1- / 0.9-nA Temperature-Independent 213- / 565-ppm/$^\circ$C Self-Biased CMOS-Only Current Reference in 65-nm Bulk and 22-nm FDSOI. CoRR Martin Lefebvre, Denis Flandre, David Bol
2023	J	`jnl`	A 1.1-/0.9-nA Temperature-Independent 213-/565-ppm/°C Self-Biased CMOS-Only Current Reference in 65-nm Bulk and 22-nm FDSOI. IEEE J. Solid State Circuits Martin Lefebvre, Denis Flandre, David Bol
2023	J	`jnl`	Analysis and Design of RF Energy-Harvesting Systems With Impedance-Aware Rectifier Sizing. IEEE Trans. Circuits Syst. II Express Briefs Pengcheng Xu, Denis Flandre, David Bol
2023	—	`conf`	Low-temperature admittance spectroscopy for defect characterization in Cu(In,Ga)(S,Se)2 thin-film solar cells. EUROCON Jonathan Parion, Romain Scaffidi, Denis Flandre, Guy Brammertz, Bart Vermang
2023	—	`conf`	Mutual Inductance Evaluation Between Two Parallel Conductors on a PCB. ICECS Sana Chouaibi, Mohamed Hadj Said, Dorra Nasr, Mossaad Ben Ayed, Denis Flandre, Fares Tounsi
2023	—	`conf`	Near-IR response of highly-strained Si photodetector linking first principles and TCAD. ESSDERC Nicolas Roisin, Jean-Pierre Raskin, Denis Flandre
2023	J	`jnl`	PCB-Based Planar Inductive Loops for Partial Discharges Detection in Power Cables. Sensors Sinda Kaziz, Pietro Romano, Antonino Imburgia, Guido Ala, Halim Sghaier, Denis Flandre, Fares Tounsi
2023	—	`conf`	SPICE Model of SPAD Transient Intrinsic Response Validated using Mixed-Mode TCAD Simulations. ESSDERC Tom Klauner, Iman Sabri Alirezaei, Nicolas Roisin, Nicolas André, Denis Flandre
2023	—	`conf`	Static and Dynamic Stochastic Analysis of a Temperature-Sensitive VO2 Spiking Neuron. ESSDERC Noémie Bidoul, Teodor Rosca, Adrian M. Ionescu, Denis Flandre
2023	J	`jnl`	Ultra-Scaled Si Nanowire Biosensors for Single DNA Molecule Detection. Sensors Aryan Afzalian, Denis Flandre
2022	—	`conf`	A 0.9-nA Temperature-Independent 565-ppm/°C Self-Biased Current Reference in 22-nm FDSOI. ESSCIRC Martin Lefebvre, Denis Flandre, David Bol
2022	J	`jnl`	Accurate and Insightful Closed-Form Prediction of Subthreshold SRAM Hold Failure Rate. IEEE Trans. Circuits Syst. I Regul. Pap. Léopold Van Brandt, Roghayeh Saeidi, David Bol, Denis Flandre
2022	J	`jnl`	Comprehensive Analytical Comparison of Ring Oscillators in FDSOI Technology: Current Starving Versus Back-Bias Control. IEEE Trans. Circuits Syst. I Regul. Pap. Maxime Schramme, Léopold Van Brandt, Denis Flandre, David Bol
2022	J	`jnl`	Design-Window Methodology for Inductorless Noise-Cancelling CMOS LNAs. IEEE Access Antonio D. Martínez-Pérez, Francisco Aznar, Denis Flandre, Santiago Celma
2022	—	`conf`	Spike-Based Sensing and Communication for Highly Energy-Efficient Sensor Edge Nodes. JC&S Florian Roth, Noémie Bidoul, Teodor Rosca, Meik Dörpinghaus, Denis Flandre, Adrian M. Ionescu, Gerhard P. Fettweis
2022	J	`jnl`	Variation Range of Different Inductor Topologies with Shields for RF and Inductive Sensing Applications. Sensors Fares Tounsi, Mohamed Hadj Said, Margo Hauwaert, Sinda Kaziz, Laurent A. Francis, Jean-Pierre Raskin, Denis Flandre
2021	J	`jnl`	A Self-Gating RF Energy Harvester for Wireless Power Transfer With High-PAPR Incident Waveform. IEEE J. Solid State Circuits Pengcheng Xu, Denis Flandre, David Bol
2021	J	`jnl`	A Wearable Low-Power Sensing Platform for Environmental and Health Monitoring: The Convergence Project. Sensors Elise Saoutieff, Tiziana Polichetti, Laurent Jouanet, Adrien Faucon, Audrey Vidal, Alexandre Pereira, Sebastien Boisseau, Thomas Ernst, Maria Lucia Miglietta, Brigida Alfano, Ettore Massera, Saverio De Vito, Do Hanh Ngan Bui, Philippe Benech, Tân-Phu Vuong, Carmen Moldovan, Yann Danlée, Thomas Walewyns, Sylvain Pétré, Denis Flandre, Armands Ancans, Modris Greitans, Adrian M. Ionescu
2021	—	`conf`	Improving MOSFET Piezoresistive Strain Gauges Limit of Detection Using Lock-In Principle. IEEE SENSORS Thibault P. Delhaye, Nicolas Roisin, Nicolas André, Laurent A. Francis, Denis Flandre
2021	J	`jnl`	SleepRunner: A 28-nm FDSOI ULP Cortex-M0 MCU With ULL SRAM and UFBR PVT Compensation for 2.6-3.6-μW/DMIPS 40-80-MHz Active Mode and 131-nW/kB Fully Retentive Deep-Sleep Mode. IEEE J. Solid State Circuits David Bol, Maxime Schramme, Ludovic Moreau, Pengcheng Xu, Rémi Dekimpe, Roghayeh Saeidi, Thomas Haine, Charlotte Frenkel, Denis Flandre
2020	—	`conf`	A Practical Approach for the Evaluation of Noise in Oscillator-Based Resistive Sensor Interfaces. IEEE SENSORS Rafael Puyol, Yannick Molle, Sylvain Pétré, Thomas Walewyns, Laurent A. Francis, Denis Flandre
2020	—	`conf`	Anisotropic conductive film & flip-chip bonding for low-cost sensor prototyping on rigid & flex PCB. IEEE SENSORS Serguei Stoukatch, Nicolas André, Thibault P. Delhaye, François Dupont, Jean-Michel Redouté, Denis Flandre
2020	J	`jnl`	Learning with Physical Noise or Errors. IEEE Trans. Dependable Secur. Comput. Dina Kamel, François-Xavier Standaert, Alexandre Duc, Denis Flandre, Francesco Berti
2020	—	`conf`	Micrometer-thin SOI Sensors for E-Skin Applications. IEEE SENSORS Wei Peng, Nicolas André, Xi Zeng, Iman Sabri Alirezaei, Guoli Li, Mohamed Bouterfa, Laurent A. Francis, Denis Flandre
2020	J	`jnl`	Performances Evaluation of On-Chip Large-Size-Tapped Transformer for MEMS Applications. IEEE Trans. Instrum. Meas. Fares Tounsi, Denis Flandre, Libor Rufer, Laurent A. Francis
2019	—	`conf`	A 40-to-80MHz Sub-4μW/MHz ULV Cortex-M0 MCU SoC in 28nm FDSOI With Dual-Loop Adaptive Back-Bias Generator for 20μs Wake-Up From Deep Fully Retentive Sleep Mode. ISSCC David Bol, Maxime Schramme, Ludovic Moreau, Thomas Haine, Pengcheng Xu, Charlotte Frenkel, Remi Dekimpe, François Stas, Denis Flandre
2019	J	`jnl`	A battery-less BLE smart sensor for room occupancy tracking supplied by 2.45-GHz wireless power transfer. Integr. Remi Dekimpe, Pengcheng Xu, Maxime Schramme, Pierre Gérard, Denis Flandre, David Bol
2019	J	`jnl`	A security oriented transient-noise simulation methodology: Evaluation of intrinsic physical noise of cryptographic designs. Integr. Kashif Nawaz, Léopold Van Brandt, Itamar Levi, François-Xavier Standaert, Denis Flandre
2019	J	`jnl`	Analysis, Modeling, and Design of a 2.45-GHz RF Energy Harvester for SWIPT IoT Smart Sensors. IEEE J. Solid State Circuits Pengcheng Xu, Denis Flandre, David Bol
2019	—	`conf`	Live Demonstration: A Highly Selective Temperature and Humidity Compensated MOX Based Multi-Gas Sensor Module with Bluetooth 5.0 Connectivity. IEEE SENSORS Sylvain Pétré, Thomas Walewyns, Roussin Lontio Fomekong, Driss Lahem, Marc Debliquy, Denis Flandre, Laurent A. Francis
2019	—	`conf`	Methodology for Performance Optimization in Noise- and Distortion-Canceling LNA. SMACD Antonio D. Martínez-Pérez, Cecilia Gimeno, Denis Flandre, Francisco Aznar, Guillermo Royo, Carlos Sánchez-Azqueta
2019	—	`conf`	Self-Heating in 28 FDSOI UTBB MOSFETs at Cryogenic Temperatures. ESSDERC Lucas Nyssens, Arka Halder, Babak Kazemi Esfeh, Nicolas Planes, Michel Haond, Denis Flandre, Jean-Pierre Raskin, Valeriya Kilchytska
2018	—	`conf`	A Battery-Less BLE IoT Motion Detector Supplied by 2.45-GHz Wireless Power Transfer. PATMOS Remi Dekimpe, Pengcheng Xu, Maxime Schramme, Denis Flandre, David Bol
2018	J	`jnl`	A Robust 10-Gb/s Duobinary Transceiver in 0.13-μm SOI CMOS for Short-Haul Optical Networks. IEEE Trans. Ind. Electron. Javier Aguirre, David Bol, Denis Flandre, Carlos Sánchez-Azqueta, Santiago Celma
2018	—	`conf`	A Transient Noise Analysis of Secured Dual-Rail Based Logic Style. NGCAS Kashif Nawaz, Itamar Levi, François-Xavier Standaert, Denis Flandre
2018	J	`jnl`	Analysis and Specification of an IR-UWB Transceiver for High-Speed Chip-to-Chip Communication in a Server Chassis. IEEE Trans. Circuits Syst. I Regul. Pap. Cecilia Gimeno, Denis Flandre, David Bol
2018	—	`conf`	Demonstrating an LPPN Processor. ASHES@CCS Dina Kamel, Davide Bellizia, François-Xavier Standaert, Denis Flandre, David Bol
2018	—	`conf`	Design of a 2.45-GHz RF Energy Harvester for SWIPT IoT smart sensors. A-SSCC Pengcheng Xu, Denis Flandre, David Bol
2018	A	`conf`	Gradient importance sampling: An efficient statistical extraction methodology of high-sigma SRAM dynamic characteristics. DATE Thomas Haine, Johan Segers, Denis Flandre, David Bol
2018	—	`conf`	Let's make it Noisy: A Simulation Methodology for adding Intrinsic Physical Noise to Cryptographic Designs. PRIME Kashif Nawaz, Léopold Van Brandt, François-Xavier Standaert, Denis Flandre
2018	—	`conf`	Low-power half-rate dual-loop clock-recovery system in 28-nm FDSOI. LASCAS Cecilia Gimeno, Denis Flandre, David Bol
2018	J	`jnl`	Multilevel Half-Rate Phase Detector for Clock and Data Recovery Circuits. IEEE Trans. Very Large Scale Integr. Syst. Cecilia Gimeno, David Bol, Denis Flandre
2017	—	`conf`	An 80-MHz 0.4V ULV SRAM macro in 28nm FDSOI achieving 28-fJ/bit access energy with a ULP bitcell and on-chip adaptive back bias generation. ESSCIRC Thomas Haine, Quoc-Khoi Nguyen, François Stas, Ludovic Moreau, Denis Flandre, David Bol
2017	—	`conf`	Back-gate bias effect on UTBB-FDSOI non-linearity performance. ESSDERC B. Kazemi Esfeh, Valeria Kilchytska, Bertrand Parvais, Nicolas Planes, M. Haond, Denis Flandre, Jean-Pierre Raskin
2017	—	`conf`	High-efficiency wireless power transfer for mm-size biomedical implants. IEEE SENSORS Thibault P. Delhaye, Nicolas André, Samuel Gilet, Cecilia Gimeno, Laurent A. Francis, Denis Flandre
2017	J	`jnl`	Multiple-Wavelength Detection in SOI Lateral PIN Diodes With Backside Reflectors. IEEE Trans. Ind. Electron. Guoli Li, Nicolas André, Pierre Gérard, Syed Zeeshan Ali, Florin Udrea, Laurent A. Francis, Yun Zeng, Denis Flandre
2017	—	`conf`	Scaling Trends for Dual-Rail Logic Styles Against Side-Channel Attacks: A Case-Study. COSADE Kashif Nawaz, Dina Kamel, François-Xavier Standaert, Denis Flandre
2017	—	`conf`	Single event effects and total ionising dose in 600V Si-on-SiC LDMOS transistors for rad-hard space applications. ESSDERC K. Ben Ali, P. M. Gammon, C. W. Chan, F. Li, V. Pathirana, T. Trajkovic, Farzan Gity, Denis Flandre, Valeria Kilchytska
2016	J	`jnl`	A 16×16 CMOS Capacitive Biosensor Array Towards Detection of Single Bacterial Cell. IEEE Trans. Biomed. Circuits Syst. Numa Couniot, Laurent A. Francis, Denis Flandre
2016	J	`jnl`	Automated Design of a 13.56 MHz 19µW Passive Rectifier With 72% Efficiency Under 10µA load. IEEE J. Solid State Circuits Pierre-Antoine Haddad, Geoffroy Gosset, Jean-Pierre Raskin, Denis Flandre
2016	C	`conf`	Automated design of a 13.56 MHz corner-robust efficient differential drive rectifier for 10 μA load. ISCAS Pierre-Antoine Haddad, Jean-Pierre Raskin, Denis Flandre
2016	—	`conf`	CAMEL: An Ultra-Low-Power VGA CMOS Imager based on a Time-Based DPS Array. ICDSC Thomas Haine, François Stas, Guerric de Streel, Cecilia Gimeno, Denis Flandre, David Bol
2016	—	`conf`	Efficient passive energy harvesters at 950 MHz and 2.45 GHz for 100 μW applications in 65 nm CMOS. ICECS Pierre-Antoine Haddad, Jean-Pierre Raskin, Denis Flandre
2016	J	`jnl`	Experimental and simulation analysis of electrical characteristics of common-source current mirrors implemented with asymmetric self-cascode silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors. IET Circuits Devices Syst. Rafael Assalti, Lígia Martins d'Oliveira, Marcelo Antonio Pavanello, Denis Flandre, Michelly de Souza
2016	—	`conf`	Towards Securing Low-Power Digital Circuits with Ultra-Low-Voltage Vdd Randomizers. SPACE Dina Kamel, Guerric de Streel, Santos Merino Del Pozo, Kashif Nawaz, François-Xavier Standaert, Denis Flandre, David Bol
2015	—	`conf`	A 0.48mm ESSCIRC David Bol, El Hafed Boufouss, Denis Flandre, Julien De Vos
2015	J	`jnl`	A 65 nm 0.5 V DPS CMOS Image Sensor With 17 pJ/Frame.Pixel and 42 dB Dynamic Range for Ultra-Low-Power SoCs. IEEE J. Solid State Circuits Numa Couniot, Guerric de Streel, François Botman, Angelo Kuti Lusala, Denis Flandre, David Bol
2015	J	`jnl`	A 65 nm CMOS Ultra-Low-Power Impulse Radio-Ultra-Wideband Emitter for Short-Range Indoor Localization. J. Low Power Electron. Mohamad Al Kadi Jazairli, Denis Flandre
2015	J	`jnl`	A Capacitance-to-Frequency Converter With On-Chip Passivated Microelectrodes for Bacteria Detection in Saline Buffers Up to 575 MHz. IEEE Trans. Circuits Syst. II Express Briefs Numa Couniot, David Bol, Olivier Poncelet, Laurent A. Francis, Denis Flandre
2015	C	`conf`	Analysis and optimization for dynamic read stability in 28nm SRAM bitcells. ISCAS Ahmed T. Elthakeb, Thomas Haine, Denis Flandre, Yehea Ismail, Hamdy Abd Elhamid, David Bol
2015	J	`jnl`	Diamond layout style impact on SOI MOSFET in high temperature environment. Microelectron. Reliab. Salvador Pinillos Gimenez, Egon Henrique Salerno Galembeck, Christian Renaux, Denis Flandre
2015	—	`conf`	Wide band study of silicon-on-insulator photodiodes on suspended micro-hotplates platforms. ICICDT Nicolas André, Guoli Li, Pierre Gérard, Olivier Poncelet, Yun Zeng, Syed Zeeshan Ali, Florin Udrea, Laurent A. Francis, Denis Flandre
2014	J	`jnl`	A Self-Oscillating System to Measure the Conductivity and the Permittivity of Liquids within a Single Triangular Signal. J. Sensors Sylvain Druart, Denis Flandre, Laurent A. Francis
2014	J	`jnl`	A Sizing Methodology for On-Chip Switched-Capacitor DC/DC Converters. IEEE Trans. Circuits Syst. I Regul. Pap. Julien De Vos, Denis Flandre, David Bol
2014	J	`jnl`	Understanding the limitations and improving the relevance of SPICE simulations in side-channel security evaluations. J. Cryptogr. Eng. Dina Kamel, Mathieu Renauld, Denis Flandre, François-Xavier Standaert
2014	—	`conf`	Variability of UTBB MOSFET analog figures of merit in wide frequency range. ESSDERC Sergej Makovejev, Babak Kazemi Esfeh, Jean-Pierre Raskin, Valeria Kilchytska, Denis Flandre, Vincent Barral, Nicolas Planes, Michel Haond
2013	J	`jnl`	Asymmetric channel doping profile and temperature reduction influence on the performance of current mirrors implemented with FD SOI nMOSFETs. Microelectron. Reliab. Michelly de Souza, Bruna Cardoso Paz, Denis Flandre, Marcelo Antonio Pavanello
2013	—	`conf`	Characterization of ultra-thin silicon strip detectors for hadrontherapy beam monitoring. I2MTC Mohamed Bouterfa, Khaled Aouadi, Denis Flandre, Eduardo Cortina Gil
2013	J	`jnl`	SleepWalker: A 25-MHz 0.4-V Sub-mm IEEE J. Solid State Circuits David Bol, Julien De Vos, Cédric Hocquet, François Botman, François Durvaux, Sarah Boyd, Denis Flandre, Jean-Didier Legat
2013	—	`conf`	Threshold voltage extraction techniques and temperature effect in context of global variability in UTBB mosfets. ESSDERC Sergej Makovejev, Babak Kazemi Esfeh, Jean-Pierre Raskin, Denis Flandre, Valeria Kilchytska, François Andrieu
2013	J	`jnl`	Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference. Sensors El Hafed Boufouss, Laurent A. Francis, Valeria Kilchytska, Pierre Gérard, Pascal Simon, Denis Flandre
2013	J	`jnl`	Validation of a Novel ultra-thin silicon Strip Detector for Hadron Therapy beam Monitoring. J. Circuits Syst. Comput. Mohamed Bouterfa, Denis Flandre
2012	—	`conf`	A 25MHz 7μW/MHz ultra-low-voltage microcontroller SoC in 65nm LP/GP CMOS for low-carbon wireless sensor nodes. ISSCC David Bol, Julien De Vos, Cédric Hocquet, François Botman, François Durvaux, Sarah Boyd, Denis Flandre, Jean-Didier Legat
2012	J	`jnl`	Design of an Ultra-Low-Power Multi-Stage AC/DC Voltage Rectifier and Multiplier Using a Fully-Automated and Portable Design Methodology. J. Low Power Electron. Pierre-Antoine Haddad, Geoffroy Gosset, Denis Flandre
2012	J	`jnl`	High-energy neutrons effect on strained and non-strained SOI MuGFETs and planar MOSFETs. Microelectron. Reliab. Valeria Kilchytska, Joaquín Alvarado, S. Put, Nadine Collaert, Eddy Simoen, Cor Claeys, Otilia Militaru, Guy Berger, Denis Flandre
2012	—	`conf`	On the UTBB SOI MOSFET performance improvement in quasi-double-gate regime. ESSDERC Valeria Kilchytska, Denis Flandre, François Andrieu
2012	J	`jnl`	Pushing Adaptive Voltage Scaling Fully on Chip. J. Low Power Electron. Julien De Vos, Denis Flandre, David Bol
2011	A*	`conf`	A Formal Study of Power Variability Issues and Side-Channel Attacks for Nanoscale Devices. EUROCRYPT Mathieu Renauld, François-Xavier Standaert, Nicolas Veyrat-Charvillon, Dina Kamel, Denis Flandre
2011	J	`jnl`	Characterization and modelling of single event transients in LDMOS-SOI FETs. Microelectron. Reliab. Joaquín Alvarado, Valeria Kilchytska, El Hafed Boufouss, Denis Flandre
2011	J	`jnl`	Fully-Automated and Portable Design Methodology for Optimal Sizing of Energy-Efficient CMOS Voltage Rectifiers. IEEE J. Emerg. Sel. Topics Circuits Syst. Geoffroy Gosset, Denis Flandre
2011	J	`jnl`	Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65 nm AES coprocessor for passive RFID tags. J. Cryptogr. Eng. Cédric Hocquet, Dina Kamel, Francesco Regazzoni, Jean-Didier Legat, Denis Flandre, David Bol, François-Xavier Standaert
2011	J	`jnl`	Impact of neutron irradiation on the RF properties of oxidized high-resistivity silicon substrates with and without a trap-rich passivation layer. Microelectron. Reliab. C. Roda Neve, Valeria Kilchytska, Joaquín Alvarado, Dimitri Lederer, O. Militaru, Denis Flandre, Jean-Pierre Raskin
2011	A	`conf`	Information Theoretic and Security Analysis of a 65-Nanometer DDSLL AES S-Box. CHES Mathieu Renauld, Dina Kamel, François-Xavier Standaert, Denis Flandre
2010	J	`jnl`	Compact model for single event transients and total dose effects at high temperatures for partially depleted SOI MOSFETs. Microelectron. Reliab. Joaquín Alvarado, El Hafed Boufouss, Valeria Kilchytska, Denis Flandre
2010	—	`conf`	Glitch-induced within-die variations of dynamic energy in voltage-scaled nano-CMOS circuits. ESSCIRC Dina Kamel, Cédric Hocquet, François-Xavier Standaert, Denis Flandre, David Bol
2010	J	`jnl`	Nanometer MOSFET Effects on the Minimum-Energy Point of Sub-45nm Subthreshold Logic - Mitigation at Technology and Circuit Levels. ACM Trans. Design Autom. Electr. Syst. David Bol, Denis Flandre, Jean-Didier Legat
2010	C	`conf`	Robustness-aware sleep transistor engineering for power-gated nanometer subthreshold circuits. ISCAS David Bol, Cédric Hocquet, Denis Flandre, Jean-Didier Legat
2010	—	`conf`	The detrimental impact of negative Celsius temperature on ultra-low-voltage CMOS logic. ESSCIRC David Bol, Cédric Hocquet, Denis Flandre, Jean-Didier Legat
2010	J	`jnl`	ULPFA: A New Efficient Design of a Power-Aware Full Adder. IEEE Trans. Circuits Syst. I Regul. Pap. Ilham Hassoune, Denis Flandre, Ian O'Connor, Jean-Didier Legat
2009	J	`jnl`	Interests and Limitations of Technology Scaling for Subthreshold Logic. IEEE Trans. Very Large Scale Integr. Syst. David Bol, Renaud Ambroise, Denis Flandre, Jean-Didier Legat
2009	A	`conf`	Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic. ISLPED David Bol, Dina Kamel, Denis Flandre, Jean-Didier Legat
2009	C	`conf`	Scaling Trends of the AES S-box Low Power Consumption in 130 and 65 nm CMOS Technology Nodes. ISCAS Dina Kamel, François-Xavier Standaert, Denis Flandre
2009	A	`conf`	Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits. ISLPED David Bol, Denis Flandre, Jean-Didier Legat
2008	C	`conf`	Analysis and minimization of practical energy in 45nm subthreshold logic circuits. ICCD David Bol, Renaud Ambroise, Denis Flandre, Jean-Didier Legat
2008	J	`jnl`	Harmonic distortion analysis of double gate graded-channel MOSFETs operating in saturation. Microelectron. J. Rodrigo Trevisoli Doria, Antonio Cerdeira, Jean-Pierre Raskin, Denis Flandre, Marcelo Antonio Pavanello
2008	—	`conf`	Impact of Technology Scaling on Digital Subthreshold Circuits. ISVLSI David Bol, Renaud Ambroise, Denis Flandre, Jean-Didier Legat
2008	—	`conf`	Systematic HDL Design of a Delta-Sigma Fractional-N Phase-Locked Loop for Wireless Applications. ISVLSI Ahmed El Oualkadi, Denis Flandre
2007	—	`conf`	A CMOS High-Q LC Eight-Path Bandpass Filter for Wireless Broadband Applications. ICECS Ahmed El Oualkadi, Jean-Marie Paillot, Said Belkouch, Denis Flandre
2007	—	`conf`	Building Ultra-Low-Power Low-Frequency Digital Circuits with High-Speed Devices. ICECS David Bol, Renaud Ambroise, Denis Flandre, Jean-Didier Legat
2007	J	`jnl`	Dynamic differential self-timed logic families for robust and low-power security ICs. Integr. Ilham Hassoune, François Macé, Denis Flandre, Jean-Didier Legat
2007	J	`jnl`	Efficient Multiple-Valued Signed-Digit Full Adder Based on NDR MOS Structures and its Application to an N-bit Current-Mode Constant-Time Adder. J. Multiple Valued Log. Soft Comput. David Bol, Ilham Hassoune, David Levacq, Denis Flandre, Jean-Didier Legat
2007	J	`jnl`	Harmonic distortion analysis using an improved charge sheet model for PD SOI MOSFETs. Microelectron. J. Joaquín Alvarado, Antonio Cerdeira, Valeria Kilchytska, Denis Flandre
2007	J	`jnl`	Low Leakage SOI CMOS Static Memory Cell With Ultra-Low Power Diode. IEEE J. Solid State Circuits David Levacq, Vincent Dessard, Denis Flandre
2006	J	`jnl`	Cryogenic operation of graded-channel silicon-on-insulator nMOSFETs for high performance analog applications. Microelectron. J. Marcelo Antonio Pavanello, Paula Ghedini Der Agopian, João Antonio Martino, Denis Flandre
2006	J	`jnl`	Gain improvement in operational transconductance amplifiers using Graded-Channel SOI nMOSFETS. Microelectron. J. Salvador Pinillos Gimenez, Marcelo Antonio Pavanello, João Antonio Martino, Denis Flandre
2006	J	`jnl`	Low-swing current mode logic (LSCML): A new logic style for secure and robust smart cards against power analysis attacks. Microelectron. J. Ilham Hassoune, François Macé, Denis Flandre, Jean-Didier Legat
2005	—	`conf`	A low-power 5 GHz CMOS LC-VCO optimized for high-resistivity SOI substrates. ESSCIRC Pierre Delatte, Gonzalo Picun, Laurent Demeus, Pascal Simon, Denis Flandre
2005	—	`conf`	Ultra-low power flip-flops for MTCMOS circuits. ISCAS (5) David Levacq, Vincent Dessard, Denis Flandre
2004	—	`conf`	Investigation of Low-Power Low-Voltage Circuit Techniques for a Hybrid Full-Adder Cell. PATMOS Ilham Hassoune, Amaury Nève, Jean-Didier Legat, Denis Flandre
2004	J	`jnl`	Power-delay product minimization in high-performance 64-bit carry-select adders. IEEE Trans. Very Large Scale Integr. Syst. Amaury Nève, Helmut Schettler, Thomas Ludwig, Denis Flandre
2003	—	`conf`	DNA electrical detection based on inductor resonance frequency in standard CMOS technology. ESSCIRC G. Laurent, Luis Moreno Hagelsieb, Dimitri Lederer, P. E. Lobert, Denis Flandre, José Remacle, Jean-Pierre Raskin
2003	—	`conf`	Design of Operational Transconductance Amplifiers with Improved Gain by Using Graded-Channel SOI nMOSFETs. SBCCI Salvador Pinillos Gimenez, Marcelo Antonio Pavanello, João Antonio Martino, Stephane Adriaensen, Denis Flandre
2003	J	`jnl`	FD MOS SOI circuit to enhance the ratio of illuminated to dark current of a co-integrated a-Si: H photodiode. Microelectron. Reliab. Magali Estrada, A. Afzalian, Denis Flandre, Antonio Cerdeira, Héctor Báez-Medina, A. de Lucca
2003	—	`conf`	MOSFET mismatch in weak/moderate inversion: model needs and implications for analog design. ESSCIRC Laurent Vancaillie, Fernando Silveira, Bernabé Linares-Barranco, Teresa Serrano-Gotarredona, Denis Flandre
2003	J	`jnl`	SOI Technology for Future High-Performance Smart Cards. IEEE Micro Amaury Nève, Denis Flandre, Jean-Jacques Quisquater
2002	—	`conf`	A 110 nA pacemaker sensing channel in CMOS on silicon-on-insulator. ISCAS (5) Fernando Silveira, Denis Flandre
2002	A	`conf`	Design of a branch-based 64-bit carry-select adder in 0.18 µm partially depleted SOI CMOS. ISLPED Amaury Nève, Denis Flandre, Helmut Schettler, Thomas Ludwig, Gerhard Hellner
2002	—	`conf`	Operational Amplifier Power Optimization for a Given Total (Slewing plus Linear) Settling Time. SBCCI Fernando Silveira, Denis Flandre
2001	—	`conf`	Analog Circuit Design Using Graded-Channel SOI NMOSFETS. SBCCI Marcelo Antonio Pavanello, João Antonio Martino, Denis Flandre
2001	C	`conf`	Design of a Branch-Based Carry-Select Adder IP Portable in 0.25 µm Bulk and Silicon-On-Insulator CMOS Technologies. VLSI-SOC Amaury Nève, Denis Flandre
2001	—	`conf`	IF MEMS filters for mobile communication. ETFA (2) E. Quevy, Dimitri Galayko, Bernard Legrand, Christian Renaux, Chantal Combi, Denis Flandre, Lionel Buchaillot, Dominique Collard, B. Vigna, Andreas Kaiser
2001	J	`jnl`	Integrated sensor and electronic circuits in fully depleted SOI technology for high-temperature applications. IEEE Trans. Ind. Electron. Laurent Demeus, Vincent Dessard, Albert Viviani, Stephane Adriaensen, Denis Flandre
2000	—	`conf`	Analysis and Design of a Family of Low-Power Class AB Operational Amplifiers. SBCCI Fernando Silveira, Denis Flandre
2000	—	`conf`	Characterization, Simulation and Modeling of PLL under Irradiation Using HDL-A. BMAS I. Martínez, Pierre Delatte, Denis Flandre
1999	—	`conf`	Feasibility of the Smart Card in Silicon-On-Insulator (SOI) Technology. Smartcard Amaury Nève, Denis Flandre, Jean-Jacques Quisquater
1998	J	`jnl`	Potential and modeling of 1-μm SOI CMOS operational transconductance amplifiers for applications up to 1 GHz. IEEE J. Solid State Circuits Jean-Paul Eggermont, Denis Flandre, Jean-Pierre Raskin, Jean-Pierre Colinge
1997	J	`jnl`	Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology. IEEE J. Solid State Circuits Denis Flandre, Albert Viviani, Jean-Paul Eggermont, Bernard Gentinne, Paul G. A. Jespers
1996	J	`jnl`	A g IEEE J. Solid State Circuits Fernando Silveira, Denis Flandre, Paul G. A. Jespers
1996	J	`jnl`	Design of SOI CMOS operational amplifiers for applications up to 300°C. IEEE J. Solid State Circuits Jean-Paul Eggennont, Denis De Ceuster, Denis Flandre, Bernard Gentinne, Paul G. A. Jespers, Jean-Pierre Colinge