Debora Matos - RankMe

20 papers A 1C 6Journal 3Unranked 10

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	3D MPSoC with On-Chip Cache Support - Design and Exploitation. CoRR Rodrigo Cataldo, César A. M. Marcon, Debora Matos
2016	—	`conf`	Architectural exploration of Last-Level Caches targeting homogeneous multicore systems. SBCCI Rodrigo Cataldo, Guilherme Korol, Ramon Fernandes, Debora Matos, César A. M. Marcon
2016	—	`conf`	Evaluation of emerging TSV-enabled main memories on the PARSEC benchmark. ICECS Rodrigo Cataldo, Guilherme Korol, Ramon Fernandes, Gustavo Sanchez, Debora Matos, César A. M. Marcon
2015	C	`conf`	Performance evaluation of hierarchical NoC topologies for stacked 3D ICs. ISCAS Debora Matos, Max Prass, Márcio Eduardo Kreutz, Luigi Carro, Altamiro Amadeu Susin
2014	C	`conf`	Adaptive multiple switching strategy toward an ideal NoC. ISCAS Debora Matos, Márcio Eduardo Kreutz, Cezar Reinbrecht, Luigi Carro, Altamiro Amadeu Susin
2013	J	`jnl`	A NOC closed-loop performance monitor and adapter. Microprocess. Microsystems Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Márcio Eduardo Kreutz, Fernanda Gusmão de Lima Kastensmidt, Altamiro Amadeu Susin
2013	C	`conf`	A power-efficient hierarchical network-on-chip topology for stacked 3D ICs. VLSI-SoC Debora Matos, Cezar Reinbrecht, Tiago Motta, Altamiro Amadeu Susin
2013	—	`conf`	Combining fault tolerance and serialization effort to improve yield in 3D Networks-on-Chip. ICECS Anelise Kologeski, Caroline Concatto, Debora Matos, Daniel Grehs, Tiago Motta, Felipe Almeida, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Ricardo Reis
2013	—	`conf`	Hierarchical and Multiple Switching NoC with Floorplan Based Adaptability. ARC Debora Matos, Cezar Reinbrecht, Márcio Eduardo Kreutz, Gianluca Palermo, Luigi Carro, Altamiro Amadeu Susin
2012	C	`conf`	Floorplan-aware hierarchical NoC topology with GALS interfaces. ISCAS Debora Matos, Cezar Reinbrecht, Gianluca Palermo, Jonathan Martinelli, Altamiro Amadeu Susin, Cristina Silvano, Luigi Carro
2011	A	`conf`	A new reconfigurable clock-gating technique for low power SRAM-based FPGAs. DATE Luca Sterpone, Luigi Carro, Debora Matos, Stephan Wong, F. Fakhar
2011	—	`conf`	Floorplanning-aware design space exploration for application-specific hierarchical networks on-chip. NoCArc@MICRO Debora Matos, Gianluca Palermo, Vittorio Zaccaria, Cezar Reinbrecht, Altamiro Amadeu Susin, Cristina Silvano, Luigi Carro
2011	J	`jnl`	Reconfigurable Routers for Low Power and High Performance. IEEE Trans. Very Large Scale Integr. Syst. Debora Matos, Caroline Concatto, Márcio Eduardo Kreutz, Fernanda Lima Kastensmidt, Luigi Carro, Altamiro Amadeu Susin
2010	C	`conf`	Associating packets of heterogeneous cores using a synchronizer wrapper for NoCs. ISCAS Debora Matos, Luigi Carro, Altamiro Amadeu Susin
2010	—	`conf`	Monitor-adapter coupling for NOC performance tuning. ICSAMOS Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Márcio Eduardo Kreutz
2010	C	`conf`	Network interface to synchronize multiple packets on NoC-based Systems-on-Chip. VLSI-SoC Debora Matos, Miklecio Costa, Luigi Carro, Altamiro Amadeu Susin
2009	—	`conf`	Adaptive router architecture based on traffic behavior observability. NoCArc@MICRO Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Márcio Eduardo Kreutz
2009	—	`conf`	Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router. SBCCI Caroline Concatto, Debora Matos, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Érika F. Cota, Márcio Eduardo Kreutz
2009	—	`conf`	NoC Power Optimization Using a Reconfigurable Router. ISVLSI Caroline Concatto, Debora Matos, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Márcio Eduardo Kreutz
2009	—	`conf`	The Need for Reconfigurable Routers in Networks-on-Chip. ARC Debora Matos, Caroline Concatto, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin