Debjyoti Bhattacharjee

62 papers A 10C 6Misc 6Journal 24Unranked 15

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A Survey of End-to-End Modeling for Distributed DNN Training: Workloads, Simulators, and TCO. CoRR Jonas Svedas, Hannah Watson, Nathan Laubeuf, Diksha Moolchandani, Abubakr Nada, Arjun Singh, Dwaipayan Biswas, James Myers, Debjyoti Bhattacharjee
2025	A	`conf`	A System Level Performance Evaluation for Superconducting Digital Systems. DATE Joyjit Kundu, Debjyoti Bhattacharjee, Nathan Josephsen, Ankit Pokhrel, Udara De Silva, Wenzhe Guo, Steven Van Winckel, Steven Brebels, Quentin Herr, Anna Herr, Manu Perumkunnil
2025	J	`jnl`	Addressing memory bandwidth scalability in vector processors for streaming applications. CoRR Jordi Altayo, Paul Delestrac, David Novo, Simey Yang, Debjyoti Bhattacharjee, Francky Catthoor
2025	J	`jnl`	Decoupled Control Flow and Data Access in RISC-V GPGPUs. CoRR Giuseppe Maria Sarda, Nimish Shah, Abubakr Nada, Debjyoti Bhattacharjee, Marian Verhelst
2025	J	`jnl`	Linear Decomposition of the Majority Boolean Function using the Ones on Smaller Variables. CoRR Anupam Chattopadhyay, Debjyoti Bhattacharjee, Subhamoy Maitra
2024	J	`jnl`	A System Level Performance Evaluation for Superconducting Digital Systems. CoRR Joyjit Kundu, Debjyoti Bhattacharjee, Nathan Josephsen, Ankit Pokhrel, Udara De Silva, Wenzhe Guo, Steven Van Winckel, Steven Brebels, Manu Perumkunnil, Quentin Herr, Anna Herr
2024	C	`conf`	Adaptive Block-Scaled GeMMs on Vector Processors for DNN Training at the Edge. VLSI-SoC Nitish Satya Murthy, Nathan Laubeuf, Debjyoti Bhattacharjee, Francky Catthoor, Marian Verhelst
2024	—	`conf`	Analyzing GPU Energy Consumption in Data Movement and Storage. ASAP Paul Delestrac, Jonathan Miquel, Debjyoti Bhattacharjee, Diksha Moolchandani, Francky Catthoor, Lionel Torres, David Novo
2024	—	`conf`	Efficient DNN Training Using Vectorized Block-Scaled GeMMs with Adaptive Block Shapes. VLSI-SoC (Selected Papers) Nitish Satya Murthy, Nathan Laubeuf, Debjyoti Bhattacharjee, Francky Catthoor, Marian Verhelst
2024	J	`jnl`	Full-stack evaluation of Machine Learning inference workloads for RISC-V systems. CoRR Debjyoti Bhattacharjee, Anmol, Tommaso Marinelli, Karan Pathak, Peter Kourzanov
2024	A	`conf`	Multi-Level Analysis of GPU Utilization in ML Training Workloads. DATE Paul Delestrac, Debjyoti Bhattacharjee, Simei Yang, Diksha Moolchandani, Francky Catthoor, Lionel Torres, David Novo
2024	J	`jnl`	Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis. CoRR Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst
2024	—	`conf`	RTL Agent: An Agent-Based Approach for Functionally Correct HDL Generation via LLMs. ATS Sriram Ranga, Rui Mao, Debjyoti Bhattacharjee, Erik Cambria, Anupam Chattopadhyay
2024	J	`jnl`	SAfEPaTh: A System-Level Approach for Efficient Power and Thermal Estimation of Convolutional Neural Network Accelerator. CoRR Yukai Chen, Simei Yang, Debjyoti Bhattacharjee, Francky Catthoor, Arindam Mallik
2024	J	`jnl`	Synthesis Techniques for Fault-tolerant Quantum Circuit Implementation using Clifford+ ACM Trans. Quantum Comput. Laxmidhar Biswal, Debjyoti Bhattacharjee, Amlan Chakrabarti, Anupam Chattopadhyay
2023	J	`jnl`	AIMC Modeling and Parameter Tuning for Layer-Wise Optimal Operating Point in DNN Inference. IEEE Access Iman Dadras, Giuseppe Maria Sarda, Nathan Laubeuf, Debjyoti Bhattacharjee, Arindam Mallik
2023	J	`jnl`	DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge. IEEE J. Solid State Circuits Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
2023	J	`jnl`	Improved Linear Decomposition of Majority and Threshold Boolean Functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Anupam Chattopadhyay, Debjyoti Bhattacharjee, Subhamoy Maitra
2023	—	`conf`	Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis. IISWC Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst
2022	J	`jnl`	AERO: Design Space Exploration Framework for Resource-Constrained CNN Mapping on Tile-Based Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. Simei Yang, Debjyoti Bhattacharjee, Vinay B. Y. Kumar, Saikat Chatterjee, Sayandip De, Peter Debacker, Diederik Verkest, Arindam Mallik, Francky Catthoor
2022	—	`conf`	DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC. ISSCC Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian Piedrahita Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
2022	J	`jnl`	Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration. ACM Trans. Design Autom. Electr. Syst. Nathan Laubeuf, Jonas Doevenspeck, Ioannis A. Papistas, Michele Caselli, Stefan Cosemans, Peter Vrancx, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Francky Catthoor, Rudy Lauwereins
2022	C	`conf`	Tiny ci-SAR A/D Converter for Deep Neural Networks in Analog in-Memory Computation. ISCAS Michele Caselli, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest
2021	C	`conf`	Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration. ISCAS Debjyoti Bhattacharjee, Nathan Laubeuf, Stefan Cosemans, Ioannis A. Papistas, Arindam Mallik, Peter Debacker, Myung Hee Na, Diederik Verkest
2021	Misc	`conf`	In-memory realization of SHA-2 using ReVAMP architecture. VLSID Debjyoti Bhattacharjee, Anirban Majumder, Anupam Chattopadhyay
2021	A	`conf`	Perspectives on Emerging Computation-in-Memory Paradigms. DATE Shubham Rai, Mengyun Liu, Anteneh Gebregiorgis, Debjyoti Bhattacharjee, Krishnendu Chakrabarty, Said Hamdioui, Anupam Chattopadhyay, Jens Trommer, Akash Kumar
2020	A	`conf`	CONTRA: Area-Constrained Technology Mapping Framework For Memristive Memory Processing Unit. ICCAD Debjyoti Bhattacharjee, Anupam Chattopadhyay, Srijit Dutta, Ronny Ronen, Shahar Kvatinsky
2020	J	`jnl`	CONTRA: Area-Constrained Technology Mapping Framework For Memristive Memory Processing Unit. CoRR Debjyoti Bhattacharjee, Anupam Chattopadhyay, Srijit Dutta, Ronny Ronen, Shahar Kvatinsky
2020	J	`jnl`	Crossbar-Constrained Technology Mapping for ReRAM Based In-Memory Computing. IEEE Trans. Computers Debjyoti Bhattacharjee, Yaswanth Tavva, Arvind Easwaran, Anupam Chattopadhyay
2020	Misc	`conf`	Efficient Quantum Circuits for Square-Root and Inverse Square-Root. VLSID Srijit Dutta, Yaswanth Tavva, Debjyoti Bhattacharjee, Anupam Chattopadhyay
2020	J	`jnl`	SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rotem Ben Hur, Ronny Ronen, Ameer Haj Ali, Debjyoti Bhattacharjee, Adi Eliahu, Natan Peled, Shahar Kvatinsky
2019	—	`conf`	Accelerating Binary-Matrix Multiplication on FPGA. SoCC Debjyoti Bhattacharjee, Anupam Chattopadhyay, Ricardo Jack Liwongan
2019	A	`conf`	MUQUT: Multi-Constraint Quantum Circuit Mapping on NISQ Computers: Invited Paper. ICCAD Debjyoti Bhattacharjee, Abdullah Ash-Saki, Mahabubul Alam, Anupam Chattopadhyay, Swaroop Ghosh
2019	J	`jnl`	New techniques for fault-tolerant decomposition of Multi-Controlled Toffoli gate. CoRR Laxmidhar Biswal, Debjyoti Bhattacharjee, Anupam Chattopadhyay, Hafizur Rahaman
2019	—	`conf`	Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis. ISMVL Debjyoti Bhattacharjee, Mathias Soeken, Srijit Dutta, Anupam Chattopadhyay, Giovanni De Micheli
2019	A	`conf`	SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars. DATE Valerio Tenace, Roberto Giorgio Rizzo, Debjyoti Bhattacharjee, Anupam Chattopadhyay, Andrea Calimera
2018	—	`—`	Architectures and automation for beyond-CMOS technologies Debjyoti Bhattacharjee
2018	J	`jnl`	Crossbar-Constrained Technology Mapping for ReRAM based In-Memory Computing. CoRR Debjyoti Bhattacharjee, Yaswanth Tavva, Arvind Easwaran, Anupam Chattopadhyay
2018	Misc	`conf`	Floating Point Multiplication Mapping on ReRAM Based In-memory Computing Architecture. VLSID Tarun Vatwani, Arko Dutt, Debjyoti Bhattacharjee, Anupam Chattopadhyay
2018	J	`jnl`	Kogge-Stone Adder Realization using 1S1R Resistive Switching Crossbar Arrays. ACM J. Emerg. Technol. Comput. Syst. Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Stephan Menzel, Anupam Chattopadhyay
2018	—	`conf`	MAMI: Majority and Multi-Input Logic on Memristive Crossbar Array. APCCAS Debjyoti Bhattacharjee, Arko Dutt, Anupam Chattopadhyay
2018	J	`jnl`	Quantum Circuits for Toom-Cook Multiplication. CoRR Srijit Dutta, Debjyoti Bhattacharjee, Anupam Chattopadhyay
2018	—	`conf`	ReRAM Based In-Memory Computation of Single Bit Error Correcting BCH Code. VLSI-SoC (Selected Papers) Swagata Mandal, Yaswanth Tavva, Debjyoti Bhattacharjee, Anupam Chattopadhyay
2018	C	`conf`	ReRAM-based In-Memory Computation of Galois Field arithmetic. VLSI-SoC Swagata Mandal, Debjyoti Bhattacharjee, Yaswanth Tavva, Anupam Chattopadhyay
2018	—	`conf`	Synthesis of Multi-valued Literal Using Lukasiewicz Logic. ISMVL Anmol Prakash Surhonne, Debjyoti Bhattacharjee, Anupam Chattopadhyay
2018	—	`conf`	Synthesis, Technology Mapping and Optimization for Emerging Technologies. ISVLSI Debjyoti Bhattacharjee, Anupam Chattopadhyay
2018	A	`conf`	Technology-aware logic synthesis for ReRAM based in-memory computing. DATE Debjyoti Bhattacharjee, Luca G. Amarù, Anupam Chattopadhyay
2017	—	`conf`	Area-constrained technology mapping for in-memory computing using ReRAM devices. ASP-DAC Debjyoti Bhattacharjee, Arvind Easwaran, Anupam Chattopadhyay
2017	J	`jnl`	Depth-Optimal Quantum Circuit Placement for Arbitrary Topologies. CoRR Debjyoti Bhattacharjee, Anupam Chattopadhyay
2017	Misc	`conf`	Efficient Binary Basic Linear Algebra Operations on ReRAM Crossbar Arrays. VLSID Debjyoti Bhattacharjee, Anupam Chattopadhyay
2017	J	`jnl`	Efficient complementary resistive switch-based crossbar array Booth multiplier. Microelectron. J. Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Anupam Chattopadhyay
2017	A	`conf`	ReVAMP: ReRAM based VLIW architecture for in-memory computing. DATE Debjyoti Bhattacharjee, Rajeswari Devadoss, Anupam Chattopadhyay
2017	—	`conf`	SHA-3 implementation using ReRAM based in-memory computing architecture. ISQED Debjyoti Bhattacharjee, Vikramkumar Pudi, Anupam Chattopadhyay
2016	A	`conf`	Delay-optimal technology mapping for in-memory computing using ReRAM devices. ICCAD Debjyoti Bhattacharjee, Anupam Chattopadhyay
2016	A	`conf`	EAST: Efficient Assertion Simulation techniques. DATE Debjyoti Bhattacharjee, Soumi Chattopadhyay, Ansuman Banerjee
2016	—	`conf`	Efficient implementation of multiplexer and priority multiplexer using 1S1R ReRAM crossbar arrays. MWSCAS Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Stephan Menzel, Anupam Chattopadhyay
2016	C	`conf`	Enabling in-memory computation of binary BLAS using ReRAM crossbar arrays. VLSI-SoC Debjyoti Bhattacharjee, Farhad Merchant, Anupam Chattopadhyay
2016	—	`conf`	Ensemble Classifier based approach for Code-Mixed Cross-Script Question Classification. FIRE (Working Notes) Debjyoti Bhattacharjee, Paheli Bhattacharya
2016	C	`conf`	Hardware Accelerator for Stream Cipher Spritz. SECRYPT Debjyoti Bhattacharjee, Anupam Chattopadhyay
2015	J	`jnl`	Comparison Between an HVS Inspired Linear Filter and the Bilateral Filter in Performing "Vision at a Glance" through Smoothing with Edge Preservation. Int. J. Image Graph. Debjyoti Bhattacharjee, Ashish Bakshi, Kuntal Ghosh
2015	Misc	`conf`	EvoDeb: Debugging Evolving Hardware Designs. VLSID Debjyoti Bhattacharjee, Ansuman Banerjee, Anupam Chattopadhyay
2014	Misc	`conf`	Efficient Hardware Accelerator for AEGIS-128 Authenticated Encryption. Inscrypt Debjyoti Bhattacharjee, Anupam Chattopadhyay