Debasri Saha - RankMe

54 papers A 2C 3Misc 5Journal 26Unranked 18

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	AFarePart: Accuracy-aware Fault-resilient Partitioner for DNN Edge Accelerators. CoRR Mukta Debnath, Krishnendu Guha, Debasri Saha, Amlan Chakrabarti, Susmita Sur-Kolay
2025	J	`jnl`	GreyConE+: Efficient Rare-Target Test Generation for FPGA HLS Designs. ACM Trans. Reconfigurable Technol. Syst. Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha, Susmita Sur-Kolay
2024	—	`conf`	Aggregate Encryption Individual Decryption for FPGA Bitstream Protection on Cloud. SEED Mukta Debnath, Krishnendu Guha, Debasri Saha, Susmita Sur-Kolay
2024	J	`jnl`	Scalable Test Generation to Trigger Rare Targets in High-Level Synthesizable IPs for Cloud FPGAs. CoRR Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha, Susmita Sur-Kolay
2023	J	`jnl`	AgEncID: Aggregate Encryption Individual Decryption of Key for FPGA Bitstream IP Cores in Cloud. CoRR Mukta Debnath, Krishnendu Guha, Debasri Saha, Susmita Sur-Kolay
2022	J	`jnl`	Faster search of clustered marked states with lackadaisical quantum walks. Quantum Inf. Process. Amit Saha, Ritajit Majumdar, Debasri Saha, Amlan Chakrabarti, Susmita Sur-Kolay
2022	A	`conf`	GreyConE: Greybox Fuzzing + Concolic Execution Guided Test Generation for High Level Designs. ITC Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha, Susmita Sur-Kolay
2022	J	`jnl`	Test Generation for SystemC designs by interlaced Greybox Fuzzing and Concolic Execution. CoRR Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha, Susmita Sur-Kolay
2021	—	`conf`	"Fog-Miner" Based Resource Aware scalable Framework Development in IoT platform. iSES Piyali Ganguly, Amlan Chakrabarti, Debasri Saha
2021	J	`jnl`	Circuit Design for k-Coloring Problem and Its Implementation in Any Dimensional Quantum System. SN Comput. Sci. Amit Saha, Debasri Saha, Amlan Chakrabarti
2021	J	`jnl`	Circuit Design for k-coloring Problem and Its Implementation in Any Dimensional Quantum System. CoRR Amit Saha, Debasri Saha, Amlan Chakrabarti
2021	J	`jnl`	FuCE: Fuzzing+Concolic Execution guided Trojan Detection in Synthesizable Hardware Designs. CoRR Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha, Susmita Sur-Kolay
2021	J	`jnl`	Minimization of WCRT with Recovery Assurance from Hardware Trojans for Tasks on FPGA-based Cloud. ACM Trans. Embed. Comput. Syst. Debasri Saha, Susmita Sur-Kolay
2020	Misc	`conf`	A Multi-Agent Co-operative Model to Facilitate Criticality based Reliability for Mixed Critical Task Execution on FPGA based Cloud Environment. VLSID Krishnendu Guha, Debasri Saha, Amlan Chakrabarti
2020	J	`jnl`	Asymptotically Improved Grover's Algorithm in any Dimensional Quantum System with Novel Decomposed n-qudit Toffoli Gate. CoRR Amit Saha, Ritajit Majumdar, Debasri Saha, Amlan Chakrabarti, Susmita Sur-Kolay
2020	A	`conf`	Blockchain Technology Enabled Pay Per Use Licensing Approach for Hardware IPs. DATE Krishnendu Guha, Debasri Saha, Amlan Chakrabarti
2020	J	`jnl`	Circuit Design for K-coloring Problem and it's Implementation on Near-term Quantum Devices. CoRR Amit Saha, Debasri Saha, Amlan Chakrabarti
2020	—	`conf`	Circuit Design for K-coloring Problem and its Implementation on Near-term Quantum Devices. iSES Amit Saha, Debasri Saha, Amlan Chakrabarti
2020	J	`jnl`	Dynamic power-aware scheduling of real-time tasks for FPGA-based cyber physical systems against power draining hardware trojan attacks. J. Supercomput. Krishnendu Guha, Atanu Majumder, Debasri Saha, Amlan Chakrabarti
2020	C	`conf`	Ensuring Green Computing in Reconfigurable Hardware based Cloud Platforms from Hardware Trojan Attacks. TENCON Krishnendu Guha, Atanu Majumder, Debasri Saha, Amlan Chakrabarti
2019	J	`jnl`	A CAD approach for pre-layout optimal PDN design and its post-layout verification. Microprocess. Microsystems Moumita Chakraborty, Debasri Saha, Amlan Chakrabarti, Sayani Bindai
2019	J	`jnl`	Criticality based reliability against hardware Trojan attacks for processing of tasks on reconfigurable hardware. Microprocess. Microsystems Krishnendu Guha, Atanu Majumder, Debasri Saha, Amlan Chakrabarti
2019	J	`jnl`	Guided GA-Based Multiobjective Optimization of Placement and Assignment of TSVs in 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. Debasri Saha, Susmita Sur-Kolay
2019	J	`jnl`	Stigmergy-Based Security for SoC Operations From Runtime Performance Degradation of SoC Components. ACM Trans. Embed. Comput. Syst. Krishnendu Guha, Debasri Saha, Amlan Chakrabarti
2019	C	`conf`	Zero Knowledge Authentication for Reuse of IPs in Reconfigurable Platforms. TENCON Krishnendu Guha, Debasri Saha, Amlan Chakrabarti
2018	—	`conf`	FPGA-Based Novel Speech Enhancement System Using Microphone Activity Detector. ACSS (1) Tanmay Biswas, Shuvadeep Bhattacharjee, Sudhindu Bikash Mandal, Debasri Saha, Amlan Chakrabarti
2018	C	`conf`	Reliability Driven Mixed Critical Tasks Processing on FPGAs Against Hardware Trojan Attacks. DSD Krishnendu Guha, Atanu Majumder, Debasri Saha, Amlan Chakrabarti
2018	—	`conf`	SARP: Self Aware Runtime Protection Against Integrity Attacks of Hardware Trojans. VDAT Krishnendu Guha, Debasri Saha, Amlan Chakrabarti
2017	—	`conf`	A CAD approach for on-chip PDN with power and supply noise reduction for multi-voltage SOCS in pre-layout stage. ISED Moumita Chakraborty, Debasri Saha, Amlan Chakrabarti
2017	J	`jnl`	Coherence based dual microphone speech enhancement technique using FPGA. Microprocess. Microsystems Tanmay Biswas, Sudhindu Bikash Mandal, Debasri Saha, Amlan Chakrabarti
2017	—	`conf`	Dual Microphone Sound Source Localization Using Reconfigurable Hardware. CICBA (1) Tanmay Biswas, Sudhindu Bikash Mandal, Debasri Saha, Amlan Chakrabarti
2017	Misc	`conf`	Multi-objective Optimization of Placement and Assignment of TSVs in 3D ICs. VLSID Debasri Saha, Susmita Sur-Kolay
2017	J	`jnl`	Real-Time SoC Security against Passive Threats Using Crypsis Behavior of Geckos. ACM J. Emerg. Technol. Comput. Syst. Krishnendu Guha, Debasri Saha, Amlan Chakrabarti
2017	Misc	`conf`	Self Aware SoC Security to Counteract Delay Inducing Hardware Trojans at Runtime. VLSID Krishnendu Guha, Debasri Saha, Amlan Chakrabarti
2016	J	`jnl`	Embedding of signatures in reconfigurable scan architecture for authentication of intellectual properties in system-on-chip. IET Comput. Digit. Tech. Debasri Saha, Susmita Sur-Kolay
2016	—	`conf`	Pre-layout module wise decap allocation for noise suppression and accurate delay estimation of SoC. VDAT Moumita Chakraborty, Amlan Chakrabarti, Partha Mitra, Debasri Saha, Krishnendu Guha
2015	—	`conf`	Adaptive Multilayer Routing for Incremental Design of an SoC. FICTA Debasri Saha
2015	J	`jnl`	Pre-Layout Decoupling Capacitance Estimation and Allocation for Noise-Aware Crypto-System on Chip Applications. J. Low Power Electron. Moumita Chakraborty, Krishnendu Guha, Debasri Saha, Partha Mitra, Amlan Chakrabarti
2015	—	`conf`	RTNA: Securing SOC architectures from confidentiality attacks at runtime using ART1 neural networks. VDAT Krishnendu Guha, Debasri Saha, Amlan Chakrabarti
2015	J	`jnl`	Watermarking in Hard Intellectual Property for Pre-Fab and Post-Fab Verification. IEEE Trans. Very Large Scale Integr. Syst. Debasri Saha, Susmita Sur-Kolay
2014	—	`conf`	Analysis of Secret Key Revealing Trojan Using Path Delay Analysis for Some Cryptocores. FICTA (2) Krishnendu Guha, Romio Rosan Sahani, Moumita Chakraborty, Amlan Chakrabarti, Debasri Saha
2014	—	`conf`	Analysis of power distribution network for some cryptocores. ICACCI Moumita Chakraborty, Krishnendu Guha, Amlan Chakrabarti, Debasri Saha
2014	—	`conf`	Trusted sharing of intellectual property in electronic hardware design. WESS Debasri Saha, Susmita Sur-Kolay
2012	J	`jnl`	Secure Public Verification of IP Marks in FPGA Design Through a Zero-Knowledge Protocol. IEEE Trans. Very Large Scale Integr. Syst. Debasri Saha, Susmita Sur-Kolay
2011	J	`jnl`	Cone-based placement for field programmable gate arrays. IET Comput. Digit. Tech. Pritha Banerjee, Debasri Saha, Susmita Sur-Kolay
2011	J	`jnl`	SoC: A Real Platform for IP Reuse, IP Infringement, and IP Protection. VLSI Design Debasri Saha, Susmita Sur-Kolay
2010	Misc	`conf`	A Unified Approach for IP Protection across Design Phases in a Packaged Chip. VLSI Design Debasri Saha, Susmita Sur-Kolay
2010	J	`jnl`	Robust intellectual property protection of VLSI physical design. IET Comput. Digit. Tech. Debasri Saha, Susmita Sur-Kolay
2009	Misc	`conf`	Encoding of Floorplans through Deterministic Perturbation. VLSI Design Debasri Saha, Susmita Sur-Kolay
2009	—	`conf`	Secure Leakage-Proof Public Verification of IP Marks in VLSI Physical Design. ISVLSI Debasri Saha, Susmita Sur-Kolay
2008	—	`conf`	An Analytical Approach to Direct IP Protection of VLSI Floorplans. ICIIS Debasri Saha, Susmita Sur-Kolay
2007	—	`conf`	A Novel Scheme for Encoding and Watermark Embedding in VLSI Physical Design for IP Protection. ICCTA Debasri Saha, Parthasarathi Dasgupta, Susmita Sur-Kolay, Samar Sen-Sarma
2007	—	`conf`	Fast Robust Intellectual Property Protection for VLSI Physical Design. ICIT Debasri Saha, Susmita Sur-Kolay
2006	—	`conf`	A Mimetic Algorithm for Refinement of Lower Bound of Number of Tracks in Channel Routing Problem. IIP Debasri Saha, Rajat Kumar Pal, Samar Sen-Sarma