Davide Marano

26 papers C 6Journal 11Unranked 9
YearRankTypeTitle / Venue / Authors
2022 J jnl
Single miller capacitor frequency compensation techniques: Theoretical comparison and critical review.
Int. J. Circuit Theory Appl.
Alfio Dario Grasso, Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2018 J jnl
High-Performance Three-Stage Single-Miller CMOS OTA With No Upper Limit of C
IEEE Trans. Circuits Syst. II Express Briefs
Alfio Dario Grasso, Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2018 — conf
Three-stage single-miller CMOS OTA driving 10 nF with 1.46-MHz GBW.
ICICDT
Alfio Dario Grasso, Gaetano Palumbo, Salvatore Pennisi, Davide Marano
2017 — conf
Novel straightforward and effective extraction methodology for SiPM model parameters.
ECCTD
Davide Marano, Alfio Dario Grasso
2016 — conf
A 0.003-mm
ICECS
Davide Marano, Alfio Dario Grasso, Gaetano Palumbo, Salvatore Pennisi
2016 — conf
Enhanced analytical model and output dynamic response of SiPM-Based electronic read-outs.
ICECS
Davide Marano, Alfio Dario Grasso
2016 J jnl
Optimized Active Single-Miller Capacitor Compensation With Inner Half-Feedforward Stage for Very High-Load Three-Stage OTAs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Davide Marano, Alfio Dario Grasso, Gaetano Palumbo, Salvatore Pennisi
2016 J jnl
Symbolic factorization methodology for multistage amplifier transfer functions.
Int. J. Circuit Theory Appl.
Alfio Dario Grasso, Davide Marano, Salvatore Pennisi, Giorgio Antonino Vazzana
2015 — conf
195-nW 120-dB subthreshold CMOS OTA driving up to 200 pF and occupying only 4.4-10-3 mm2.
ICECS
Alfio Dario Grasso, Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2015 — conf
A new enhanced PSPICE implementation of the equivalent circuit model of SiPM detectors.
NEWCAS
Davide Marano, Giovanni Bonanno, S. Garozzo, Giuseppe Romeo, Alfio Dario Grasso, Gaetano Palumbo, Salvatore Pennisi
2015 J jnl
Design Methodology of Subthreshold Three-Stage CMOS OTAs Suitable for Ultra-Low-Power Low-Area and High Driving Capability.
IEEE Trans. Circuits Syst. I Regul. Pap.
Alfio Dario Grasso, Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2014 — conf
A new accurate analytical expression for the SiPM transient response to single photons.
ICECS
Davide Marano, Giovanni Bonanno, Massimiliano Belluso, Sergio Billotta, Alessandro Grillo, S. Garozzo, Giuseppe Romeo, Alfio Dario Grasso, Salvatore Pennisi, Gaetano Palumbo
2014 J jnl
Self-Biased Dual-Path Push-Pull Output Buffer Amplifier for LCD Column Drivers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Alfio Dario Grasso, Davide Marano, Fermin Esparza-Alfaro, Antonio J. López-Martín, Gaetano Palumbo, Salvatore Pennisi
2011 C conf
Self-biased dual-path push-pull output buffer amplifier topology for LCD driver applications.
ISCAS
Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2010 C conf
A novel low-power high-speed rail-to-rail class-B buffer amplifier for LCD output drivers.
ISCAS
Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2010 J jnl
Analytical comparison of reversed nested Miller frequency compensation techniques.
Int. J. Circuit Theory Appl.
Alfio Dario Grasso, Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2010 C conf
Analytical figure of merit evaluation of RNMC networks for low-power three-stage OTAs.
ISCAS
Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2010 J jnl
Improved Low-Power High-Speed Buffer amplifier with slew-Rate Enhancement for LCD Applications.
J. Circuits Syst. Comput.
Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2010 C conf
Low-power dual-active class-AB buffer amplifier with self-biasing network for LCD column drivers.
ISCAS
Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2010 J jnl
Step-response optimisation techniques for low-power, high-load, three-stage operational amplifiers driving large capacitive loads.
IET Circuits Devices Syst.
Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2009 C conf
A New Advanced RNMC Technique with Dual-active Current and Voltage Buffers for Low-power High-load Three-stage Amplifiers.
ISCAS
Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2009 — conf
A high-speed low-power output buffer amplifier for large-size LCD applications.
ICECS
Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2009 — conf
An efficient RNM compensation topology with voltage buffer and nulling resistors for large-capacitive-load three-stage OTAs.
ICECS
Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2009 J jnl
Improved Power-Efficient RNMC Technique with voltage Buffer and Nulling resistors for Low-Power High-Load Three-Stage amplifiers.
J. Circuits Syst. Comput.
Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2009 C conf
Step-response Optimization Techniques for Low-power Three-stage Operational Amplifiers for Large Capacitive Load Applications.
ISCAS
Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2007 J jnl
Improved Reversed Nested Miller Frequency Compensation Technique With Voltage Buffer and Resistor.
IEEE Trans. Circuits Syst. II Express Briefs
Alfio Dario Grasso, Davide Marano, Gaetano Palumbo, Salvatore Pennisi