Davide Bellizia

38 papers A 1C 2Journal 24Unranked 10
YearRankTypeTitle / Venue / Authors
2025 J jnl
Exploiting Body-Driven Feedbacks in Physical Unclonable Functions for Ultra Low Voltage, Ultra Low Power Applications: A 0.3 V Weak-PUF.
IEEE Trans. Circuits Syst. I Regul. Pap.
Riccardo Della Sala, Davide Bellizia, Francesco Centurelli, Giuseppe Scotti, Alessandro Trifiletti
2025 A conf
Power Side-Channel Vulnerabilities of a RISC-V Cryptography Accelerator Integrated into CVA6 via Core-V eXtension Interface (CV-X-IF).
ITC
Behnam Farnaghinejad, Davide Bellizia, Alessandra Dolmeta, Guido Masera, Antonio Porsia, Annachiara Ruospo, Stefano Di Carlo, Alessandro Savino, Ernesto Sánchez
2024 J jnl
Unveiling the True Power of the Latched Ring Oscillator for a Unified PUF and TRNG Architecture.
IEEE Trans. Very Large Scale Integr. Syst.
Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti
2023 J jnl
An In-Depth Evaluation of Externally Amplified Coupling (EAC) Attacks - A Concrete Threat for Masked Cryptographic Implementations.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ofek Gur, Tomer Gross, Davide Bellizia, François-Xavier Standaert, Itamar Levi
2022 J jnl
A Lightweight FPGA Compatible Weak-PUF Primitive Based on XOR Gates.
IEEE Trans. Circuits Syst. II Express Briefs
Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti
2022 J jnl
A Novel Ultra-Compact FPGA-Compatible TRNG Architecture Exploiting Latched Ring Oscillators.
IEEE Trans. Circuits Syst. II Express Briefs
Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti
2022 J jnl
High-Throughput FPGA-Compatible TRNG Architecture Exploiting Multistimuli Metastable Cells.
IEEE Trans. Circuits Syst. I Regul. Pap.
Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti
2022 J jnl
Tight-ES-TRNG: Improved Construction and Robustness Analysis.
SN Comput. Sci.
Itamar Levi, Davide Bellizia, François-Xavier Standaert
2022 J jnl
When Bad News Become Good News Towards Usable Instances of Learning with Physical Errors.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Davide Bellizia, Clément Hoffmann, Dina Kamel, Pierrick Méaux, François-Xavier Standaert
2021 J jnl
A Novel Ultra-Compact FPGA PUF: The DD-PUF.
Cryptogr.
Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti
2021 J jnl
Learning Parity with Physical Noise: Imperfections, Reductions and FPGA Prototype.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Davide Bellizia, Clément Hoffmann, Dina Kamel, Hanlin Liu, Pierrick Méaux, François-Xavier Standaert, Yu Yu
2021 — conf
Post-Quantum Cryptography: Challenges and Opportunities for Robust and Secure HW Design.
DFT
Davide Bellizia, Nadia El Mrabet, Apostolos P. Fournaris, Simon Pontié, Francesco Regazzoni, François-Xavier Standaert, Élise Tasso, Emanuele Valea
2021 J jnl
SC-DDPL as a Countermeasure against Static Power Side-Channel Attacks.
Cryptogr.
Davide Bellizia, Riccardo Della Sala, Giuseppe Scotti
2021 J jnl
Side-channel analysis of a learning parity with physical noise processor.
J. Cryptogr. Eng.
Dina Kamel, Davide Bellizia, Olivier Bronchain, François-Xavier Standaert
2021 C conf
Towards a Better Understanding of Side-Channel Analysis Measurements Setups.
CARDIS
Davide Bellizia, Balazs Udvarhelyi, François-Xavier Standaert
2020 — conf
A Systematic Appraisal of Side Channel Evaluation Strategies.
SSR
Melissa Azouaoui, Davide Bellizia, Ileana Buhan, Nicolas Debande, Sébastien Duval, Christophe Giraud, Éliane Jaulmes, François Koeune, Elisabeth Oswald, François-Xavier Standaert, Carolyn Whitnall
2020 J jnl
A Systematic Appraisal of Side Channel Evaluation Strategies.
IACR Cryptol. ePrint Arch.
Melissa Azouaoui, Davide Bellizia, Ileana Buhan, Nicolas Debande, Sébastien Duval, Christophe Giraud, Éliane Jaulmes, François Koeune, Elisabeth Oswald, François-Xavier Standaert, Carolyn Whitnall
2020 J jnl
Ask Less, Get More: Side-Channel Signal Hiding, Revisited.
IEEE Trans. Circuits Syst.
Itamar Levi, Davide Bellizia, David Bol, François-Xavier Standaert
2020 J jnl
Beyond algorithmic noise or how to shuffle parallel implementations?
Int. J. Circuit Theory Appl.
Itamar Levi, Davide Bellizia, François-Xavier Standaert
2020 — conf
Mode-Level vs. Implementation-Level Physical Security in Symmetric Cryptography - A Practical Guide Through the Leakage-Resistance Jungle.
CRYPTO (1)
Davide Bellizia, Olivier Bronchain, Gaëtan Cassiers, Vincent Grosso, Chun Guo, Charles Momin, Olivier Pereira, Thomas Peters, François-Xavier Standaert
2020 J jnl
Mode-Level vs. Implementation-Level Physical Security in Symmetric Cryptography: A Practical Guide Through the Leakage-Resistance Jungle.
IACR Cryptol. ePrint Arch.
Davide Bellizia, Olivier Bronchain, Gaëtan Cassiers, Vincent Grosso, Chun Guo, Charles Momin, Olivier Pereira, Thomas Peters, François-Xavier Standaert
2020 J jnl
SC-DDPL: A Novel Standard-Cell Based Approach for Counteracting Power Analysis Attacks in the Presence of Unbalanced Routing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Davide Bellizia, Simone Bongiovanni, Mauro Olivieri, Giuseppe Scotti
2020 J jnl
Spook: Sponge-Based Leakage-Resistant Authenticated Encryption with a Masked Tweakable Block Cipher.
IACR Trans. Symmetric Cryptol.
Davide Bellizia, Francesco Berti, Olivier Bronchain, Gaëtan Cassiers, Sébastien Duval, Chun Guo, Gregor Leander, Gaëtan Leurent, Itamar Levi, Charles Momin, Olivier Pereira, Thomas Peters, François-Xavier Standaert, Balazs Udvarhelyi, Friedrich Wiemer
2019 J jnl
Reducing a Masked Implementation's Effective Security Order with Setup Manipulations And an Explanation Based on Externally-Amplified Couplings.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Itamar Levi, Davide Bellizia, François-Xavier Standaert
2018 — conf
A Novel Very Low Voltage Topology to implement MCML XOR Gates.
PRIME
Davide Bellizia, Gaetano Palumbo, Giuseppe Scotti, Alessandro Trifiletti
2018 — conf
Demonstrating an LPPN Processor.
ASHES@CCS
Dina Kamel, Davide Bellizia, François-Xavier Standaert, Denis Flandre, David Bol
2018 — —
Design methodologies for cryptographic hardware with countermeasures against side channel attacks.
Davide Bellizia
2018 J jnl
Secure Double Rate Registers as an RTL Countermeasure Against Power Analysis Attacks.
IEEE Trans. Very Large Scale Integr. Syst.
Davide Bellizia, Simone Bongiovanni, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti, Francesco Bruno Trotta
2018 C conf
Secure Implementation of TEL-compatible Flip-Flops using a Standard-Cell Approach.
ISCAS
Davide Bellizia, Giuseppe Scotti, Alessandro Trifiletti
2018 J jnl
TEL Logic Style as a Countermeasure Against Side-Channel Attacks: Secure Cells Library in 65nm CMOS and Experimental Results.
IEEE Trans. Circuits Syst. I Regul. Pap.
Davide Bellizia, Giuseppe Scotti, Alessandro Trifiletti
2017 J jnl
Design of Low-Voltage High-Speed CML D-Latches in Nanometer CMOS Technologies.
IEEE Trans. Very Large Scale Integr. Syst.
Giuseppe Scotti, Davide Bellizia, Alessandro Trifiletti, Gaetano Palumbo
2017 — conf
Multivariate Analysis Exploiting Static Power on Nanoscale CMOS Circuits for Cryptographic Applications.
AFRICACRYPT
Milena Djukanovic, Davide Bellizia, Giuseppe Scotti, Alessandro Trifiletti
2017 — conf
Novel measurements setup for attacks exploiting static power using DC pico-ammeter.
ECCTD
Davide Bellizia, Danilo Cellucci, Valerio Di Stefano, Giuseppe Scotti, Alessandro Trifiletti
2017 J jnl
Template attacks exploiting static power and application to CMOS lightweight crypto-hardware.
Int. J. Circuit Theory Appl.
Davide Bellizia, Milena Djukanovic, Giuseppe Scotti, Alessandro Trifiletti
2017 J jnl
Univariate Power Analysis Attacks Exploiting Static Dissipation of Nanometer CMOS VLSI Circuits for Cryptographic Applications.
IEEE Trans. Emerg. Top. Comput.
Davide Bellizia, Simone Bongiovanni, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti
2017 — conf
VHDL implementation of FWL RLS algorithm.
ECCTD
Davide Bellizia, Pietro Monsurrò, Alessandro Trifiletti
2016 — conf
Implementation of the PRESENT-80 block cipher and analysis of its vulnerability to Side Channel Attacks Exploiting Static Power.
MIXDES
Davide Bellizia, Giuseppe Scotti, Alessandro Trifiletti
2016 — conf
On-chip analog current equalizer as a countermeasure against side-channel attacks in CMOS nanometer technology.
MIXDES
Davide Bellizia, Giuseppe Scotti, Alessandro Trifiletti