David Zaretsky

16 papers A* 1A 1B 1C 2Misc 3Journal 2Unranked 6
YearRankTypeTitle / Venue / Authors
2011 — conf
Resource optimization and deadlock prevention while generating streaming architectures from ordinary programs.
AHS
Lei Gao, Gaurav Mittal, David Zaretsky, Prith Banerjee
2010 B conf
Automatic Generation of Stream Descriptors for Streaming Architectures.
ICPP
Lei Gao, David Zaretsky, Gaurav Mittal, Dan Schonfeld, Prith Banerjee
2009 — conf
A software pipelining algorithm in high-level synthesis for FPGA architectures.
ISQED
Lei Gao, David Zaretsky, Gaurav Mittal, Dan Schonfeld, Prith Banerjee
2009 C conf
An Automated Algorithm to Generate Stream Programs.
ISCAS
Lei Gao, Gaurav Mittal, David Zaretsky, Dan Schonfeld, Prithviraj Banerjee
2009 C conf
Streaming Implementation of the ZLIB Decoder Algorithm on an FPGA.
ISCAS
David Zaretsky, Gaurav Mittal, Prithviraj Banerjee
2009 A conf
Streaming implementation of a sequential decompression algorithm on an FPGA.
FPGA
Gaurav Mittal, David Zaretsky, Prithviraj Banerjee
2007 J jnl
An Overview of a Compiler for Mapping Software Binaries to Hardware.
IEEE Trans. Very Large Scale Integr. Syst.
Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee
2007 — conf
Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs.
ISQED
David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee
2006 Misc conf
Dynamic Template Generation for Resource Sharing in Control and Data Flow Graphs.
VLSI Design
David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee
2005 — conf
Automatic extraction of function bodies from software binaries.
ASP-DAC
Gaurav Mittal, David Zaretsky, Gokhan Memik, Prith Banerjee
2005 — conf
Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code.
LCPC
David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee
2004 A* conf
Automatic translation of software binaries onto FPGAs.
DAC
Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee
2004 — conf
Evaluation of scheduling and allocation algorithms while mapping assembly code onto FPGAs.
ACM Great Lakes Symposium on VLSI
David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee
2004 J jnl
Overview of a compiler for synthesizing MATLAB programs onto FPGAs.
IEEE Trans. Very Large Scale Integr. Syst.
Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Vikram Saxena, Steven Parkes, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, David Zaretsky, Robert Anderson, Juan Ramon Uribe
2004 Misc conf
Overview of the FREEDOM Compiler for Mapping DSP Software to FPGAs.
FCCM
David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee
2000 Misc conf
A MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems.
FCCM
Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary, Scott Hauck, C. Bachmann, Malay Haldar, Pramod G. Joisha, Alex K. Jones, Abhay Kanhere, Anshuman Nayak, S. Periyacheri, M. Walkden, David Zaretsky