David Wentzlaff

90 papers A* 34A 8B 7Misc 2Journal 25Unranked 12

Year	Rank	Type	Title / Venue / Authors
2026	A*	`conf`	Area Bloating and the Future of Specialization. HPCA Qixuan Yu, David Wentzlaff
2025	A*	`conf`	Chip Architectures Under Advanced Computing Sanctions✱. ISCA August Ning, David Wentzlaff
2025	B	`conf`	Evaluation of MindPalace for Chip Design Tradeoffs on Function-as-a-Service. ISPASS Kaifeng Xu, Georgios Tziantzioulis, David Wentzlaff
2025	J	`jnl`	Optically Connected Multi-Stack HBM Modules for Large Language Model Training and Inference. IEEE Comput. Archit. Lett. Yanghui Ou, Hengrui Zhang, Austin Rovinski, David Wentzlaff, Christopher Batten
2025	B	`conf`	Poster:Value-Aware Scheduler for Energy Reduction. PACT Haiyue Ma, Kaifeng Xu, David Wentzlaff
2025	J	`jnl`	SPAD: Specialized Prefill and Decode Hardware for Disaggregated LLM Inference. CoRR Hengrui Zhang, Pratyush Patel, August Ning, David Wentzlaff
2024	A*	`conf`	Kraken: Inherently Parallel Transformers For Efficient Multi-Device Inference. NeurIPS Rohan Baskar Prabhakar, Hengrui Zhang, David Wentzlaff
2024	J	`jnl`	Kraken: Inherently Parallel Transformers For Efficient Multi-Device Inference. CoRR Rohan Baskar Prabhakar, Hengrui Zhang, David Wentzlaff
2024	A*	`conf`	LLMCompass: Enabling Efficient Hardware Design for Large Language Model Inference. ISCA Hengrui Zhang, August Ning, Rohan Baskar Prabhakar, David Wentzlaff
2024	A*	`conf`	LUCIE: A Universal Chiplet-Interposer Design Framework for Plug-and-Play Integration. MICRO Zixi Li, David Wentzlaff
2024	B	`conf`	MindPalace: A Framework for Studying Microarchitecture Design of Function-as-a-Service. ISPASS Kaifeng Xu, Georgios Tziantzioulis, David Wentzlaff
2024	B	`conf`	MuchiSim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems. ISPASS Marcelo Orenes-Vera, Esin Tureci, Margaret Martonosi, David Wentzlaff
2023	J	`jnl`	A Hardware Evaluation Framework for Large Language Model Inference. CoRR Hengrui Zhang, August Ning, Rohan Baskar Prabhakar, David Wentzlaff
2023	A*	`conf`	AutoCC: Automatic Discovery of Covert Channels in Time-Shared Hardware. MICRO Marcelo Orenes-Vera, Hyunsung Yun, Nils Wistoff, Gernot Heiser, Luca Benini, David Wentzlaff, Margaret Martonosi
2023	—	`conf`	Building Efficient Neural Prefetcher. MEMSYS Yuchen Liu, Georgios Tziantzioulis, David Wentzlaff
2023	—	`conf`	CIFER: A 12nm, 16mm CICC Ting-Jung Chang, Ang Li, Fei Gao, Tuan Ta, Georgios Tziantzioulis, Yanghui Ou, Moyang Wang, Jinzheng Tu, Kaifeng Xu, Paul J. Jackson, August Ning, Grigory Chirkov, Marcelo Orenes-Vera, Shady Agwa, Xiaoyu Yan, Eric Tang, Jonathan Balkind, Christopher Batten, David Wentzlaff
2023	J	`jnl`	DCRA: A Distributed Chiplet-based Reconfigurable Architecture for Irregular Applications. CoRR Marcelo Orenes-Vera, Esin Tureci, Margaret Martonosi, David Wentzlaff
2023	—	`conf`	DECADES: A 67mm CICC Fei Gao, Ting-Jung Chang, Ang Li, Marcelo Orenes-Vera, Davide Giri, Paul J. Jackson, August Ning, Georgios Tziantzioulis, Joseph Zuckerman, Jinzheng Tu, Kaifeng Xu, Grigory Chirkov, Gabriele Tombesi, Jonathan Balkind, Margaret Martonosi, Luca P. Carloni, David Wentzlaff
2023	A*	`conf`	Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications. HPCA Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi
2023	A*	`conf`	Duet: Creating Harmony between Processors and Embedded FPGAs. HPCA Ang Li, August Ning, David Wentzlaff
2023	J	`jnl`	Duet: Creating Harmony between Processors and Embedded FPGAs. CoRR Ang Li, August Ning, David Wentzlaff
2023	J	`jnl`	Massive Data-Centric Parallelism in the Chiplet Era. CoRR Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi
2023	J	`jnl`	Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems. CoRR Marcelo Orenes-Vera, Esin Tureci, Margaret Martonosi, David Wentzlaff
2023	—	`conf`	SMAPPIC: Scalable Multi-FPGA Architecture Prototype Platform in the Cloud. ASPLOS (2) Grigory Chirkov, David Wentzlaff
2023	A	`conf`	Seizing the Bandwidth Scaling of On-Package Interconnect in a Post-Moore's Law World. ICS Grigory Chirkov, David Wentzlaff
2023	A*	`conf`	Supply Chain Aware Computer Architecture. ISCA August Ning, Georgios Tziantzioulis, David Wentzlaff
2023	J	`jnl`	Tascade: Hardware Support for Atomic-free, Asynchronous and Efficient Reduction Trees. CoRR Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi
2023	J	`jnl`	Using LLMs to Facilitate Formal Verification of RTL. CoRR Marcelo Orenes-Vera, Margaret Martonosi, David Wentzlaff
2022	B	`conf`	Class-Discriminative CNN Compression. ICPR Yuchen Liu, David Wentzlaff, Sun-Yuan Kung
2022	J	`jnl`	Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications. CoRR Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi
2022	A	`conf`	Evolving transferable neural pruning functions. GECCO Yuchen Liu, Sun-Yuan Kung, David Wentzlaff
2022	A*	`conf`	FracDRAM: Fractional Values in Off-the-Shelf DRAM. MICRO Fei Gao, Georgios Tziantzioulis, David Wentzlaff
2022	J	`jnl`	OPDB: A Scalable and Modular Design Benchmark. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Georgios Tziantzioulis, Ting-Jung Chang, Jonathan Balkind, Jinzheng Tu, Fei Gao, David Wentzlaff
2022	A*	`conf`	Tiny but mighty: designing and realizing scalable latency tolerance for manycore SoCs. ISCA Marcelo Orenes-Vera, Aninda Manocha, Jonathan Balkind, Fei Gao, Juan L. Aragón, David Wentzlaff, Margaret Martonosi
2021	A*	`conf`	AutoSVA: Democratizing Formal Verification of RTL Module Interactions. DAC Marcelo Orenes-Vera, Aninda Manocha, David Wentzlaff, Margaret Martonosi
2021	J	`jnl`	AutoSVA: Democratizing Formal Verification of RTL Module Interactions. CoRR Marcelo Orenes-Vera, Aninda Manocha, David Wentzlaff, Margaret Martonosi
2021	J	`jnl`	Class-Discriminative CNN Compression. CoRR Yuchen Liu, David Wentzlaff, Sun-Yuan Kung
2021	J	`jnl`	Evolving Transferable Pruning Functions. CoRR Yuchen Liu, Sun-Yuan Kung, David Wentzlaff
2021	A	`conf`	PRGA: An Open-Source FPGA Research and Prototyping Framework. FPGA Ang Li, David Wentzlaff
2020	B	`conf`	Automated Design of FPGAs Facilitated by Cycle-Free Routing. FPL Ang Li, Ting-Jung Chang, David Wentzlaff
2020	A*	`conf`	BYOC: A "Bring Your Own Core" Framework for Heterogeneous-ISA Research. ASPLOS Jonathan Balkind, Katie Lim, Michael Schaffner, Fei Gao, Grigory Chirkov, Ang Li, Alexey Lavrov, Tri M. Nguyen, Yaosheng Fu, Florian Zaruba, Kunal Gulati, Luca Benini, David Wentzlaff
2020	J	`jnl`	Burstable Instances for Clouds: Performance Modeling, Equilibrium Analysis, and Revenue Maximization. IEEE/ACM Trans. Netw. Yuxuan Jiang, Mohammad Shahrad, David Wentzlaff, Danny H. K. Tsang, Carlee Joe-Wong
2020	A	`conf`	Cycle-Free FPGA Routing Graphs. FPGA Ang Li, David Wentzlaff
2020	Misc	`conf`	Enabling Programmable Transport Protocols in High-Speed NICs. NSDI Mina Tahmasbi Arashloo, Alexey Lavrov, Manya Ghobadi, Jennifer Rexford, David Walker, David Wentzlaff
2020	A*	`conf`	HyperTRIO: Hyper-Tenant Translation of I/O Addresses. ISCA Alexey Lavrov, David Wentzlaff
2020	J	`jnl`	OpenPiton at 5: A Nexus for Open and Agile Hardware Design. IEEE Micro Jonathan Balkind, Ting-Jung Chang, Paul J. Jackson, Georgios Tziantzioulis, Ang Li, Fei Gao, Alexey Lavrov, Grigory Chirkov, Jinzheng Tu, Mohammad Shahrad, David Wentzlaff
2020	A	`conf`	Organic-Flow: An Open-Source Organic Standard Cell Library and Process Development Kit. DATE Ting-Jung Chang, Zhuozhi Yao, Barry P. Rand, David Wentzlaff
2020	J	`jnl`	Rethinking Class-Discrimination Based CNN Channel Pruning. CoRR Yuchen Liu, David Wentzlaff, Sun-Yuan Kung
2019	A*	`conf`	Architectural Implications of Function-as-a-Service Computing. MICRO Mohammad Shahrad, Jonathan Balkind, David Wentzlaff
2019	A*	`conf`	Burstable Instances for Clouds: Performance Modeling, Equilibrium Analysis, and Revenue Maximization. INFOCOM Yuxuan Jiang, Mohammad Shahrad, David Wentzlaff, Danny H. K. Tsang, Carlee Joe-Wong
2019	A*	`conf`	ComputeDRAM: In-Memory Compute Using Off-the-Shelf DRAMs. MICRO Fei Gao, Georgios Tziantzioulis, David Wentzlaff
2019	A	`conf`	JuxtaPiton: Enabling Heterogeneous-ISA Research with RISC-V and SPARC FPGA Soft-cores. FPGA Katie Lim, Jonathan Balkind, David Wentzlaff
2019	J	`jnl`	OpenPiton: an open source hardware platform for your research. Commun. ACM Jonathan Balkind, Michael McKeown, Yaosheng Fu, Tri Minh Nguyen, Yanqi Zhou, Alexey Lavrov, Mohammad Shahrad, Adi Fuchs, Samuel Payne, Xiaohua Liang, Matthew Matl, David Wentzlaff
2019	A*	`conf`	The Accelerator Wall: Limits of Chip Specialization. HPCA Adi Fuchs, David Wentzlaff
2018	—	`conf`	Acoustic Denial of Service Attacks on Hard Disk Drives. ASHES@CCS Mohammad Shahrad, Arsalan Mosenia, Liwei Song, Mung Chiang, David Wentzlaff, Prateek Mittal
2018	A*	`conf`	CABLE: A CAche-Based Link Encoder for Bandwidth-Starved Manycores. MICRO Tri Minh Nguyen, Adi Fuchs, David Wentzlaff
2018	J	`jnl`	JuxtaPiton: Enabling Heterogeneous-ISA Research with RISC-V and SPARC FPGA Soft-cores. CoRR Katie Lim, Jonathan Balkind, David Wentzlaff
2018	A*	`conf`	PiCL: A Software-Transparent, Persistent Cache Log for Nonvolatile Main Memory. MICRO Tri Minh Nguyen, David Wentzlaff
2018	A*	`conf`	Power and Energy Characterization of an Open Source 25-Core Manycore Processor. HPCA Michael McKeown, Alexey Lavrov, Mohammad Shahrad, Paul J. Jackson, Yaosheng Fu, Jonathan Balkind, Tri Minh Nguyen, Katie Lim, Yanqi Zhou, David Wentzlaff
2018	A*	`conf`	Scaling Datacenter Accelerators with Compute-Reuse Architectures. ISCA Adi Fuchs, David Wentzlaff
2017	J	`jnl`	Acoustic Denial of Service Attacks on HDDs. CoRR Mohammad Shahrad, Arsalan Mosenia, Liwei Song, Mung Chiang, David Wentzlaff, Prateek Mittal
2017	A*	`conf`	Architectural tradeoffs for biodegradable computing. MICRO Ting-Jung Chang, Zhuozhi Yao, Paul J. Jackson, Barry P. Rand, David Wentzlaff
2017	A*	`conf`	Camouflage: Memory Traffic Shaping to Mitigate Timing Attacks. HPCA Yanqi Zhou, Sameer Wagh, Prateek Mittal, David Wentzlaff
2017	—	`conf`	Incentivizing self-capping to increase cloud utilization. SoCC Mohammad Shahrad, Cristian Klein, Liang Zheng, Mung Chiang, Erik Elmroth, David Wentzlaff
2017	J	`jnl`	Piton: A Manycore Processor for Multitenant Clouds. IEEE Micro Michael McKeown, Yaosheng Fu, Tri Minh Nguyen, Yanqi Zhou, Jonathan Balkind, Alexey Lavrov, Mohammad Shahrad, Samuel Payne, David Wentzlaff
2017	—	`conf`	Towards Deploying Decommissioned Mobile Devices as Cheap Energy-Efficient Compute Nodes. HotCloud Mohammad Shahrad, David Wentzlaff
2016	—	`conf`	Availability Knob: Flexible User-Defined Availability in the Cloud. SoCC Mohammad Shahrad, David Wentzlaff
2016	A*	`conf`	CASH: Supporting IaaS Customers with a Sub-core Configurable Architecture. ISCA Yanqi Zhou, Henry Hoffmann, David Wentzlaff
2016	A*	`conf`	MITTS: Memory Inter-arrival Time Traffic Shaping. ISCA Yanqi Zhou, David Wentzlaff
2016	A*	`conf`	OpenPiton: An Open Source Manycore Research Framework. ASPLOS Jonathan Balkind, Michael McKeown, Yaosheng Fu, Tri Minh Nguyen, Yanqi Zhou, Alexey Lavrov, Mohammad Shahrad, Adi Fuchs, Samuel Payne, Xiaohua Liang, Matthew Matl, David Wentzlaff
2016	—	`conf`	Piton: A 25-core academic manycore research processor. Hot Chips Symposium Michael McKeown, Yaosheng Fu, Tri Minh Nguyen, Yanqi Zhou, Jonathan Balkind, Alexey Lavrov, Mohammad Shahrad, Samuel Payne, David Wentzlaff
2015	A*	`conf`	Coherence domain restriction on large scale systems. MICRO Yaosheng Fu, Tri Minh Nguyen, David Wentzlaff
2015	A*	`conf`	MORC: a manycore-oriented compressed cache. MICRO Tri Minh Nguyen, David Wentzlaff
2014	A*	`conf`	Execution Drafting: Energy Efficiency through Computation Deduplication. MICRO Michael McKeown, Jonathan Balkind, David Wentzlaff
2014	B	`conf`	PriME: A parallel and distributed simulator for thousand-core chips. ISPASS Yaosheng Fu, David Wentzlaff
2014	A*	`conf`	The sharing architecture: sub-core configurability for IaaS clouds. ASPLOS Yanqi Zhou, David Wentzlaff
2012	A*	`conf`	Configurable fine-grain protection for multicore processor virtualization. ISCA David Wentzlaff, Christopher J. Jackson, Patrick Griffin, Anant Agarwal
2012	—	`—`	Distributed data structure for factored operating systems. David Wentzlaff
2012	A*	`conf`	The case for elastic operating system services in fos. DAC Lamia Youseff, Nathan Beckmann, Harshad Kasture, Charles Gruenwald III, David Wentzlaff, Anant Agarwal
2010	—	`conf`	An operating system for multicore and clouds: mechanisms and implementation. SoCC David Wentzlaff, Charles Gruenwald III, Nathan Beckmann, Kevin Modzelewski, Adam Belay, Lamia Youseff, Jason E. Miller, Anant Agarwal
2010	—	`conf`	Remote Store Programming. HiPEAC Henry Hoffmann, David Wentzlaff, Anant Agarwal
2009	J	`jnl`	Factored operating systems (fos): the case for a scalable operating system for multicores. ACM SIGOPS Oper. Syst. Rev. David Wentzlaff, Anant Agarwal
2009	—	`ch.`	Tiled Multicore Processors. Multicore Processors and Systems Michael B. Taylor, Walter Lee, Jason E. Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul R. Johnson, Jason Sungtae Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matthew I. Frank, Saman P. Amarasinghe, Anant Agarwal
2008	—	`conf`	TILE64 - Processor: A 64-Core SoC with Mesh Interconnect. ISSCC Shane Bell, Bruce Edwards, John Amann, Rich Conlin, Kevin Joyce, Vince Leung, John Mackay, Mike Reif, Liewei Bao, John F. Brown III, Matthew Mattina, Chyi-Chang Miao, Carl Ramey, David Wentzlaff, Walker Anderson, Ethan Berger, Nat Fairbanks, Durlov Khan, Froilan Montenegro, Jay Stickney, John Zook
2007	J	`jnl`	On-Chip Interconnection Architecture of the Tile Processor. IEEE Micro David Wentzlaff, Patrick Griffin, Henry Hoffmann, Liewei Bao, Bruce Edwards, Carl Ramey, Matthew Mattina, Chyi-Chang Miao, John F. Brown III, Anant Agarwal
2006	A	`conf`	Constructing Virtual Architectures on a Tiled Processor. CGO David Wentzlaff, Anant Agarwal
2004	Misc	`conf`	A Quantitative Comparison of Reconfigurable, Tiled, and Conventional Architectures on Bit-Level Computation. FCCM David Wentzlaff, Anant Agarwal
2004	A*	`conf`	Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams. ISCA Michael B. Taylor, Walter Lee, Jason E. Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul R. Johnson, Jason Sungtae Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matthew I. Frank, Saman P. Amarasinghe, Anant Agarwal
2003	A	`conf`	Energy characterization of a tiled architecture processor with on-chip networks. ISLPED Jason Sungtae Kim, Michael Bedford Taylor, Jason E. Miller, David Wentzlaff
2002	J	`jnl`	The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs. IEEE Micro Michael B. Taylor, Jason Sungtae Kim, Jason E. Miller, David Wentzlaff, Fae Ghodrat, Ben Greenwald, Henry Hoffmann, Paul R. Johnson, Jae W. Lee, Walter Lee, Albert Ma, Arvind Saraf, Mark Seneski, Nathan Shnidman, Volker Strumpen, Matthew I. Frank, Saman P. Amarasinghe, Anant Agarwal