David Trilla - RankMe

16 papers A* 3A 1B 1C 5Journal 3Unranked 2

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	EPOCHS-1: A 12 nm Highly Heterogeneous Open-Source SoC With Distributed Coin-Based Power Management and Integrated Hybrid Voltage Regulation. IEEE J. Solid State Circuits Joseph Zuckerman, Martin Cochet, Maico Cassel dos Santos, Erik Jens Loscalzo, Karthik Swaminathan, Tianyu Jia, Davide Giri, Thierry Tambe, Jeff Jun Zhang, Alper Buyuktosunoglu, Kuan-Lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca Piccolboni, Gabriele Tombesi, David Trilla, John-David Wellman, En-Yu Yang, Aporva Amarnath, Ying Jing, Bakshree Mishra, Joshua Park, Vignesh Suresh, Samira Zaliasl, Michael Lekas, Stephen Cahill, Hesam Sadeghi, Joseph Meyer, Noah Sturcken, Sarita V. Adve, David Brooks, Gu-Yeon Wei, Kenneth L. Shepard, Pradip Bose, Luca P. Carloni
2024	—	`conf`	14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration. ISSCC Maico Cassel dos Santos, Tianyu Jia, Joseph Zuckerman, Martin Cochet, Davide Giri, Erik Jens Loscalzo, Karthik Swaminathan, Thierry Tambe, Jeff Jun Zhang, Alper Buyuktosunoglu, Kuan-Lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca Piccolboni, Gabriele Tombesi, David Trilla, John-David Wellman, En-Yu Yang, Aporva Amarnath, Ying Jing, Bakshree Mishra, Joshua Park, Vignesh Suresh, Sarita V. Adve, Pradip Bose, David Brooks, Luca P. Carloni, Kenneth L. Shepard, Gu-Yeon Wei
2024	A*	`conf`	Enterprise-Class Cache Compression Design. HPCA Alper Buyuktosunoglu, David Trilla, Bülent Abali, Deanna Postles Dunn Berger, Craig R. Walters, Jang-Soo Lee
2021	A*	`conf`	NOVIA: A Framework for Discovering Non-Conventional Inline Accelerators. MICRO David Trilla, John-David Wellman, Alper Buyuktosunoglu, Pradip Bose
2021	C	`conf`	SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping. IOLTS Francisco Bas, Sergi Alcaide, Ruben Lorenzo, Guillem Cabo, Guillermo Gil, Oriol Sala, Fabio Mazzocchetti, David Trilla, Jaume Abella
2021	B	`conf`	SafeSU: an Extended Statistics Unit for Multicore Timing Interference. ETS Guillem Cabo, Francisco Bas, Ruben Lorenzo, David Trilla, Sergi Alcaide, Miquel Moretó, Carles Hernández, Jaume Abella
2021	C	`conf`	SafeTI: a Hardware Traffic Injector for MPSoC Functional and Timing Validation. IOLTS Oriol Sala, Sergi Alcaide, Guillem Cabo, Francisco Bas, Ruben Lorenzo, Pedro Benedicte, David Trilla, Guillermo Gil, Fabio Mazzocchetti, Jaume Abella
2021	J	`jnl`	Worst-Case Energy Consumption: A New Challenge for Battery-Powered Critical Devices. IEEE Trans. Sustain. Comput. David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla
2020	—	`—`	Non-functional considerations of time-randomized processor architectures. David Trilla
2019	C	`conf`	An Approach for Detecting Power Peaks During Testing and Breaking Systematic Pathological Behavior. DSD David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla
2019	C	`conf`	Modeling the Impact of Process Variations in Worst-Case Energy Consumption Estimation. DSD David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla
2019	J	`jnl`	Randomization for Safer, more Reliable and Secure, High-Performance Automotive Processors. IEEE Des. Test David Trilla, Francisco J. Cazorla, Carles Hernández, Jaume Abella
2018	A*	`conf`	Cache side-channel attacks and time-predictability in high-performance critical real-time systems. DAC David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla
2017	—	`conf`	Modelling bus contention during system early design stages. SIES David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla
2016	A	`conf`	Improving Early Design Stage Timing Modeling in Multicore Based Real-Time Systems. RTAS David Trilla, Javier Jalle, Mikel Fernández, Jaume Abella, Francisco J. Cazorla
2016	C	`conf`	Resilient random modulo cache memories for probabilistically-analyzable real-time systems. IOLTS David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla