David T. Harper III

19 papers A* 4B 1Journal 10Unranked 4
YearRankTypeTitle / Venue / Authors
1996 J jnl
An Efficient Memory System for the SIMD Construction of a Gaussian Pyramid.
IEEE Trans. Parallel Distributed Syst.
Jong Won Park, David T. Harper III
1995 J jnl
Hierarchy embedded differential image for progressive transmission using lossless compression.
IEEE Trans. Circuits Syst. Video Technol.
Whoi-Yul Kim, Poras T. Balsara, David T. Harper III, Jon Wong Park
1995 J jnl
Performance analysis of disk cache write policies.
Microprocess. Microsystems
Douglas W. Miller, David T. Harper III
1994 J jnl
A Multiaccess Frame Buffer Architecture.
IEEE Trans. Computers
David T. Harper III
1993 B conf
A Parallel Algorithm for Cache Miss Ratio Evaluation.
MASCOTS
David T. Harper III, David Tuma
1993 J jnl
Analytical Estimation of Vector Access Performance in Parallel Memory Architectures.
IEEE Trans. Computers
David T. Harper III, Yashodara Costa
1992 J jnl
Increased Memory Performance During Vector Accesses Through the use of Linear Address Transformations.
IEEE Trans. Computers
David T. Harper III
1992 — conf
Memory Architecture Support for the SIMD Construction of a Gaussian Pyramid.
SPDP
Jong Won Park, David T. Harper III
1991 J jnl
Block, Multistride Vector, and FFT Accesses in Parallel Memory Systems.
IEEE Trans. Parallel Distributed Syst.
David T. Harper III
1991 J jnl
Conflict-Free Vector Access Using a Dynamic Storage Scheme.
IEEE Trans. Computers
David T. Harper III, Darel A. Linebarger
1991 A* conf
Reducing Memory Contention in Shared Memory Multiprocessors.
ISCA
David T. Harper III
1990 J jnl
Evaluation of Reduced Bandwidth Multistage Networks.
J. Parallel Distributed Comput.
David T. Harper III, J. Robert Jump
1989 A* conf
A Dynamic Storage Scheme for Conflict-Free Vector Access.
ISCA
David T. Harper III, Darel A. Linebarger
1989 — conf
Address Transformations to Increase Memory Performance.
ICPP (1)
David T. Harper III
1988 — conf
Storage Schemes for Efficient Computation of a Radix 2 FFT in a Machine with Parallel Memories.
ICPP (1)
David T. Harper III, Darel A. Linebarger
1987 A* conf
Performance Evaluation of Reduced Bandwidth Multistage Interconnection Networks.
ISCA
David T. Harper III, J. Robert Jump
1987 J jnl
Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme.
IEEE Trans. Computers
David T. Harper III, J. Robert Jump
1986 A* conf
Performance Evaluation of Vector Accesses in Parallel Memories Using a Skewed Storage Scheme.
ISCA
David T. Harper III, J. Robert Jump
1984 — conf
An interleaved array-processing architecture.
AFIPS National Computer Conference
J. Robert Jump, James D. Wise, David T. Harper III