David M. Brooks

146 papers A* 37A 22B 3C 8Misc 5Journal 45Unranked 24

Year	Rank	Type	Title / Venue / Authors
2021	A	`conf`	Application-driven Design Exploration for Dense Ferroelectric Embedded Non-volatile Memories. ISLPED Mohammad Mehdi Sharifi, Lillian Pentecost, Ramin Rajaei, Arman Kazemi, Qiuwen Lou, Gu-Yeon Wei, David M. Brooks, Kai Ni, X. Sharon Hu, Michael T. Niemier, Marco Donato
2020	A	`conf`	A comprehensive methodology to determine optimal coherence interfaces for many-accelerator SoCs. ISLPED Kshitij Bhardwaj, Marton Havasi, Yuan Yao, David M. Brooks, José Miguel Hernández-Lobato, Gu-Yeon Wei
2019	—	`conf`	A 16nm 25mm VLSI Circuits Paul N. Whatmough, Sae Kyu Lee, Marco Donato, Hsea-Ching Hsueh, Sam Likun Xi, Udit Gupta, Lillian Pentecost, Glenn G. Ko, David M. Brooks, Gu-Yeon Wei
2019	J	`jnl`	Determining Optimal Coherency Interface for Many-Accelerator SoCs Using Bayesian Optimization. IEEE Comput. Archit. Lett. Kshitij Bhardwaj, Marton Havasi, Yuan Yao, David M. Brooks, José Miguel Hernández-Lobato, Gu-Yeon Wei
2019	J	`jnl`	Predicting New Workload or CPU Performance by Analyzing Public Datasets. ACM Trans. Archit. Code Optim. Yu Wang, Victor Lee, Gu-Yeon Wei, David M. Brooks
2019	J	`jnl`	RecNMP: Accelerating Personalized Recommendation with Near-Memory Processing. CoRR Liu Ke, Udit Gupta, Carole-Jean Wu, Benjamin Youngjae Cho, Mark Hempstead, Brandon Reagen, Xuan Zhang, David M. Brooks, Vikas Chandra, Utku Diril, Amin Firoozshahian, Kim M. Hazelwood, Bill Jia, Hsien-Hsin S. Lee, Meng Li, Bert Maher, Dheevatsa Mudigere, Maxim Naumov, Martin Schatz, Mikhail Smelyanskiy, Xiaodong Wang
2018	J	`jnl`	An Area-Efficient 8-Bit Single-Ended ADC With Extended Input Voltage Range. IEEE Trans. Circuits Syst. II Express Briefs Simon Chaput, David M. Brooks, Gu-Yeon Wei
2018	A*	`conf`	Applied Machine Learning at Facebook: A Datacenter Infrastructure Perspective. HPCA Kim M. Hazelwood, Sarah Bird, David M. Brooks, Soumith Chintala, Utku Diril, Dmytro Dzhulgakov, Mohamed Fawzy, Bill Jia, Yangqing Jia, Aditya Kalro, James Law, Kevin Lee, Jason Lu, Pieter Noordhuis, Misha Smelyanskiy, Liang Xiong, Xiaodong Wang
2018	A*	`conf`	Ares: a framework for quantifying the resilience of deep neural networks. DAC Brandon Reagen, Udit Gupta, Lillian Pentecost, Paul N. Whatmough, Sae Kyu Lee, Niamh Mulholland, David M. Brooks, Gu-Yeon Wei
2018	J	`jnl`	Assisting High-Level Synthesis Improve SpMV Benchmark Through Dynamic Dependence Analysis. IEEE Trans. Circuits Syst. II Express Briefs Rafael Garibotti, Brandon Reagen, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks
2018	J	`jnl`	Cloud No Longer a Silver Bullet, Edge to the Rescue. CoRR Yuhao Zhu, Gu-Yeon Wei, David M. Brooks
2018	—	`conf`	Co-designed systems for deep learning hardware accelerators. VLSI-DAT David M. Brooks
2018	J	`jnl`	DNN Engine: A 28-nm Timing-Error Tolerant Sparse Deep Neural Network Processor for IoT Applications. IEEE J. Solid State Circuits Paul N. Whatmough, Sae Kyu Lee, David M. Brooks, Gu-Yeon Wei
2017	—	`conf`	14.3 A 28nm SoC with a 1.2GHz 568nJ/prediction sparse deep-neural-network engine with >0.1 timing error rate tolerance for IoT applications. ISSCC Paul N. Whatmough, Sae Kyu Lee, Hyunkwang Lee, Saketh Rama, David M. Brooks, Gu-Yeon Wei
2017	—	`conf`	21.5 A 3-to-5V input 100Vpp output 57.7mW 0.42% THD+N highly integrated piezoelectric actuator driver. ISSCC Simon Chaput, David M. Brooks, Gu-Yeon Wei
2017	J	`jnl`	A 16-Core Voltage-Stacked System With Adaptive Clocking and an Integrated Switched-Capacitor DC-DC Converter. IEEE Trans. Very Large Scale Integr. Syst. Sae Kyu Lee, Tao Tong, Xuan Zhang, David M. Brooks, Gu-Yeon Wei
2017	J	`jnl`	A Fully Integrated Battery-Powered System-on-Chip in 40-nm CMOS for Closed-Loop Control of Insect-Scale Pico-Aerial Vehicle. IEEE J. Solid State Circuits Xuan Zhang, Mario Lok, Tao Tong, Sae Kyu Lee, Brandon Reagen, Simon Chaput, Pierre-Emile J. Duhamel, Robert J. Wood, David M. Brooks, Gu-Yeon Wei
2017	A	`conf`	A case for efficient accelerator design space exploration via Bayesian optimization. ISLPED Brandon Reagen, José Miguel Hernández-Lobato, Robert Adolf, Michael A. Gelbart, Paul N. Whatmough, Gu-Yeon Wei, David M. Brooks
2017	C	`conf`	Applications of Deep Neural Networks for Ultra Low Power IoT. ICCD Sreela Kodali, Patrick Hansen, Niamh Mulholland, Paul N. Whatmough, David M. Brooks, Gu-Yeon Wei
2017	J	`jnl`	Automatically accelerating non-numerical programs by architecture-compiler co-design. Commun. ACM Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, David M. Brooks
2017	J	`jnl`	CARB: A C-State Power Management Arbiter for Latency-Critical Workloads. IEEE Comput. Archit. Lett. Xin Zhan, Reza Azimi, Svilen Kanev, David M. Brooks, Sherief Reda
2017	J	`jnl`	Cognitive Computing Safety: The New Horizon for Reliability / The Design and Evolution of Deep Learning Workloads. IEEE Micro Yuhao Zhu, Vijay Janapa Reddi, Robert Adolf, Saketh Rama, Brandon Reagen, Gu-Yeon Wei, David M. Brooks
2017	—	`book`	Deep Learning for Computer Architects Brandon Reagen, Robert Adolf, Paul N. Whatmough, Gu-Yeon Wei, David M. Brooks
2017	A*	`conf`	Ivory: Early-Stage Design Space Exploration Tool for Integrated Voltage Regulators. DAC An Zou, Jingwen Leng, Yazhou Zu, Tao Tong, Vijay Janapa Reddi, David M. Brooks, Gu-Yeon Wei, Xuan Zhang
2017	A*	`conf`	Mallacc: Accelerating Memory Allocation. ASPLOS Svilen Kanev, Sam Likun Xi, Gu-Yeon Wei, David M. Brooks
2017	Misc	`conf`	Sub-uJ deep neural networks for embedded applications. ACSSC Paul N. Whatmough, Sae Kyu Lee, Gu-Yeon Wei, David M. Brooks
2017	C	`conf`	Using dynamic dependence analysis to improve the quality of high-level synthesis designs. ISCAS Rafael Garibotti, Brandon Reagen, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks
2017	C	`conf`	Very Low Voltage (VLV) Design. ICCD Ramon Bertran, Pradip Bose, David M. Brooks, Jeff Burns, Alper Buyuktosunoglu, Nandhini Chandramoorthy, Eric Cheng, Martin Cochet, Schuyler Eldridge, Daniel J. Friedman, Hans M. Jacobson, Rajiv V. Joshi, Subhasish Mitra, Robert K. Montoye, Arun Paidimarri, Pritish Parida, Kevin Skadron, Mircea Stan, Karthik Swaminathan, Augusto Vega, Swagath Venkataramani, Christos Vezyrtzis, Gu-Yeon Wei, John-David Wellman, Matthew M. Ziegler
2017	J	`jnl`	Weightless: Lossy Weight Encoding For Deep Neural Network Compression. CoRR Brandon Reagen, Udit Gupta, Robert Adolf, Michael M. Mitzenmacher, Alexander M. Rush, Gu-Yeon Wei, David M. Brooks
2016	J	`jnl`	A Fully Integrated Reconfigurable Switched-Capacitor DC-DC Converter With Four Stacked Output Channels for Voltage Stacking Applications. IEEE J. Solid State Circuits Tao Tong, Sae Kyu Lee, Xuan Zhang, David M. Brooks, Gu-Yeon Wei
2016	A*	`conf`	Co-designing accelerators and SoC interfaces using gem5-Aladdin. MICRO Yakun Sophia Shao, Sam Likun Xi, Vijayalakshmi Srinivasan, Gu-Yeon Wei, David M. Brooks
2016	J	`jnl`	Fathom: Reference Workloads for Modern Deep Learning Methods. CoRR Robert Adolf, Saketh Rama, Brandon Reagen, Gu-Yeon Wei, David M. Brooks
2016	—	`conf`	Fathom: reference workloads for modern deep learning methods. IISWC Robert Adolf, Saketh Rama, Brandon Reagen, Gu-Yeon Wei, David M. Brooks
2016	A*	`conf`	Minerva: Enabling Low-Power, Highly-Accurate Deep Neural Network Accelerators. ISCA Brandon Reagen, Paul N. Whatmough, Robert Adolf, Saketh Rama, Hyunkwang Lee, Sae Kyu Lee, José Miguel Hernández-Lobato, Gu-Yeon Wei, David M. Brooks
2016	J	`jnl`	Profiling a Warehouse-Scale Computer. IEEE Micro Svilen Kanev, Juan Pablo Darago, Kim M. Hazelwood, Parthasarathy Ranganathan, Tipp Moseley, Gu-Yeon Wei, David M. Brooks
2015	—	`conf`	A 16-core voltage-stacked system with an integrated switched-capacitor DC-DC converter. VLSIC Sae Kyu Lee, Tao Tong, Xuan Zhang, David M. Brooks, Gu-Yeon Wei
2015	—	`conf`	A multi-chip system optimized for insect-scale flapping-wing robots. VLSIC Xuan Zhang, Mario Lok, Tao Tong, Simon Chaput, Sae Kyu Lee, Brandon Reagen, Hyunkwang Lee, David M. Brooks, Gu-Yeon Wei
2015	—	`conf`	A power electronics unit to drive piezoelectric actuators for flying microrobots. CICC Mario Lok, Xuan Zhang, Elizabeth Farrell Helbling, Robert J. Wood, David M. Brooks, Gu-Yeon Wei
2015	—	`conf`	Addressing the computing technology-capability gap: The coming Golden Age of design. NAS David M. Brooks
2015	—	`conf`	Circuit and system design for robotic flying vehicles. VLSI-DAT David M. Brooks
2015	A	`conf`	HELIX-UP: relaxing program semantics to unleash parallelization. CGO Simone Campanoni, Glenn H. Holloway, Gu-Yeon Wei, David M. Brooks
2015	A*	`conf`	Profiling a warehouse-scale computer. ISCA Svilen Kanev, Juan Pablo Darago, Kim M. Hazelwood, Parthasarathy Ranganathan, Tipp Moseley, Gu-Yeon Wei, David M. Brooks
2015	A*	`conf`	Quantifying sources of error in McPAT and potential impacts on architectural studies. HPCA Sam Likun Xi, Hans M. Jacobson, Pradip Bose, Gu-Yeon Wei, David M. Brooks
2015	—	`book`	Research Infrastructures for Hardware Accelerators Yakun Sophia Shao, David M. Brooks
2015	J	`jnl`	The Aladdin Approach to Accelerator Design and Modeling. IEEE Micro Yakun Sophia Shao, Brandon Reagen, Gu-Yeon Wei, David M. Brooks
2014	A*	`conf`	Aladdin: A pre-RTL, power-performance accelerator simulator enabling large design space exploration of customized architectures. ISCA Yakun Sophia Shao, Brandon Reagen, Gu-Yeon Wei, David M. Brooks
2014	J	`jnl`	Evaluating Adaptive Clocking for Supply-Noise Resilience in Battery-Powered Aerial Microrobotic System-on-Chip. IEEE Trans. Circuits Syst. I Regul. Pap. Xuan Zhang, Tao Tong, David M. Brooks, Gu-Yeon Wei
2014	A*	`conf`	HELIX-RC: An architecture-compiler co-design for automatic parallelization of irregular programs. ISCA Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, David M. Brooks
2014	—	`conf`	MachSuite: Benchmarks for accelerator design and customized architectures. IISWC Brandon Reagen, Robert Adolf, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks
2014	C	`conf`	Multi-accelerator system development with the ShrinkFit acceleration framework. ICCD Michael J. Lyons, Gu-Yeon Wei, David M. Brooks
2014	—	`conf`	Tradeoffs between power management and tail latency in warehouse-scale applications. IISWC Svilen Kanev, Kim M. Hazelwood, Gu-Yeon Wei, David M. Brooks
2013	—	`conf`	A fully integrated battery-connected switched-capacitor 4: 1 voltage regulator with 70% peak efficiency using bottom-plate charge recycling. CICC Tao Tong, Xuan Zhang, Wonyoung Kim, David M. Brooks, Gu-Yeon Wei
2013	A	`conf`	Characterizing and evaluating voltage noise in multi-core near-threshold processors. ISLPED Xuan Zhang, Tao Tong, Svilen Kanev, Sae Kyu Lee, Gu-Yeon Wei, David M. Brooks
2013	A	`conf`	Energy characterization and instruction-level energy model of Intel's Xeon Phi processor. ISLPED Yakun Sophia Shao, David M. Brooks
2013	B	`conf`	ISA-independent workload characterization and its implications for specialized architectures. ISPASS Yakun Sophia Shao, David M. Brooks
2013	A	`conf`	Quantifying acceleration: Power/performance trade-offs of application kernels in hardware. ISLPED Brandon Reagen, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks
2013	J	`jnl`	Shrink-Fit: A Framework for Flexible Accelerator Sizing. IEEE Comput. Archit. Lett. Michael J. Lyons, Gu-Yeon Wei, David M. Brooks
2013	—	`conf`	Supply-noise resilient adaptive clocking for battery-powered aerial microrobotic System-on-Chip in 40nm CMOS. CICC Xuan Zhang, Tao Tong, David M. Brooks, Gu-Yeon Wei
2012	J	`jnl`	A Fully-Integrated 3-Level DC-DC Converter for Nanosecond-Scale DVFS. IEEE J. Solid State Circuits Wonyoung Kim, David M. Brooks, Gu-Yeon Wei
2012	A	`conf`	Evaluation of voltage stacking for near-threshold multicore computing. ISLPED Sae Kyu Lee, David M. Brooks, Gu-Yeon Wei
2012	A	`conf`	HELIX: automatic parallelization of irregular programs for chip multiprocessing. CGO Simone Campanoni, Timothy M. Jones, Glenn H. Holloway, Vijay Janapa Reddi, Gu-Yeon Wei, David M. Brooks
2012	J	`jnl`	Helix: Making the Extraction of Thread-Level Parallelism Mainstream. IEEE Micro Simone Campanoni, Timothy M. Jones, Glenn H. Holloway, Gu-Yeon Wei, David M. Brooks
2012	A*	`conf`	The HELIX project: overview and directions. DAC Simone Campanoni, Timothy M. Jones, Glenn H. Holloway, Gu-Yeon Wei, David M. Brooks
2012	J	`jnl`	The accelerator store: A shared memory framework for accelerator-based systems. ACM Trans. Archit. Code Optim. Michael J. Lyons, Mark Hempstead, Gu-Yeon Wei, David M. Brooks
2012	A	`conf`	XIOSim: power-performance modeling of mobile x86 cores. ISLPED Svilen Kanev, Gu-Yeon Wei, David M. Brooks
2011	—	`conf`	A fully-integrated 3-level DC/DC converter for nanosecond-scale DVS with fast shunt regulation. ISSCC Wonyoung Kim, David M. Brooks, Gu-Yeon Wei
2011	A*	`conf`	Achieving uniform performance and maximizing throughput in the presence of heterogeneity. HPCA Krishna K. Rangan, Michael D. Powell, Gu-Yeon Wei, David M. Brooks
2011	J	`jnl`	An Accelerator-Based Wireless Sensor Network Processor in 130 nm CMOS. IEEE J. Emerg. Sel. Topics Circuits Syst. Mark Hempstead, David M. Brooks, Gu-Yeon Wei
2011	J	`jnl`	Automating Design of Voltage Interpolation to Address Process Variations. IEEE Trans. Very Large Scale Integr. Syst. Kevin Brownell, Ali Durlov Khan, Gu-Yeon Wei, David M. Brooks
2011	J	`jnl`	CPUs, GPUs, and Hybrid Computing. IEEE Micro David M. Brooks
2011	A*	`conf`	Dimetrodon: processor-level preventive thermal management via idle cycle injection. DAC Peter Bailis, Vijay Janapa Reddi, Sanjay Gandhi, David M. Brooks, Margo I. Seltzer
2011	A	`conf`	Hardware in the loop for optical flow sensing in a robotic bee. IROS Pierre-Emile Duhamel, Judson Porter, Benjamin M. Finio, Geoffrey L. Barrows, David M. Brooks, Gu-Yeon Wei, Robert J. Wood
2011	Misc	`conf`	Implementing a hybrid SRAM / eDRAM NUCA architecture. HiPC Javier Lira, Carlos Molina, David M. Brooks, Antonio González
2011	J	`jnl`	Resilient Architectures via Collaborative Design: Maximizing Commodity Processor Performance in the Presence of Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Vijay Janapa Reddi, David M. Brooks
2011	—	`conf`	The alarms project: A hardware/software approach to addressing parameter variations. ASP-DAC David M. Brooks
2011	J	`jnl`	Voltage Noise in Production Processors. IEEE Micro Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David M. Brooks
2010	J	`jnl`	Applied inference: Case studies in microarchitectural design. ACM Trans. Archit. Code Optim. Benjamin C. Lee, David M. Brooks
2010	J	`jnl`	Can Subthreshold and Near-Threshold Circuits Go Mainstream? IEEE Micro Benton H. Calhoun, David M. Brooks
2010	J	`jnl`	Eliminating voltage emergencies via software-guided code transformations. ACM Trans. Archit. Code Optim. Vijay Janapa Reddi, Simone Campanoni, Meeta Sharma Gupta, Michael D. Smith, Gu-Yeon Wei, David M. Brooks, Kim M. Hazelwood
2010	J	`jnl`	Predicting Voltage Droops Using Recurring Program and Microarchitectural Event Activity. IEEE Micro Vijay Janapa Reddi, Meeta Sharma Gupta, Glenn H. Holloway, Michael D. Smith, Gu-Yeon Wei, David M. Brooks
2010	J	`jnl`	The Accelerator Store framework for high-performance, low-power accelerator-based systems. IEEE Comput. Archit. Lett. Michael J. Lyons, Mark Hempstead, Gu-Yeon Wei, David M. Brooks
2010	A*	`conf`	Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-Guided Thread Scheduling. MICRO Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David M. Brooks
2009	Misc	`conf`	An accelerator-based wireless sensor network processor in 130nm CMOS. CASES Mark Hempstead, Gu-Yeon Wei, David M. Brooks
2009	A	`conf`	An event-guided approach to reducing voltage noise in processors. DATE Meeta Sharma Gupta, Vijay Janapa Reddi, Glenn H. Holloway, Gu-Yeon Wei, David M. Brooks
2009	C	`conf`	Design and test strategies for microarchitectural post-fabrication tuning. ICCD Xiaoyao Liang, Benjamin C. Lee, Gu-Yeon Wei, David M. Brooks
2009	C	`conf`	Empirical performance models for 3T1D memories. ICCD Kristen Lovin, Benjamin C. Lee, Xiaoyao Liang, David M. Brooks, Gu-Yeon Wei
2009	J	`jnl`	Energy- and area-efficient architectures through application clustering and architectural heterogeneity. ACM Trans. Archit. Code Optim. Lukasz Strozek, David M. Brooks
2009	—	`conf`	Place and route considerations for voltage interpolated designs. ISQED Kevin Brownell, Ali Durlov Khan, David M. Brooks, Gu-Yeon Wei
2009	J	`jnl`	Revival: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency. IEEE Micro Xiaoyao Liang, Gu-Yeon Wei, David M. Brooks
2009	A*	`conf`	Software-assisted hardware reliability: abstracting circuit-level challenges to the software stack. DAC Vijay Janapa Reddi, Simone Campanoni, Meeta Sharma Gupta, Michael D. Smith, Gu-Yeon Wei, David M. Brooks
2009	A	`conf`	The design of a bloom filter hardware accelerator for ultra low power systems. ISLPED Michael J. Lyons, David M. Brooks
2009	A*	`conf`	Thread motion: fine-grained power management for multi-core systems. ISCA Krishna K. Rangan, Gu-Yeon Wei, David M. Brooks
2009	A*	`conf`	Tribeca: design for PVT variations with local recovery and fine-grained adaptation. MICRO Meeta Sharma Gupta, Jude A. Rivers, Pradip Bose, Gu-Yeon Wei, David M. Brooks
2009	A*	`conf`	Voltage emergency prediction: Using signatures to reduce operating margins. HPCA Vijay Janapa Reddi, Meeta Sharma Gupta, Glenn H. Holloway, Gu-Yeon Wei, Michael D. Smith, David M. Brooks
2008	—	`conf`	A Process-Variation-Tolerant Floating-Point Unit with Voltage Interpolation and Variable Latency. ISSCC Xiaoyao Liang, David M. Brooks, Gu-Yeon Wei
2008	A*	`conf`	CPR: Composable performance regression for scalable multiprocessor models. MICRO Benjamin C. Lee, Jamison D. Collins, Hong Wang, David M. Brooks
2008	A*	`conf`	DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors. HPCA Meeta Sharma Gupta, Krishna K. Rangan, Michael D. Smith, Gu-Yeon Wei, David M. Brooks
2008	A*	`conf`	Efficiency trends and limits from comprehensive microarchitectural adaptivity. ASPLOS Benjamin C. Lee, David M. Brooks
2008	A	`conf`	Evaluation of voltage interpolation to address process variations. ICCAD Kevin Brownell, Gu-Yeon Wei, David M. Brooks
2008	J	`jnl`	Guest Editors' Introduction: Top Picks from the Computer Architecture Conferences of 2007. IEEE Micro Sarita V. Adve, David M. Brooks, Craig B. Zilles
2008	A	`conf`	Instruction-driven clock scheduling with glitch mitigation. ISLPED Gu-Yeon Wei, David M. Brooks, Ali Durlov Khan, Xiaoyao Liang
2008	A*	`conf`	ReVIVaL: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency. ISCA Xiaoyao Liang, Gu-Yeon Wei, David M. Brooks
2008	J	`jnl`	Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability. IEEE Micro Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David M. Brooks
2008	A*	`conf`	Roughness of microarchitectural design topologies and its implications for optimization. HPCA Benjamin C. Lee, David M. Brooks
2008	J	`jnl`	Survey of Hardware Systems for Wireless Sensor Networks. J. Low Power Electron. Mark Hempstead, Michael J. Lyons, David M. Brooks, Gu-Yeon Wei
2008	C	`conf`	System design considerations for sensor network applications. ISCAS Mark Hempstead, Gu-Yeon Wei, David M. Brooks
2008	A*	`conf`	System level analysis of fast, per-core DVFS using on-chip switching regulators. HPCA Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, David M. Brooks
2007	A	`conf`	Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques. ICCAD Xiaoyao Liang, Kerem Turgay, David M. Brooks
2007	A*	`conf`	Illustrative Design Space Studies with Microarchitectural Regression Models. HPCA Benjamin C. Lee, David M. Brooks
2007	B	`conf`	Methods of inference and learning for performance modeling of parallel applications. PPoPP Benjamin C. Lee, David M. Brooks, Bronis R. de Supinski, Martin Schulz, Karan Singh, Sally A. McKee
2007	J	`jnl`	Power, Thermal, and Reliability Modeling in Nanometer-Scale Microprocessors. IEEE Micro David M. Brooks, Robert P. Dick, Russ Joseph, Li Shang
2007	A*	`conf`	Process Variation Tolerant 3T1D-Based Cache Architectures. MICRO Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David M. Brooks
2007	J	`jnl`	Spatial Sampling and Regression Strategies. IEEE Micro Benjamin C. Lee, David M. Brooks
2007	A	`conf`	Towards a software approach to mitigate voltage emergencies. ISLPED Meeta Sharma Gupta, Krishna K. Rangan, Michael D. Smith, Gu-Yeon Wei, David M. Brooks
2007	A	`conf`	Understanding voltage variations in chip multiprocessors using a distributed power-delivery network. DATE Meeta Sharma Gupta, Jarod L. Oatley, Russ Joseph, Gu-Yeon Wei, David M. Brooks
2006	A*	`conf`	Accurate and efficient regression modeling for microarchitectural performance and power prediction. ASPLOS Benjamin C. Lee, David M. Brooks
2006	Misc	`conf`	Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations. CASES Mark Hempstead, Gu-Yeon Wei, David M. Brooks
2006	A*	`conf`	CMP design space exploration subject to physical constraints. HPCA Yingmin Li, Benjamin C. Lee, David M. Brooks, Zhigang Hu, Kevin Skadron
2006	J	`jnl`	Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. IEEE Micro Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David M. Brooks
2006	Misc	`conf`	Efficient architectures through application clustering and architectural heterogeneity. CASES Lukasz Strozek, David M. Brooks
2006	A	`conf`	Microarchitecture parameter selection to optimize system performance under process variation. ICCAD Xiaoyao Liang, David M. Brooks
2006	A*	`conf`	Mitigating the Impact of Process Variations on Processor Register Files and Execution Units. MICRO Xiaoyao Liang, David M. Brooks
2006	—	`conf`	System-on-Chip Architecture Design for Intelligent Sensor Networks. IIH-MSP Wai-Chi Fang, Sharon Kedar, Susan Owen, Gu-Yeon Wei, David M. Brooks, Jonathan Lees
2005	A*	`conf`	A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. MICRO Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David M. Brooks
2005	A*	`conf`	An Ultra Low Power System Architecture for Sensor Network Applications. ISCA Mark Hempstead, Nikhil Tripathi, Patrick Mauro, Gu-Yeon Wei, David M. Brooks
2005	A*	`conf`	Performance, Energy, and Thermal Considerations for SMT and CMP Architectures. HPCA Yingmin Li, David M. Brooks, Zhigang Hu, Kevin Skadron
2005	A	`conf`	Power and thermal effects of SRAM vs. Latch-Mux design styles and clock gating choices. ISLPED Yingmin Li, Mark Hempstead, Patrick Mauro, David M. Brooks, Zhigang Hu, Kevin Skadron
2004	A	`conf`	Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization. ISLPED Kim M. Hazelwood, David M. Brooks
2004	C	`conf`	Evaluating Techniques for Exploiting Instruction Slack. ICCD Yau Chin, John Sheu, David M. Brooks
2004	J	`jnl`	Integrated Analysis of Power and Performance for Pipelined Microprocessors. IEEE Trans. Computers Victor V. Zyuban, David M. Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N. Strenski, Philip G. Emma
2004	J	`jnl`	Power-performance simulation: design and validation strategies. SIGMETRICS Perform. Evaluation Rev. David M. Brooks, Pradip Bose, Margaret Martonosi
2004	B	`conf`	TinyBench: The Case For A Standardized Benchmark Suite for TinyOS Based Wireless Sensor Network Devices. LCN Mark Hempstead, Matt Welsh, David M. Brooks
2004	A	`conf`	Understanding the energy efficiency of simultaneous multithreading. ISLPED Yingmin Li, David M. Brooks, Zhigang Hu, Kevin Skadron, Pradip Bose
2003	A*	`conf`	Control Techniques to Eliminate Voltage Emergencies in High Performance Processors. HPCA Russ Joseph, David M. Brooks, Margaret Martonosi
2003	J	`jnl`	New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors. IBM J. Res. Dev. David M. Brooks, Pradip Bose, Viji Srinivasan, Michael Gschwind, Philip G. Emma, Michael G. Rosenfield
2002	—	`conf`	Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. PACS Pradip Bose, David M. Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, Sandhya Dwarkadas
2002	A*	`conf`	Optimizing pipelines for power and performance. MICRO Viji Srinivasan, David M. Brooks, Michael Gschwind, Pradip Bose, Victor V. Zyuban, Philip N. Strenski, Philip G. Emma
2001	—	`conf`	A circuit level implementation of an adaptive issue queue for power-aware microprocessors. ACM Great Lakes Symposium on VLSI Alper Buyuktosunoglu, David H. Albonesi, Stanley Schuster, David M. Brooks, Pradip Bose, Peter W. Cook
2001	A*	`conf`	Dynamic Thermal Management for High-Performance Microprocessors. HPCA David M. Brooks, Margaret Martonosi
2000	—	`conf`	An Adaptive Issue Queue for Reduced Power at High Performance. PACS Alper Buyuktosunoglu, Stanley Schuster, David M. Brooks, Pradip Bose, Peter W. Cook, David H. Albonesi
2000	J	`jnl`	Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. IEEE Micro David M. Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, Peter W. Cook
2000	—	`conf`	Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor. PACS David M. Brooks, Margaret Martonosi, John-David Wellman, Pradip Bose
2000	J	`jnl`	Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance. ACM Trans. Comput. Syst. David M. Brooks, Margaret Martonosi
2000	A*	`conf`	Wattch: a framework for architectural-level power analysis and optimizations. ISCA David M. Brooks, Vivek Tiwari, Margaret Martonosi
1999	A*	`conf`	Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance. HPCA David M. Brooks, Margaret Martonosi
1999	—	`conf`	Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware. CANPC David M. Brooks, Margaret Martonosi