David J. Frank

23 papers A 5C 1Misc 1Journal 11Unranked 5

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	22.2 A 16-Channel Low-Power Cryo-CMOS Flux Control Pulse Generator ASIC in 14nm FinFET Technology. ISSCC Kevin Tien, David J. Frank, John F. Bulzacchelli, Pat Rosno, Daniel Moertl, John Timmerwilke, Ari Noori, Devin Underwood, Ken Inoue, Subhajit Ray, Daniel Ramirez, Timothy J. Schmerbeck, Bryce Snell, Jeremy Ekman, Ryan Black, Mark Yeck, Tom Haselhorst, Emma Erickson, Kevin Demsky, Christian W. Baks, Jonathan Kaus, Andrea Ruffino, Pier Andrea Francese, Andy Davies, Sudipto Chakraborty, Scott Lekuch, Brian P. Gaucher, Bodhisatwa Sadhu, Scott Willenborg, Daniel J. Friedman
2025	—	`conf`	Cryogenic CMOS Circuits for Future Scaled Quantum Computing Systems: Challenges and Solutions. CICC Bodhisatwa Sadhu, Kevin Tien, Sudipto Chakraborty, David J. Frank, Pat Rosno, Daniel Moertl, Mark Yeck, John F. Bulzacchelli, Daniil Frolov, Devin Underwood, Ken Inoue, Christian W. Baks, Daniel Ramirez, Jeremy Ekman, Ryan Black, Timothy J. Schmerbeck, Ray Richetta, Dereje Yilma, Andrew Davies, Joseph A. Glick, Dorothy Wisnieff, Bryce Snell, John Timmerwilke, Raphael Robertazzi, George Zettles, Scott Lekuch, Scott Willenborg, Brian P. Gaucher, Daniel J. Friedman
2025	A	`conf`	Design Techniques for Ultra-low Power Cryogenic CMOS for Quantum Computing Applications. ISLPED Sudipto Chakraborty, Pat Rosno, John F. Bulzacchelli, David J. Frank, Rajiv V. Joshi, Daniel J. Friedman
2024	Misc	`conf`	Characterization of 14nm CMOS Technology At Cryogenic Temperatures Using Dense Addressable Arrays. VTS Raphael Robertazzi, David J. Frank, Kevin Tien, John Timmerwilke, Peilin Song, Daniel J. Friedman
2023	—	`conf`	Low power cryogenic RF ASICs for quantum computing. CICC David J. Frank, Sudipto Chakraborty, Kevin Tien, Pat Rosno, Mark Yeck, Joseph A. Glick, Raphael Robertazzi, Ray Richetta, John F. Bulzacchelli, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv V. Joshi, Scott Lekuch, Ken Inoue, Devin Underwood, Dorothy Wisnieff, Chris Baks, John Timmerwilke, Peilin Song, Blake R. Johnson, Brian P. Gaucher, Daniel J. Friedman
2022	—	`conf`	A Cryo-CMOS Low-Power Semi-Autonomous Qubit State Controller in 14nm FinFET Technology. ISSCC David J. Frank, Sudipto Chakraborty, Kevin Tien, Pat Rosno, Thomas Fox, Mark Yeck, Joseph A. Glick, Raphael Robertazzi, Ray Richetta, John F. Bulzacchelli, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv V. Joshi, Shawn D. Chambers, Scott Lekuch, Ken Inoue, Devin Underwood, Dorothy Wisnieff, Christian W. Baks, Donald Bethune, John Timmerwilke, Blake R. Johnson, Brian P. Gaucher, Daniel J. Friedman
2022	J	`jnl`	A Cryo-CMOS Low-Power Semi-Autonomous Transmon Qubit State Controller in 14-nm FinFET Technology. IEEE J. Solid State Circuits Sudipto Chakraborty, David J. Frank, Kevin Tien, Pat Rosno, Mark Yeck, Joseph A. Glick, Raphael Robertazzi, Ray Richetta, John F. Bulzacchelli, Devin Underwood, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv V. Joshi, Shawn D. Chambers, Scott Lekuch, Ken Inoue, Dorothy Wisnieff, Christian W. Baks, Donald S. Bethune, John Timmerwilke, Thomas Fox, Peilin Song, Blake R. Johnson, Brian P. Gaucher, Daniel J. Friedman
2022	A	`conf`	A Cryo-CMOS Transmon Qubit Controller and Verification with FPGA Emulation. DATE Kevin Tien, Ken Inoue, Scott Lekuch, David J. Frank, Sudipto Chakraborty, Pat Rosno, Thomas Fox, Mark Yeck, Joseph A. Glick, Raphael Robertazzi, Ray Richetta, John F. Bulzacchelli, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv V. Joshi, Devin Underwood, Dorothy Wisnieff, Christian W. Baks, Donald Bethune, John Timmerwilke, Blake R. Johnson, Brian P. Gaucher, Daniel J. Friedman
2016	C	`conf`	Synthesis design strategies for energy-efficient microprocessors. ICCD Ching Zhou, Yu-Shiang Lin, Pong-Fei Lu, Bruce M. Fleischer, David J. Frank, Leland Chang
2010	J	`jnl`	Practical Strategies for Power-Efficient Computing Technologies. Proc. IEEE Leland Chang, David J. Frank, Robert K. Montoye, Steven J. Koester, Brian L. Ji, Paul W. Coteus, Robert H. Dennard, Wilfried Haensch
2006	A	`conf`	Design and CAD challenges in 45nm CMOS and beyond. ICCAD David J. Frank, Ruchir Puri, Dorel Toma
2006	J	`jnl`	High-performance CMOS variability in the 65-nm regime and beyond. IBM J. Res. Dev. Kerry Bernstein, David J. Frank, Anne E. Gattiker, Wilfried Haensch, Brian L. Ji, Sani R. Nassif, Edward J. Nowak, Dale J. Pearson, Norman J. Rohrer
2006	J	`jnl`	Optimizing CMOS technology for maximum performance. IBM J. Res. Dev. David J. Frank, Wilfried Haensch, Ghavam G. Shahidi, Omer H. Dokumaci
2006	J	`jnl`	Three-dimensional integrated circuits. IBM J. Res. Dev. Anna W. Topol, Douglas C. La Tulipe Jr., Leathen Shi, David J. Frank, Kerry Bernstein, Steven E. Steen, Arvind Kumar, Gilbert U. Singco, Albert M. Young, Kathryn W. Guarini, Mei-Kei Ieong
2002	J	`jnl`	Power-constrained CMOS scaling limits. IBM J. Res. Dev. David J. Frank
2001	J	`jnl`	Device scaling limits of Si MOSFETs and their application dependencies. Proc. IEEE David J. Frank, Robert H. Dennard, Edward J. Nowak, Paul M. Solomon, Yuan Taur, Hon-Sum Philip Wong
1999	J	`jnl`	Nanoscale CMOS. Proc. IEEE Hon-Sum Philip Wong, David J. Frank, Paul M. Solomon, Clement H. J. Wann, Jefferey J. Welser
1997	J	`jnl`	CMOS scaling into the nanometer regime. Proc. IEEE Yuan Taur, Douglas A. Buchanan, Wei Chen, David J. Frank, Khalid E. Ismail, Shih-Hsien Lo, George A. Sai-Halasz, Raman G. Viswanathan, Hsing-Jen C. Wann, Shalom J. Wind, Hon-Sum Philip Wong
1997	A	`conf`	Supply and threshold voltage optimization for low power design. ISLPED David J. Frank, Paul M. Solomon, Scott K. Reynolds, John Shin
1996	A	`conf`	Comparison of high speed voltage-scaled conventional and adiabatic circuits. ISLPED David J. Frank
1995	J	`jnl`	CMOS scaling into the 21st century: 0.1 µm and beyond. IBM J. Res. Dev. Yuan Taur, Yuh-Jier Mii, David J. Frank, H.-S. Philip Wong, Douglas A. Buchanan, Shalom J. Wind, Stephen A. Rishton, Watson A. Sai-Halasz, Edward J. Nowak
1995	—	`conf`	Electroid-oriented adiabatic switching circuits. ISLPD David J. Frank, Paul M. Solomon
1988	J	`jnl`	The design of a fully integrated graphics system. IEEE J. Solid State Circuits Randy R. Torrance, Steve P. Sadler, J. Pierre Lamoureux, Jean Lamarche, David J. Frank, Francois Leveille