David J. Allstot

150 papers A 3C 31Misc 1Journal 71Unranked 44

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	A Chopper-Stabilized Switched-Capacitor Front-End for Peripheral Nervous System Recording. IEEE Trans. Circuits Syst. I Regul. Pap. Jialin Liu, David J. Allstot
2023	—	`conf`	A Digitally Configurable Outphasing Switched-Capacitor-Based RF Transmitter. MWSCAS Ajmal Vadakkan Kayyil, Bo Qiao, David J. Allstot
2023	J	`jnl`	Compressed Sensing Σ-Δ Modulators and a Recovery Algorithm for Multi-Channel Wireless Bio-Signal Acquisition. IEEE Trans. Circuits Syst. I Regul. Pap. Jialin Liu, David J. Allstot
2022	—	`conf`	Switched-Capacitor Circuits. CICC David J. Allstot, Un-Ku Moon, Gabor C. Temes
2021	—	`conf`	A Switched-Capacitor Closed-Loop Integration Sampling Front-End for Peripheral Nerve Recording. BioCAS Jialin Liu, David J. Allstot
2021	C	`conf`	Compressed Sensing Σ-Δ Modulators and Recovery Algorithm for Multi-Channel Bio-Signal Acquisition. ISCAS Jialin Liu, David J. Allstot
2021	C	`conf`	I/Q-Sharing Switched-Capacitor Power Amplifier with Baseband Harmonic-Rejection and Wilkinson Combiner. ISCAS Bo Qiao, Ajmal Vadakkan Kayyil, Jeffrey S. Walling, David J. Allstot
2021	C	`conf`	Linearity Improvement Techniques for CMOS Switched-Capacitor Power Amplifiers. ISCAS Ajmal Vadakkan Kayyil, Bo Qiao, David J. Allstot
2020	—	`conf`	10.7 A 0.26mm ISSCC Si-Wook Yoo, Shih-Chang Hung, Jeffrey S. Walling, David J. Allstot, Sang-Min Yoo
2020	C	`conf`	Transformer-Combining Digital PA with Efficiency Peaking at 0, -6, and -12 dB Backoff in 32nm CMOS. ISCAS Parmoon Seddighrad, Yorgos Palaskas, Hongtao Xu, Paolo Madoglio, Kailash Chandrashekar, David J. Allstot
2020	—	`conf`	Windowed Integration Sampling in Bio-Signal Front-End Design. MWSCAS Jialin Liu, David J. Allstot
2020	C	`conf`	gm/ID Design Considerations for Subthreshold-Based CMOS Two-Stage Operational Amplifiers. ISCAS Chaiyanut Aueamnuay, Ajmal Vadakkan Kayyil, Jialin Liu, Narayana Bhagirath Thota, David J. Allstot
2020	C	`conf`	gm/ID-Based Frequency Compensation of CMOS Two-Stage Operational Amplifiers. ISCAS Chaiyanut Aueamnuay, Ajmal Vadakkan Kayyil, Narayana Bhagirath Thota, Praveen Kumar Venkatachala, David J. Allstot
2019	C	`conf`	A Two-Stage CMOS OTA with Load-Pole Cancellation. ISCAS Ajmal Vadakkan Kayyil, Pavan Kumar Ramakrishna, OnnLim Yong, David J. Allstot, Howard C. Yang
2019	—	`conf`	Low-Voltage Tracking RC Frequency Compensation in Two-Stage Operational Amplifiers MWSCAS Yu-Wen Kuo, Pavan Kumar Ramakrishna, Ajmal Vadakkan Kayyil, David J. Allstot
2017	J	`jnl`	Frequency-Channelized Mismatch-Shaped Quadrature Data Converters for Carrier Aggregation in MU-MIMO LTE-A. IEEE Trans. Circuits Syst. I Regul. Pap. Sandipan Kundu, Subhanshu Gupta, David J. Allstot, Jeyanandh Paramesh
2015	—	`conf`	DAC mismatch shaping for quadrature sigma-delta data converters. MWSCAS Sandipan Kundu, Subhanshu Gupta, David J. Allstot, Jeyanandh Paramesh
2014	J	`jnl`	Compressed Sensing Analog Front-End for Bio-Sensor Applications. IEEE J. Solid State Circuits Daibashish Gangopadhyay, Emily G. Allstot, Anna M. R. Dixon, Karthik Natarajan, Subhanshu Gupta, David J. Allstot
2013	J	`jnl`	A Class-G Switched-Capacitor RF Power Amplifier. IEEE J. Solid State Circuits Sang-Min Yoo, Jeffrey S. Walling, Ofir Degani, Benjamin Jann, Ram Sadhwani, Jacques Christophe Rudell, David J. Allstot
2012	J	`jnl`	A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS. IEEE J. Solid State Circuits Subhanshu Gupta, Daibashish Gangopadhyay, Hasnain Lakdawala, Jacques Christophe Rudell, David J. Allstot
2012	C	`conf`	A 1.1µW 2.1µVRMS input noise chopper-stabilized amplifier for bio-medical applications. ISCAS Christopher J. Mandic, Daibashish Gangopadhyay, David J. Allstot
2012	J	`jnl`	Compressed Sensing System Considerations for ECG and EMG Wireless Biosensors. IEEE Trans. Biomed. Circuits Syst. Anna M. R. Dixon, Emily G. Allstot, Daibashish Gangopadhyay, David J. Allstot
2012	J	`jnl`	Digital power amplifier: A new way to exploit the switched-capacitor circuit. IEEE Commun. Mag. Jeffrey S. Walling, Sang-Min Yoo, David J. Allstot
2012	J	`jnl`	Editorial. IEEE J. Emerg. Sel. Topics Circuits Syst. David J. Allstot, Riccardo Rovatti, Gianluca Setti
2012	J	`jnl`	Multi-rate Polyphase DSP and LMS Calibration Schemes for Oversampled ADCs. J. Signal Process. Syst. Subhanshu Gupta, Yi Tang, Jeyanandh Paramesh, David J. Allstot
2011	J	`jnl`	A 2.4-GHz Extended-Range Type-I SigmaDelta Fractional-N Synthesizer With 1.8-MHz Loop Bandwidth and -110-dBc/Hz Phase Noise. IEEE Trans. Circuits Syst. II Express Briefs Sudip Shekhar, Daibashish Gangopadhyay, Eum Chan Woo, David J. Allstot
2011	J	`jnl`	A CMOS 1.6 GHz Dual-Loop PLL With Fourth-Harmonic Mixing. IEEE Trans. Circuits Syst. I Regul. Pap. Sankaran Aniruddhan, Sudip Shekhar, David J. Allstot
2011	J	`jnl`	A Switched-Capacitor RF Power Amplifier. IEEE J. Solid State Circuits Sang-Min Yoo, Jeffrey S. Walling, Eum Chan Woo, Benjamin Jann, David J. Allstot
2011	—	`conf`	A switched-capacitor power amplifier for EER/polar transmitters. ISSCC Sang-Min Yoo, Jeffrey S. Walling, Eum Chan Woo, David J. Allstot
2011	C	`conf`	Analog Chirp Fourier Transform for high-resolution real-time wideband RF spectrum Analysis. ISCAS Daibashish Gangopadhyay, Andrew Y. Chen, David J. Allstot
2011	C	`conf`	Compressed sensing reconstruction: Comparative study with applications to ECG bio-signals. ISCAS Anna M. R. Dixon, Emily G. Allstot, Andrew Y. Chen, Daibashish Gangopadhyay, David J. Allstot
2011	C	`conf`	Compressive sampling of EMG bio-signals. ISCAS Aabeeya Salman, Emily G. Allstot, Andrew Y. Chen, Anna M. R. Dixon, Daibashish Gangopadhyay, David J. Allstot
2011	Misc	`conf`	Multi-rate polyphase DSP and LMS calibration schemes for oversampled data conversion systems. ICASSP Subhanshu Gupta, Yi Tang, Kuang-Wei Cheng, Jeyanandh Paramesh, David J. Allstot
2011	—	`conf`	Towards greener wireless transmission: Efficient power amplifier design. IGCC Karthik Natarajan, Sang-Min Yoo, David J. Allstot, Jeffrey S. Walling
2010	C	`conf`	A 1.6 mW 5.4 GHz transformer-feedback gm-boosted current-reuse LNA in 0.18/μm CMOS. ISCAS Daibashish Gangopadhyay, Sudip Shekhar, Jeffrey S. Walling, David J. Allstot
2010	J	`jnl`	A Current Reuse Quadrature GPS Receiver in 0.13 μ m CMOS. IEEE J. Solid State Circuits Kuang-Wei Cheng, Karthik Natarajan, David J. Allstot
2010	C	`conf`	A Mode-I/Mode-III UWB LNA with programmable gain and 20 dB WLAN blocker rejection in 130nm CMOS. ISCAS Subhanshu Gupta, Daibashish Gangopadhyay, David J. Allstot
2010	J	`jnl`	An 11.1 mW 42 MS/s 10 b ADC With Two-Step Settling in 0.18 μ m CMOS. IEEE J. Solid State Circuits Charles T. Peach, Un-Ku Moon, David J. Allstot
2010	J	`jnl`	Linearizing CMOS Switching Power Amplifiers Using Supply Regulators. IEEE Trans. Circuits Syst. II Express Briefs Jeffrey S. Walling, David J. Allstot
2010	C	`conf`	U-shaped slow-wave transmission lines in 0.18μm CMOS. ISCAS Heng-Chia Hsu, Kaushik Dasgupta, Nathan M. Neihart, Sudip Shekhar, Jeffrey S. Walling, David J. Allstot
2009	—	`conf`	A 7.2mW quadrature GPS receiver in 0.13µm CMOS. ISSCC Kuang-Wei Cheng, Karthik Natarajan, David J. Allstot
2009	J	`jnl`	A Calibrated Phase and Amplitude Control System for a 1.9 GHz Phased-Array Transmitter Element. IEEE Trans. Circuits Syst. I Regul. Pap. Cameron T. Charles, David J. Allstot
2009	J	`jnl`	A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS. IEEE J. Solid State Circuits Jeffrey S. Walling, Hasnain Lakdawala, Yorgos Palaskas, Ashoke Ravi, Ofir Degani, Krishnamurthy Soumyanath, David J. Allstot
2009	J	`jnl`	A Class-G Supply Modulator and Class-E PA in 130 nm CMOS. IEEE J. Solid State Circuits Jeffrey S. Walling, Stewart S. Taylor, David J. Allstot
2009	J	`jnl`	A two-stage sensing technique for dynamic spectrum access. IEEE Trans. Wirel. Commun. Ling Luo, Nathan M. Neihart, Sumit Roy, David J. Allstot
2009	J	`jnl`	Integrated Quadrature Couplers and Their Application in Image-Reject Receivers. IEEE J. Solid State Circuits Dicle Ozis, Jeyanandh Paramesh, David J. Allstot
2009	J	`jnl`	Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver. IEEE Trans. Circuits Syst. I Regul. Pap. Sudip Shekhar, Ganesh Balamurugan, David J. Allstot, Mozhgan Mansuri, James E. Jaussi, Randy Mooney, Joseph T. Kennedy, Bryan Casper, Frank O'Mahony
2009	C	`conf`	Twisted Transformers for Low Coupling RF and Mixed Signal Applications. ISCAS Nathan M. Neihart, David J. Allstot, Matt Miller, Pat Rakers
2008	—	`conf`	A 27Gb/s Forwarded-Clock I/O Receiver Using an Injection-Locked LC-DCO in 45nm CMOS. ISSCC Frank O'Mahony, Sudip Shekhar, Mozhgan Mansuri, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Bryan Casper, David J. Allstot, Randy Mooney
2008	—	`conf`	A 28.6dBm 65nm Class-E PA with Envelope Restoration by Pulse-Width and Pulse-Position Modulation. ISSCC Jeffrey S. Walling, Hasnain Lakdawala, Yorgos Palaskas, Ashoke Ravi, Ofir Degani, Krishnamurthy Soumyanath, David J. Allstot
2008	C	`conf`	A buffered charge pump with zero charge sharing. ISCAS Cameron T. Charles, David J. Allstot
2008	J	`jnl`	CMOS VCO and LNA Using Tuned-Input Tuned-Output Circuits. IEEE J. Solid State Circuits Sudip Shekhar, Jeffrey S. Walling, Sankaran Aniruddhan, David J. Allstot
2008	J	`jnl`	Cascaded Complex ADCs With Adaptive Digital Calibration for I/Q Mismatch. IEEE Trans. Circuits Syst. I Regul. Pap. Yi Tang, Kuang-Wei Cheng, Subhanshu Gupta, Jeyanandh Paramesh, David J. Allstot
2008	J	`jnl`	Desensitized CMOS Low-Noise Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. Gaurab Banerjee, Krishnamurthy Soumyanath, David J. Allstot
2008	C	`conf`	Hybrid modeling techniques for low OSR cascade continuous-time SigmaDelta modulators. ISCAS Subhanshu Gupta, Yi Tang, David J. Allstot, Jeyanandh Paramesh
2008	—	`conf`	Twisted inductors for low coupling mixed-signal and RF applications. CICC Nathan M. Neihart, David J. Allstot, Matt Miller, Pat Rakers
2008	J	`jnl`	Wideband CMOS Amplifier Design: Time-Domain Considerations. IEEE Trans. Circuits Syst. I Regul. Pap. Jeffrey S. Walling, Sudip Shekhar, David J. Allstot
2007	C	`conf`	A Digital-Summing Feedforward Sigma-Delta Modulator and its Application to a Cascade ADC. ISCAS Yi Tang, Subhanshu Gupta, Jeyanandh Paramesh, David J. Allstot
2007	C	`conf`	A Parallel, Multi-Resolution Sensing Technique for Multiple Antenna Cognitive Radios. ISCAS Nathan M. Neihart, Sumit Roy, David J. Allstot
2007	C	`conf`	Monolithic Spiral Transformers: A Design Methodology. ISCAS Jeffrey S. Walling, David J. Allstot
2007	J	`jnl`	Reflective-Type Phase Shifters for Multiple-Antenna Transceivers. IEEE Trans. Circuits Syst. I Regul. Pap. Hossein Zarei, Cameron T. Charles, David J. Allstot
2006	C	`conf`	A 2-GHz CMOS variable gain amplifier optimized for low noise. ISCAS Cameron T. Charles, David J. Allstot
2006	C	`conf`	A 2-GHz integrated CMOS reflective-type phase shifter with 675° control range. ISCAS Cameron T. Charles, David J. Allstot
2006	J	`jnl`	A Calibrated Phase/Frequency Detector for Reference Spur Reduction in Charge-Pump PLLs. IEEE Trans. Circuits Syst. II Express Briefs Cameron T. Charles, David J. Allstot
2006	C	`conf`	A delay generation technique for fast-locking frequency synthesizers. ISCAS Sankaran Aniruddhan, Sudip Shekhar, David J. Allstot
2006	C	`conf`	A fully-differential CMOS Clapp VCO for IEEE 802.11a applications. ISCAS Sudip Shekhar, Sankaran Aniruddhan, David J. Allstot
2006	J	`jnl`	A matrix amplifier in 0.18-μm SOI CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Jinho Park, David J. Allstot
2006	C	`conf`	A variable-offset phase detector for phased-array applications. ISCAS Cameron T. Charles, David J. Allstot
2006	C	`conf`	Analysis and design of lumped-element quadrature couplers with lossy passive elements. ISCAS Dicle Ozis, Jeyanandh Paramesh, David J. Allstot
2006	J	`jnl`	Analysis of the Bridged T-Coil Circuit Using the Extra-Element Theorem. IEEE Trans. Circuits Syst. II Express Briefs Jeyanandh Paramesh, David J. Allstot
2006	J	`jnl`	Bandwidth Extension Techniques for CMOS Amplifiers. IEEE J. Solid State Circuits Sudip Shekhar, Jeffrey S. Walling, David J. Allstot
2006	J	`jnl`	Parasitic-aware design and optimization of a CMOS RF power amplifier. IEEE Trans. Circuits Syst. I Regul. Pap. Kiyong Choi, David J. Allstot
2006	J	`jnl`	Substrate Noise Coupling in SoC Design: Modeling, Avoidance, and Validation. Proc. IEEE Ali Afzali-Kusha, Makoto Nagata, Nishath K. Verghese, David J. Allstot
2005	—	`conf`	A 360° extended range phase detector for type-I PLLs. ISCAS (6) Cameron T. Charles, David J. Allstot
2005	—	`conf`	A 9-b 400 Msample/s pipelined analog-to digital converter in 90nm CMOS. ESSCIRC Charles T. Peach, Ashoke Ravi, Rosie Bishop, Krishnamurthy Soumyanath, David J. Allstot
2005	J	`jnl`	A capacitor cross-coupled common-gate low-noise amplifier. IEEE Trans. Circuits Syst. II Express Briefs Wei Zhuo, Xiaoyong Li, Sudip Shekhar, Sherif H. K. Embabi, José Pineda de Gyvez, David J. Allstot, Edgar Sánchez-Sinencio
2005	J	`jnl`	A four-antenna receiver in 90-nm CMOS for beamforming and spatial diversity. IEEE J. Solid State Circuits Jeyanandh Paramesh, Ralph Bishop, Krishnamurthy Soumyanath, David J. Allstot
2005	—	`conf`	A full-range all-pass variable phase shifter for multiple antenna receivers. ISCAS (3) Hossein Zarei, Allan Ecker, Jinho Park, David J. Allstot
2005	—	`conf`	An elitist distributed particle swarm algorithm for RF IC optimization. ASP-DAC Min Chu, David J. Allstot
2005	—	`conf`	Architectural issues in base-station frequency synthesizers. ISCAS (6) Sankaran Aniruddhan, David J. Allstot
2005	—	`conf`	Bridging Circuits and Electromagnetics in a Curriculum Aimed at Microelectronic Analog and Microwave Simulation and Design. MSE Vikram Jandhyala, Yasuo Kuga, David J. Allstot, Chuanjin Richard Shi
2005	—	`conf`	Design considerations for a 10 GHz CMOS transmit-receive switch. ISCAS (3) K. M. Naegle, Subhanshu Gupta, David J. Allstot
2005	J	`jnl`	Elitist nondominated sorting genetic algorithm based RF IC optimizer. IEEE Trans. Circuits Syst. I Regul. Pap. Min Chu, David J. Allstot
2005	J	`jnl`	G IEEE J. Solid State Circuits Xiaoyong Li, Sudip Shekhar, David J. Allstot
2005	—	`conf`	Phase-locked loop synthesis using hierarchical divide-and-conquer multi-optimization. ASP-DAC Min Chu, David J. Allstot
2004	—	`conf`	A 12.5 GHz RF matrix amplifier in 180nm SOI CMOS. ISCAS (1) Jinho Park, David J. Allstot
2004	—	`conf`	A 6 GHz low-noise quadrature Colpitts VCO. ICECS Min Chu, David J. Allstot
2004	—	`conf`	A lateral-BJT-biased CMOS voltage-controlled oscillator. ISCAS (1) Sankaran Aniruddhan, Min Chu, David J. Allstot
2004	J	`jnl`	A quad-band GSM-GPRS transmitter with digital auto-calibration. IEEE J. Solid State Circuits See Taur Lee, Sher Jiun Fang, David J. Allstot, Abdellatif Bellaouar, Ahmed R. Fridi, Paul Fontaine
2004	—	`conf`	A tunable transmission line phase shifter (TTPS). ISCAS (1) Taeik Kim, David J. Allstot
2004	J	`jnl`	Compact model generation for on-chip transmission lines. IEEE Trans. Circuits Syst. I Regul. Pap. Taeik Kim, Xiaoyong Li, David J. Allstot
2004	—	`conf`	Desensitized design of MOS low noise amplifiers by R ICECS Gaurab Banerjee, David T. Becher, Celia Hung, Krishnamurthy Soumyanath, David J. Allstot
2004	—	`conf`	Design considerations for anti-phase injected quadrature voltage controlled oscillators. ICECS Min Chu, Sudip Shekhar, David J. Allstot, Tarun Kanti Bhattacharyya
2004	J	`jnl`	Digital calibration for monotonic pipelined A/D converters. IEEE Trans. Instrum. Meas. Jianjun Guo, Waisiu Law, Ward J. Helms, David J. Allstot
2004	—	`conf`	Measurement and modeling of noise parameters for desensitized low noise amplifiers. CICC Gaurab Banerjee, David T. Becher, Celia Hung, David J. Allstot, Krishnamurthy Soumyanath
2004	—	`conf`	NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO. ASP-DAC Min Chu, David J. Allstot, Jeffrey M. Huard, Kim Y. Wong
2004	J	`jnl`	Parasitic-aware RF circuit design and optimization. IEEE Trans. Circuits Syst. I Regul. Pap. Jinho Park, Kiyong Choi, David J. Allstot
2004	—	`conf`	Post-optimization design centering for RF integrated circuits. ISCAS (1) Kiyong Choi, David J. Allstot
2004	—	`conf`	RF circuit synthesis using particle swarm optimization. ISCAS (5) Jinho Park, David J. Allstot
2003	—	`conf`	A mixed-signal calibration technique for low-voltage CMOS 1.5-bit/stage pipeline data converters. ISCAS (1) Jianjun Guo, Waisiu Law, Charles T. Peach, Ward J. Helms, David J. Allstot
2003	—	`conf`	A monotonic digital calibration technique for pipelined data converters. ISCAS (1) Waisiu Law, Jianjun Guo, Charles T. Peach, Ward J. Helms, David J. Allstot
2003	—	`conf`	A resonant pad for ESD protected narrowband CMOS RF applications. ISCAS (1) J. Shorb, Xiaoyong Li, David J. Allstot
2003	—	`conf`	A symmetric miniature 3D inductor. ISCAS (1) Srinivas Kodali, David J. Allstot
2003	—	`conf`	Accurate compact model extraction for on-chip coplanar waveguides. ISCAS (4) Taeik Kim, Xiaoyong Li, David J. Allstot
2003	—	`conf`	An 8-bit, 1.8 V, 20 MSample/s analog-to-digital converter using low gain opamps. ISCAS (1) D. R. Beck, David J. Allstot, D. Garrity
2003	—	`conf`	On-chip inductor structures: a comparative study. ISCAS (1) Srinivas Kodali, Taeik Kim, David J. Allstot
2003	—	`conf`	Parasitic-aware design and optimization of a fully integrated CMOS wideband amplifier. ASP-DAC Jinho Park, Kiyong Choi, David J. Allstot
2002	J	`jnl`	A 0.5-8.5 GHz fully differential CMOS distributed amplifier. IEEE J. Solid State Circuits Hee-Tae Ahn, David J. Allstot
2002	—	`conf`	A 2 GHz CMOS even harmonic mixer for direct conversion receivers. ISCAS (4) Sher Jiun Fang, See Taur Lee, David J. Allstot, Abdellatif Bellaouar
2002	—	`conf`	Class AB-D-G line driver for central office asymmetric digital subscriber line systems. ISCAS (5) J. Shorb, David J. Allstot, R. Roze
2002	—	`conf`	Matching considerations in I/Q A/D converter pairs. ISCAS (3) Charles T. Peach, Waisiu Law, D. R. Beck, Ward J. Helms, David J. Allstot
2002	—	`conf`	Parasitic-aware synthesis of RF CMOS switching power amplifiers. ISCAS (1) Kiyong Choi, David J. Allstot, Sayfe Kiaei
2001	J	`jnl`	Design and optimization of CMOS RF power amplifiers. IEEE J. Solid State Circuits Ravi Gupta, Brian M. Ballweber, David J. Allstot
2000	J	`jnl`	A fully integrated 0.5-5.5 GHz CMOS distributed amplifier. IEEE J. Solid State Circuits Brian M. Ballweber, Ravi Gupta, David J. Allstot
2000	J	`jnl`	A low-jitter 1.9-V CMOS PLL for UltraSPARC microprocessor applications. IEEE J. Solid State Circuits Hee-Tae Ahn, David J. Allstot
2000	J	`jnl`	Correction to "A fully integrated 0.5 - 5.5-GHz CMOS distributed amplifier". IEEE J. Solid State Circuits Brian M. Ballweber, Ravi Gupta, David J. Allstot
1999	J	`jnl`	A multistage amplifier technique with embedded frequency compensation. IEEE J. Solid State Circuits Hiok-Tiaq Ng, Ramsin M. Ziazadeh, David J. Allstot
1999	J	`jnl`	Addition to "Monolithic transformers and their application in a differential CMOS RF low-noise amplifier". IEEE J. Solid State Circuits Jianjun Zhou, David J. Allstot
1999	J	`jnl`	Fully monolithic CMOS RF power amplifiers: recent advances. IEEE Commun. Mag. Ravi Gupta, David J. Allstot
1998	—	`conf`	A multistage amplifier topology with embedded tracking compensation. CICC Ramsin M. Ziazadeh, Hiok-Tiaq Ng, David J. Allstot
1998	J	`jnl`	Computer-aided design considerations for mixed-signal coupling in RF integrated circuits. IEEE J. Solid State Circuits Nishath K. Verghese, David J. Allstot
1998	J	`jnl`	Monolithic transformers and their application in a differential CMOS RF low-noise amplifier. IEEE J. Solid State Circuits Jianjun Zhou, David J. Allstot
1998	J	`jnl`	Noise considerations for mixed-signal RF IC transceivers. Wirel. Networks Sayfe Kiaei, David J. Allstot, Ken Hansen, Nishath K. Verghese
1997	J	`jnl`	A low-power backward equalizer for DFE read-channel applications. IEEE J. Solid State Circuits Rohit Mittal, Kimberly C. Bracken, L. Richard Carley, David J. Allstot
1997	J	`jnl`	CMOS current steering logic for low-voltage mixed-signal integrated circuits. IEEE Trans. Very Large Scale Integr. Syst. Hiok-Tiaq Ng, David J. Allstot
1997	A	`conf`	Charge-pump assisted low-power/low-voltage CMOS opamp design. ISLPED Jianjun Zhou, Ramsin M. Ziazadeh, H.-H. Ng, Hiok-Tiaq Ng, David J. Allstot
1996	J	`jnl`	CMOS folding A/D converters with current-mode interpolation. IEEE J. Solid State Circuits Michael P. Flynn, David J. Allstot
1996	J	`jnl`	Low-power CMOS continuous-time filters. IEEE J. Solid State Circuits Rajesh H. Zele, David J. Allstot
1996	J	`jnl`	Verification techniques for substrate coupling and their application to mixed-signal IC design. IEEE J. Solid State Circuits Nishath K. Verghese, David J. Allstot, Mark A. Wolfe
1995	C	`conf`	A Macromodel Compaction Scheme for the Fast Stimulation of Large Linear Mesh Circuits. ISCAS Nishath K. Verghese, David J. Allstot
1995	J	`jnl`	An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC. IEEE J. Solid State Circuits Katsufumi Nakamura, Masso Hotta, L. Richard Carley, David J. Allstot
1995	C	`conf`	High-Speed CMOS Current-Mode Equalizers. ISCAS Joshua C. Park, Rohit Mittal, Kimberly C. Bracken, L. Richard Carley, David J. Allstot
1995	C	`conf`	Low-Power High-Speed Continuous-Time Sigma-Delta Modulators. ISCAS Rohit Mittal, David J. Allstot
1995	A	`conf`	SUBTRACT: a program for the efficient evaluation of substrate parasitics in integrated circuits. ICCAD Nishath K. Verghese, David J. Allstot
1995	J	`jnl`	Substrate-aware mixed-signal macrocell placement in WRIGHT. IEEE J. Solid State Circuits Sujoy Mitra, Rob A. Rutenbar, L. Richard Carley, David J. Allstot
1994	J	`jnl`	Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis. IEEE J. Solid State Circuits Balsha R. Stanisic, Nishath K. Verghese, Rob A. Rutenbar, L. Richard Carley, David J. Allstot
1994	C	`conf`	Forum: From 100 Milliwatts/MIPS to 10 Microwatts/MIPS. ISCAS Eby G. Friedman, Sung-Mo Kang, Eric A. Vittoz, David J. Allstot, Erik P. Harris, Ran-Hong Yan
1994	J	`jnl`	Low-voltage fully differential switched-current filters. IEEE J. Solid State Circuits Rajesh H. Zele, David J. Allstot
1993	C	`conf`	A 3V-125 MHz CMOS Continuous-time Filter. ISCAS Rajesh H. Zele, Sang-Soo Lee, David J. Allstot
1993	A	`conf`	A unified approach to simulating electrical and thermal substrate coupling interactions in ICs. ICCAD Nishath K. Verghese, Sang-Soo Lee, David J. Allstot
1993	J	`jnl`	CMOS continuous-time current-mode filters for high-frequency applications. IEEE J. Solid State Circuits Sang-Soo Lee, Rajesh H. Zele, David J. Allstot, Guojin Liang
1993	J	`jnl`	Electrothermal simulation of integrated circuits. IEEE J. Solid State Circuits Sang-Soo Lee, David J. Allstot
1993	J	`jnl`	Fully balanced CMOS current-mode circuits. IEEE J. Solid State Circuits Rajesh H. Zele, David J. Allstot, Terri S. Fiez
1993	J	`jnl`	Sizing of cell-level analog circuits using constrained optimization techniques. IEEE J. Solid State Circuits Prabir C. Maulik, L. Richard Carley, David J. Allstot
1992	J	`jnl`	Synthesis techniques for CMOS folded source-coupled logic circuits. IEEE J. Solid State Circuits Sailesh R. Maskai, Sayfe Kiaei, David J. Allstot
1991	J	`jnl`	Switched-current circuit design issues. IEEE J. Solid State Circuits Terri S. Fiez, Guojin Liang, David J. Allstot
1990	J	`jnl`	A p-well GaAs MESFET technology for mixed-mode applications. IEEE J. Solid State Circuits Philip C. Canfield, David J. Allstot
1990	J	`jnl`	CMOS switched-current ladder filters. IEEE J. Solid State Circuits Terri S. Fiez, David J. Allstot
1990	J	`jnl`	Modeling of frequency and temperature effects in GaAs MESFETs. IEEE J. Solid State Circuits Philip C. Canfield, Steven C. F. Lam, David J. Allstot
1989	J	`jnl`	A family of high-swing CMOS operational amplifiers. IEEE J. Solid State Circuits Terri S. Fiez, Howard C. Yang, John J. Yang, Choung Yu, David J. Allstot