David H. Albonesi

89 papers A* 24A 5B 9C 3Misc 1Journal 28Unranked 19

Year	Rank	Type	Title / Venue / Authors
2020	A*	`conf`	CuttleSys: Data-Driven Resource Management for Interactive Services on Reconfigurable Multicores. MICRO Neeraj Kulkarni, Gonzalo Gonzalez-Pumariega, Amulya Khurana, Christine A. Shoemaker, Christina Delimitrou, David H. Albonesi
2020	J	`jnl`	CuttleSys: Data-Driven Resource Management forInteractive Applications on Reconfigurable Multicores. CoRR Neeraj Kulkarni, Gonzalo Gonzalez-Pumariega, Amulya Khurana, Christine A. Shoemaker, Christina Delimitrou, David H. Albonesi
2020	A*	`conf`	MatRaptor: A Sparse-Sparse Matrix Multiplication Accelerator Based on Row-Wise Product. MICRO Nitish Kumar Srivastava, Hanchen Jin, Jie Liu, David H. Albonesi, Zhiru Zhang
2020	A*	`conf`	Tensaurus: A Versatile Accelerator for Mixed Sparse-Dense Tensor Computations. HPCA Nitish Kumar Srivastava, Hanchen Jin, Shaden Smith, Hongbo Rong, David H. Albonesi, Zhiru Zhang
2019	Misc	`conf`	T2S-Tensor: Productively Generating High-Performance Spatial Hardware for Dense Tensor Computations. FCCM Nitish Kumar Srivastava, Hongbo Rong, Prithayan Barua, Guanyu Feng, Huanqi Cao, Zhiru Zhang, David H. Albonesi, Vivek Sarkar, Wenguang Chen, Paul Petersen, Geoff Lowney, Adam Herr, Christopher J. Hughes, Timothy G. Mattson, Pradeep Dubey
2017	B	`conf`	DeepRecon: Dynamically reconfigurable architecture for accelerating deep neural networks. IJCNN Tayyar Rzayev, Saber Moradi, David H. Albonesi, Rajit Manohar
2017	A*	`conf`	Dynamic GPGPU Power Management Using Adaptive Model Predictive Control. HPCA Abhinandan Majumdar, Leonardo Piga, Indrani Paul, Joseph L. Greathouse, Wei Huang, David H. Albonesi
2017	B	`conf`	Toolbox for exploration of energy-efficient event processors for human-computer interaction. ISPASS Tayyar Rzayev, David H. Albonesi, François Guimbretière, Rajit Manohar, Jaeyeon Kihm
2016	J	`jnl`	2015 International Symposium on Computer Architecture Influential Paper Award. IEEE Micro David H. Albonesi
2016	—	`conf`	Characterizing the Benefits and Limitations of Smart Building Meeting Room Scheduling. ICCPS Abhinandan Majumdar, Zhiru Zhang, David H. Albonesi
2015	A*	`ed.`	Proceedings of the 42nd Annual International Symposium on Computer Architecture, Portland, OR, USA, June 13-17, 2015 ISCA Deborah T. Marr, David H. Albonesi
2014	—	`conf`	Energy-comfort optimization using discomfort history and probabilistic occupancy prediction. IGCC Abhinandan Majumdar, Jason L. Setter, Justin R. Dobbs, Brandon M. Hencey, David H. Albonesi
2013	A*	`conf`	Flicker: a dynamically adaptive architecture for power limited multicore systems. ISCA Paula Petrica, Adam M. Izraelevitz, David H. Albonesi, Christine A. Shoemaker
2012	—	`conf`	Energy-aware meeting scheduling algorithms for smart buildings. BuildSys@SenSys Abhinandan Majumdar, David H. Albonesi, Pradip Bose
2011	J	`jnl`	A low-latency, high-throughput on-chip optical router architecture for future chip multiprocessors. ACM J. Emerg. Technol. Comput. Syst. Mark J. Cianchetti, David H. Albonesi
2011	J	`jnl`	A phase adaptive cache hierarchy for SMT processors. Microprocess. Microsystems Sonia López, Oscar Garnica, David H. Albonesi, Steven G. Dropsho, Juan Lanchares, José Ignacio Hidalgo
2011	J	`jnl`	ReMAP: A Reconfigurable Architecture for Chip Multiprocessors. IEEE Micro Matthew A. Watkins, David H. Albonesi
2010	C	`conf`	Adaptive Cache Memories for SMT Processors. DSD Sonia López, Oscar Garnica, David H. Albonesi, Steven G. Dropsho, Juan Lanchares, José Ignacio Hidalgo
2010	B	`conf`	Dynamically managed multithreaded reconfigurable architectures for chip multiprocessors. PACT Matthew A. Watkins, David H. Albonesi
2010	J	`jnl`	Future Directions in Computer Architecture Research. IEEE Micro David H. Albonesi
2010	J	`jnl`	Moving Forward. IEEE Micro David H. Albonesi
2010	A*	`conf`	ReMAP: A Reconfigurable Heterogeneous Multicore Architecture. MICRO Matthew A. Watkins, David H. Albonesi
2010	B	`conf`	Scalable thread scheduling and global power management for heterogeneous many-core architectures. PACT Jonathan A. Winter, David H. Albonesi, Christine A. Shoemaker
2009	A*	`ed.`	42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA MICRO David H. Albonesi, Margaret Martonosi, David I. August, José F. Martínez
2009	J	`jnl`	From the Editor in Chief: Welcome A-Board. IEEE Micro David H. Albonesi
2009	A*	`conf`	Phastlane: a rapid transit optical routing network. ISCA Mark J. Cianchetti, Joseph C. Kerekes, David H. Albonesi
2008	J	`jnl`	Addressing thermal nonuniformity in SMT workloads. ACM Trans. Archit. Code Optim. Jonathan A. Winter, David H. Albonesi
2008	J	`jnl`	Changes Ahead. IEEE Micro David H. Albonesi
2008	A	`conf`	Scheduling algorithms for unpredictably heterogeneous CMP architectures. DSN Jonathan A. Winter, David H. Albonesi
2008	B	`conf`	Shared reconfigurable architectures for CMPS. FPL Matthew A. Watkins, Mark J. Cianchetti, David H. Albonesi
2007	—	`conf`	Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches. HiPEAC Sonia López, Steve Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares
2007	J	`jnl`	Editor in Chief's Message: Truly "hot" chips - Do we still care? IEEE Micro David H. Albonesi
2007	J	`jnl`	Mixing It Up. IEEE Micro David H. Albonesi
2007	J	`jnl`	More Hot Stuff. IEEE Micro David H. Albonesi
2007	J	`jnl`	On-Chip Optical Technology in Future Bus-Based Multicore Designs. IEEE Micro Nevin Kirman, Meyrem Kirman, Rajeev K. Dokania, José F. Martínez, Alyssa B. Apsel, Matthew A. Watkins, David H. Albonesi
2007	—	`conf`	On-chip optical interconnect for reduced delay uncertainty. Nano-Net Guoqing Chen, Hui Chen, Mikhail Haurylau, Nicholas Nelson, David H. Albonesi, Philippe M. Fauchet, Eby G. Friedman
2007	J	`jnl`	Predictions of CMOS compatible on-chip optical interconnect. Integr. Guoqing Chen, Hui Chen, Mikhail Haurylau, Nicholas Nelson, David H. Albonesi, Philippe M. Fauchet, Eby G. Friedman
2007	J	`jnl`	Productive and Healthy Debate. IEEE Micro David H. Albonesi
2007	B	`conf`	Rate-Driven Control of Resizable Caches for Highly Threaded SMT Processors. PACT Sonia López, Steven G. Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares
2007	J	`jnl`	Standing on Solid Ground. IEEE Micro David H. Albonesi
2006	A	`conf`	Compatible phase co-scheduling on a CMP of multi-threaded processors. IPDPS Ali El-Moursy, Rajeev Garg, David H. Albonesi, Sandhya Dwarkadas
2006	A*	`conf`	Leveraging Optical Technology in Future Bus-based Chip Multiprocessors. MICRO Nevin Kirman, Meyrem Kirman, Rajeev K. Dokania, José F. Martínez, Alyssa B. Apsel, Matthew A. Watkins, David H. Albonesi
2006	C	`conf`	Localized microarchitecture-level voltage management. ISCAS Yongkang Zhu, David H. Albonesi
2006	A	`conf`	Synergistic temperature and energy management in GALS processor architectures. ISLPED Yongkang Zhu, David H. Albonesi
2005	B	`conf`	A High Performance, Energy Efficient GALS ProcessorMicroarchitecture with Reduced Implementation Complexity. ISPASS Yongkang Zhu, David H. Albonesi, Alper Buyuktosunoglu
2005	—	`conf`	Electrical and optical on-chip interconnects in scaled microprocessors. ISCAS (3) Guoqing Chen, Hui Chen, Mikhail Haurylau, Nicholas Nelson, Philippe M. Fauchet, Eby G. Friedman, David H. Albonesi
2005	—	`conf`	Exploiting Coarse-Grain Verification Parallelism for Power-Efficient Fault Tolerance. IEEE PACT M. Wasiur Rashid, Edwin J. Tan, Michael C. Huang, David H. Albonesi
2005	B	`conf`	Partitioning Multi-Threaded Processors with a Large Number of Threads. ISPASS Ali El-Moursy, Rajeev Garg, David H. Albonesi, Sandhya Dwarkadas
2005	J	`jnl`	Power-Efficient Error Tolerance in Chip Multiprocessors. IEEE Micro M. Wasiur Rashid, Edwin J. Tan, Michael C. Huang, David H. Albonesi
2005	—	`conf`	Predictions of CMOS compatible on-chip optical interconnect. SLIP Guoqing Chen, Hui Chen, Mikhail Haurylau, Nicholas Nelson, Philippe M. Fauchet, Eby G. Friedman, David H. Albonesi
2005	—	`conf`	QUILT: a GUI-based integrated circuit floorplanning environment for computer architecture research and education. WCAE@ISCA Gregory J. Briggs, Edwin J. Tan, Nicholas A. Nelson, David H. Albonesi
2004	J	`jnl`	An Evaluation of a Configurable Vliw Microarchitecture for Embedded Dsp Applications. J. Circuits Syst. Comput. Wanli Liu, David H. Albonesi, John Gostomski, Lloyd Palum, Dave Hinterberger, Rick Wanzenried, Mark A. Indovina
2004	A*	`conf`	Dynamically Trading Frequency for Complexity in a GALS Microprocessor. MICRO Steven G. Dropsho, Greg Semeraro, David H. Albonesi, Grigorios Magklis, Michael L. Scott
2004	J	`jnl`	Guest Editor's Introduction: Micro's Top Picks from Microarchitecture Conferences. IEEE Micro David H. Albonesi
2004	—	`conf`	Hiding Synchronization Delays in a GALS Processor Microarchitecture. ASYNC Greg Semeraro, David H. Albonesi, Grigorios Magklis, Michael L. Scott, Steven G. Dropsho, Sandhya Dwarkadas
2004	—	`conf`	The Energy Impact of Aggressive Loop Fusion. IEEE PACT Yongkang Zhu, Grigorios Magklis, Michael L. Scott, Chen Ding, David H. Albonesi
2003	J	`jnl`	A Dynamically Tunable Memory Hierarchy. IEEE Trans. Computers Rajeev Balasubramonian, David H. Albonesi, Alper Buyuktosunoglu, Sandhya Dwarkadas
2003	A*	`conf`	Dynamic Data Dependence Tracking and its Application to Branch Prediction. HPCA Lei Chen, Steve Dropsho, David H. Albonesi
2003	J	`jnl`	Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain Microprocessor. IEEE Micro Grigorios Magklis, Greg Semeraro, David H. Albonesi, Steve Dropsho, Sandhya Dwarkadas, Michael L. Scott
2003	A*	`conf`	Dynamically Managing the Communication-Parallelism Trade-off in Future Clustered Processors. ISCA Rajeev Balasubramonian, Sandhya Dwarkadas, David H. Albonesi
2003	J	`jnl`	Dynamically Tuning Processor Resources with Adaptive Processing. Computer David H. Albonesi, Rajeev Balasubramonian, Steve Dropsho, Sandhya Dwarkadas, Eby G. Friedman, Michael C. Huang, Volkan Kursun, Grigorios Magklis, Michael L. Scott, Greg Semeraro, Pradip Bose, Alper Buyuktosunoglu, Peter W. Cook, Stanley Schuster
2003	A*	`conf`	Energy Efficient Co-Adaptive Instruction Fetch and Issue. ISCA Alper Buyuktosunoglu, Tejas Karkhanis, David H. Albonesi, Pradip Bose
2003	A*	`conf`	Front-End Policies for Improved Issue Efficiency in SMT Processors. HPCA Ali El-Moursy, David H. Albonesi
2003	J	`jnl`	Guest Editors' Introduction: Power and Complexity Aware Design. IEEE Micro Pradip Bose, David H. Albonesi, Diana Marculescu
2003	A*	`conf`	Profile-Based Dynamic Voltage and Frequency Scaling for a Multiple Clock Domain Microprocessor. ISCA Grigorios Magklis, Michael L. Scott, Greg Semeraro, David H. Albonesi, Steve Dropsho
2002	A	`conf`	A microarchitectural-level step-power analysis tool. ISLPED Wael El-Essawy, David H. Albonesi, Balaram Sinharoy
2002	A*	`conf`	Dynamic frequency and voltage control for a multiple clock domain microarchitecture. MICRO Greg Semeraro, David H. Albonesi, Steve Dropsho, Grigorios Magklis, Sandhya Dwarkadas, Michael L. Scott
2002	—	`conf`	Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. PACS Pradip Bose, David M. Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, Sandhya Dwarkadas
2002	A*	`conf`	Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling. HPCA Greg Semeraro, Grigorios Magklis, Rajeev Balasubramonian, David H. Albonesi, Sandhya Dwarkadas, Michael L. Scott
2002	—	`conf`	Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power. IEEE PACT Steve Dropsho, Alper Buyuktosunoglu, Rajeev Balasubramonian, David H. Albonesi, Sandhya Dwarkadas, Greg Semeraro, Grigorios Magklis, Michael L. Scott
2002	A*	`conf`	Managing static leakage energy in microprocessor functional units. MICRO Steve Dropsho, Volkan Kursun, David H. Albonesi, Sandhya Dwarkadas, Eby G. Friedman
2002	A	`conf`	Tradeoffs in power-efficient issue queue design. ISLPED Alper Buyuktosunoglu, David H. Albonesi, Pradip Bose, Peter W. Cook, Stanley Schuster
2001	—	`conf`	A circuit level implementation of an adaptive issue queue for power-aware microprocessors. ACM Great Lakes Symposium on VLSI Alper Buyuktosunoglu, David H. Albonesi, Stanley Schuster, David M. Brooks, Pradip Bose, Peter W. Cook
2001	A*	`conf`	Dynamically allocating processor resources between nearby and distant ILP. ISCA Rajeev Balasubramonian, Sandhya Dwarkadas, David H. Albonesi
2001	C	`conf`	Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors. VLSI-SOC Brian W. Curran, Mary Gifaldi, Jason Martin, Alper Buyuktosunoglu, Martin Margala, David H. Albonesi
2001	A*	`conf`	Reducing the complexity of the register file in dynamic superscalar processors. MICRO Rajeev Balasubramonian, Sandhya Dwarkadas, David H. Albonesi
2000	—	`conf`	An Adaptive Issue Queue for Reduced Power at High Performance. PACS Alper Buyuktosunoglu, Stanley Schuster, David M. Brooks, Pradip Bose, Peter W. Cook, David H. Albonesi
2000	A*	`conf`	Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures. MICRO Rajeev Balasubramonian, David H. Albonesi, Alper Buyuktosunoglu, Sandhya Dwarkadas
2000	J	`jnl`	Runtime Reconfiguration Techniques for Efficient General-Purpose Computation. IEEE Des. Test Comput. Bingxiong Xu, David H. Albonesi
2000	J	`jnl`	Selective Cache Ways: On-Demand Cache Resource Allocation. J. Instr. Level Parallelism David H. Albonesi
1999	—	`conf`	An Architectural and Circuit-Level Approach to Improving the Energy Efficiency of Microprocessor Memory Structures. VLSI David H. Albonesi
1999	J	`jnl`	STATS: A framework for microprocessor and system-level design space exploration. J. Syst. Archit. David H. Albonesi, Israel Koren
1999	A*	`conf`	Selective Cache Ways: On-Demand Cache Resource Allocation. MICRO David H. Albonesi
1998	A*	`conf`	Dynamic IPC/Clock Rate Optimization. ISCA David H. Albonesi
1997	—	`conf`	Improving the Memory Bandwidth of Highly-Integrated, Wide-Issue, Microprocessor-Based Systems. IEEE PACT David H. Albonesi, Israel Koren
1996	J	`jnl`	A Mean Analysis Multiprocessor Model Incorporating Superscalar Processors and Latency Tolerating Techniques. Int. J. Parallel Program. David H. Albonesi, Israel Koren
1995	B	`conf`	An analytical model of high performance superscalar-based multiprocessors. PACT David H. Albonesi, Israel Koren
1995	—	`conf`	Architecture and technology tradeoffs in the design of next-generation multiprocessor servers. SPDP David H. Albonesi, Israel Koren
1994	—	`conf`	Tradeoffs in the Design of Single Chip Multiprocessors. IFIP PACT David H. Albonesi, Israel Koren