David G. Haigh

22 papers C 11Journal 4Unranked 7
YearRankTypeTitle / Venue / Authors
2008 J jnl
A Current-Mode Circuit With a Linearized Input
IEEE Trans. Circuits Syst. I Regul. Pap.
Yasuhiro Sugimoto, David G. Haigh
2007 — conf
Derivation of power amplifier predistortion circuits by frequency to signal amplitude transformation.
ECCTD
Dafu Bai, David G. Haigh
2006 J jnl
A Method of Transformation from Symbolic Transfer Function to Active-RC Circuit by Admittance Matrix Expansion.
IEEE Trans. Circuits Syst. I Regul. Pap.
David G. Haigh
2006 C conf
A mathematical framework for active circuits based on port equivalence using limit variables.
ISCAS
David G. Haigh, Thomas J. W. Clarke, Paul M. Radmore
2006 J jnl
Admittance Matrix Models for the Nullor Using Limit Variables and Their Application to Circuit Design.
IEEE Trans. Circuits Syst. I Regul. Pap.
David G. Haigh, Paul M. Radmore
2006 C conf
Analytic approach to or transformations for FET circuit synthesis. Part I. Nullator-norator tree transformations.
ISCAS
David G. Haigh
2006 C conf
Analytic approach to or transformations for FET circuit synthesis. Part II. Nullator-norator re-pairing and cloning.
ISCAS
David G. Haigh
2006 J jnl
Symbolic Framework for Linear Active Circuits Based on Port Equivalence Using Limit Variables.
IEEE Trans. Circuits Syst. I Regul. Pap.
David G. Haigh, Thomas J. W. Clarke, Paul M. Radmore
2005 — conf
New admittance matrix descriptions for the nullor with application to circuit design.
ECCTD
David G. Haigh, Paul M. Radmore
2005 — conf
Rules for systematic synthesis of all-transistor analogue circuits by admittance matrix expansion.
ISCAS (6)
Phil Corbishley, David G. Haigh
2005 — conf
Symbolic active-RC circuit synthesis by admittance matrix expansion.
ISCAS (1)
David G. Haigh
2005 — conf
Symbolic passive-RC circuit synthesis by admittance matrix expansion.
ISCAS (1)
David G. Haigh, Paul M. Radmore
2005 — conf
Systematic synthesis of operational amplifier circuits by admittance matrix expansion.
ECCTD
David G. Haigh
2004 — conf
Systematic synthesis method for analogue circuits. Part I. Notation and synthesis toolbox.
ISCAS (1)
David G. Haigh, Paul M. Radmore
1995 C conf
Novel Circuit Synthesis Technique Using Short Channel GaAs Fets Giving Reduced Intermodulation Distortion.
ISCAS
D. R. Webster, David G. Haigh, Anthony E. Parker
1995 C conf
On the Design of Active GaAs Multipliers.
ISCAS
T. L. Lim, David G. Haigh, D. R. Webster
1994 C conf
Device Circuit Interaction in the Common Source Amplifier.
ISCAS
D. R. Webster, Anthony E. Parker, David G. Haigh, Paul M. Radmore
1994 C conf
Distortion Compensation of Multi-Mesfet Circuits.
ISCAS
D. R. Webster, David G. Haigh, Anthony E. Parker
1994 C conf
On Design of Analogue Multipliers using Gallium Arsenide MESFETs.
ISCAS
R. Lecouls, David G. Haigh, Paul M. Radmore, D. R. Webster
1994 C conf
On non-Linear Multi-FET Analysis.
ISCAS
Carlos A. Losada, David G. Haigh
1993 C conf
A Systematic Method for Nonlinear Analysis of a Class of FET Circuits.
ISCAS
Carlos A. Losada, David G. Haigh, Paul M. Radmore
1993 C conf
Compensation of 2nd Harmonic Distortion in a 4-FET Linearised Transconductor Circuit.
ISCAS
Anthony E. Parker, David G. Haigh