David de Andrés

59 papers A* 1A 7B 7C 4Misc 10Journal 11Unranked 19

Year	Rank	Type	Title / Venue / Authors
2025	B	`conf`	Can C-Based ECC Models Leverage High-Level Synthesis? Evaluating Description Variants for Efficient Circuit Implementations. SAFECOMP Joaquin Gracia-Moran, Juan-Carlos Ruiz-Garcia, David de Andrés, Luis J. Saiz-Adalid
2025	—	`conf`	Initial Insights into Synthesis Overheads Caused by C-Based Error Correction Codes Implementations. EDCC-C Joaquin Gracia-Moran, David de Andrés, Luis J. Saiz-Adalid, Juan Carlos Ruiz, Juan-Carlos Baraza-Calvo, Daniel Gil-Tomas, Pedro J. Gil-Vicente
2025	—	`conf`	Towards SW-Based Robustness Assessment of HW Accelerators for Quantized CNNs. EDCC-C Juan Carlos Ruiz, David de Andrés, Luis J. Saiz-Adalid, Joaquin Gracia-Moran
2025	—	`conf`	Towards a Novel 8-Bit Floating-Point Format to Increase Robustness in Convolutional Neural Networks. EDCC-C Luis J. Saiz-Adalid, Juan-Carlos Ruiz-Garcia, Joaquin Gracia-Moran, David de Andrés, Juan-Carlos Baraza-Calvo, Daniel Gil-Tomas, Pedro J. Gil-Vicente
2024	—	`conf`	Allocating ECC parity bits into BF16-encoded CNN parameters: A practical experience report. LADC Joaquin Gracia-Moran, Juan Carlos Ruiz, David de Andrés, Luis J. Saiz-Adalid
2024	B	`conf`	In-Memory Zero-Space Floating-Point-Based CNN Protection Using Non-significant and Invariant Bits. SAFECOMP Juan Carlos Ruiz, David de Andrés, Luis J. Saiz-Adalid, Joaquin Gracia-Moran
2024	Misc	`conf`	Zero-Space In-Weight and In-Bias Protection for Floating-Point-based CNNs. EDCC Juan Carlos Ruiz, David de Andrés, Luis J. Saiz-Adalid, Joaquin Gracia-Moran
2023	A	`conf`	BAFFI: a bit-accurate fault injector for improved dependability assessment of FPGA prototypes. DATE Ilya Tuzov, David de Andrés, Juan-Carlos Ruiz-Garcia, Carles Hernández
2022	J	`jnl`	A Multi-Criteria Analysis of Benchmark Results With Expert Support for Security Tools. IEEE Trans. Dependable Secur. Comput. Miquel Martínez, Juan Carlos Ruiz, Nuno Antunes, David de Andrés, Marco Vieira
2022	Misc	`conf`	Reversing FPGA architectures for speeding up fault injection: does it pay? EDCC Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
2020	Misc	`conf`	Improving Robustness-Aware Design Space Exploration for FPGA-Based Systems. EDCC Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
2019	Misc	`conf`	Robustness-Aware Design Space Exploration Through Iterative Refinement of D-Optimal Designs. EDCC Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
2019	J	`jnl`	Simulating the effects of logic faults in implementation-level VITAL-compliant models. Computing Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
2018	Misc	`conf`	Accurate Robustness Assessment of HDL Models Through Iterative Statistical Fault Injection. EDCC Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
2018	A	`conf`	DAVOS: EDA Toolkit for Dependability Assessment, Verification, Optimisation and Selection of Hardware Models. DSN Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
2018	—	`conf`	Speeding-Up Robustness Assessment of HDL Models through Profiling and Multi-Level Fault Injection. LADC Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
2018	J	`jnl`	Tuning synthesis flags to optimize implementation goals: Performance and robustness of the LEON3 processor as a case study. J. Parallel Distributed Comput. Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
2017	Misc	`conf`	Accurately Simulating the Effects of Faults in VHDL Models Described at the Implementation-Level. EDCC Ilya Tuzov, Juan Carlos Ruiz, David de Andrés
2017	A	`conf`	Dependability-Aware Design Space Exploration for Optimal Synthesis Parameters Tuning. DSN Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
2016	J	`jnl`	Multi-criteria analysis of measures in benchmarking: Dependability benchmarking as a case study. J. Syst. Softw. Jesus Friginal, Miquel Martínez, David de Andrés, Juan-Carlos Ruiz-Garcia
2016	—	`conf`	Speeding-Up Simulation-Based Fault Injection of Complex HDL Models. LADC Ilya Tuzov, Juan Carlos Ruiz, David de Andrés, Pedro J. Gil
2015	A*	`conf`	Analysis and RTL correlation of instruction set simulators for automotive microcontroller robustness verification. DAC Jaime Espinosa, Carles Hernández, Jaume Abella, David de Andrés, Juan-Carlos Ruiz-Garcia
2015	Misc	`conf`	Increasing the Dependability of VLSI Systems through Early Detection of Fugacious Faults. EDCC Jaime Espinosa, David de Andrés, Pedro J. Gil
2015	J	`jnl`	REFRAHN: A Resilience Evaluation Framework for Ad Hoc Routing Protocols. Comput. Networks Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Miquel Martínez
2014	J	`jnl`	A survey of evaluation platforms for ad hoc routing protocols: A resilience perspective. Comput. Networks Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Miquel Martínez
2014	J	`jnl`	Ambient noise in wireless mesh networks: Evaluation and proposal of an adaptive algorithm to mitigate link removal. J. Netw. Comput. Appl. Jesus Friginal, Juan-Carlos Ruiz-Garcia, David de Andrés, Antonio Bustos
2014	J	`jnl`	From Measures to Conclusions Using Analytic Hierarchy Process in Dependability Benchmarking. IEEE Trans. Instrum. Meas. Miquel Martínez, David de Andrés, Juan-Carlos Ruiz-Garcia, Jesus Friginal
2014	Misc	`conf`	Gaining Confidence on Dependability Benchmarks' Conclusions through "Back-to-Back" Testing (Practical Experience Report). EDCC Miquel Martínez, David de Andrés, Juan-Carlos Ruiz-Garcia
2013	—	`conf`	Analysis of results in dependability benchmarking: Can we do better? M&N Miquel Martínez, David de Andrés, Juan Carlos Ruiz, Jesus Friginal
2013	—	`conf`	Fault Tolerance on NoCs. AINA Workshops José Miguel Montañana, David de Andrés, Francisco Tirado
2013	—	`conf`	Improving the Transfer of Safety and Security Competences to Industry: The RISKY Approach. EWDC Joaquin Gracia-Moran, Juan-Carlos Ruiz-Garcia, Juan-Carlos Baraza-Calvo, David de Andrés, Pedro J. Gil
2013	—	`conf`	Open Challenges in the Resilience Evaluation of Ad Hoc Networks. EWDC Miquel Martínez, Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia
2013	—	`conf`	Preventing Memory Errors in Networked Vehicle Services Through Diversification. CARS@SAFECOMP Hector Marco-Gisbert, Juan Carlos Ruiz, David de Andrés, Ismael Ripoll
2013	—	`conf`	The Challenge of Detection and Diagnosis of Fugacious Hardware Faults in VLSI Designs. EWDC Jaime Espinosa, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2012	—	`conf`	An aspect-oriented approach to face neighbour saturation issues in proactive ad hoc routing protocols: olsrd as a case study. ARMOR Antonio Bustos, Jesús Friginal, David de Andrés, Juan Carlos Ruiz
2012	A	`conf`	Mitigating the impact of ambient noise on Wireless Mesh Networks using adaptive link-quality-based packet replication. DSN Jesus Friginal, Juan-Carlos Ruiz-Garcia, David de Andrés, Antonio Bustos
2012	B	`conf`	Tolerating multiple faults with proximate manifestations in FPGA-based critical designs for harsh environments. FPL Jaime Espinosa, David de Andrés, Juan Carlos Ruiz, Pedro J. Gil
2012	—	`conf`	Towards changing the user perception of mobile communications through geotagged information. ARMOR Miquel Martínez, David de Andrés, Juan Carlos Ruiz, Mahbub Hassan, Salil S. Kanhere
2011	—	`conf`	Coarse-grained resilience benchmarking using logic score of preferences: ad hoc networks as a case study. EWDC Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2011	—	`conf`	On Selecting Representative Faultloads to Guide the Evaluation of Ad Hoc Networks. LADC Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2011	B	`conf`	Resilience-Driven Parameterisation of Ad Hoc Routing Protocols: olsrd as a Case Study. SRDS Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2011	J	`jnl`	Towards benchmarking routing protocols in wireless mesh networks. Ad Hoc Networks Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2011	C	`conf`	Using Dependability Benchmarks to Support ISO/IEC SQuaRE. PRDC Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Regina Moraes
2011	B	`conf`	Using Performance, Energy Consumption, and Resilience Experimental Measures to Evaluate Routing Protocols for Ad Hoc Networks. NCA Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2010	B	`conf`	Attack Injection to Support the Evaluation of Ad Hoc Networks. SRDS Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2009	C	`conf`	An Attack Injection Approach to Evaluate the Robustness of Ad Hoc Networks. PRDC David de Andrés, Jesus Friginal, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2009	C	`conf`	Design and Deployment of a Generic ECC-based Fault Tolerance Mechanism for Embedded HW Cores. ETFA Juan-Carlos Ruiz-Garcia, David de Andrés, Pedro J. Gil
2009	A	`conf`	Technologies for the Development of Dependable and Secure Component-based Embedded Systems: TecnoSeC Project. ESA Juan Pardo, David de Andrés, Juan Carlos Ruiz, José Carlos Campelo
2009	—	`conf`	Using Dependability, Performance, Area and Energy Consumption Experimental Measures to Benchmark IP Cores. LADC David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2008	Misc	`conf`	Dependability Assessment for the Selection of Embedded Cores. EDCC David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
2008	J	`jnl`	Fault Emulation for Dependability Evaluation of VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
2008	C	`conf`	Generic Design and Automatic Deployment of NMR Strategies on HW Cores. PRDC Juan-Carlos Ruiz-Garcia, David de Andrés, Sara Blanc, Pedro J. Gil
2006	—	`conf`	FADES: a fault emulation tool for fast dependability assessment. FPT David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
2006	B	`conf`	Fast Emulation of Permanent Faults in VLSI Systems. FPL David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
2006	A	`conf`	Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems. DSN David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
2005	Misc	`conf`	Fast Run-Time Reconfiguration for SEU Injection. EDCC David de Andrés, José Albaladejo, Lenin Lemus, Pedro J. Gil
2004	J	`jnl`	Codesign methodology for computer vision applications. Microprocess. Microsystems José Albaladejo, David de Andrés, Lenin Lemus, Joaquim Salvi
2003	A	`conf`	INERTE: Integrated NExus-Based Real-Time Fault Injection Tool for Embedded Systems. DSN Pedro Yuste, David de Andrés, Lenin Lemus, Juan José Serrano, Pedro J. Gil
2000	—	`conf`	An alternative to unify performance and reliability analysis of industrial applications. ESM Lenin Lemus, David de Andrés, Pedro J. Gil