David C. Keezer

66 papers A 35B 3C 1Misc 3Journal 12Unranked 12

Year	Rank	Type	Title / Venue / Authors
2024	B	`conf`	Characterization of Ultra-low Random Jitter Reduction Methods up to 36 GHz. ETS David C. Keezer, Dany Minier, Hongjie Li
2024	—	`conf`	Multi-Stage Jitter-Reduction and Frequency Multiplication for 54 GHz ATE Clocks. ITC-Asia David C. Keezer, Dany Minier
2023	—	`conf`	Experimental Evaluation of Jitter Reduction Methods for Multi-Gigahertz Test. ITC-Asia David C. Keezer, Dany Minier, Hongjie Li
2019	A	`conf`	A Framework for Design of Self-Repairing Digital Systems. ITC Jingchi Yang, David C. Keezer
2019	J	`jnl`	Efficient Built-In Test and Calibration of High Speed Serial I/O Systems Using Monobit Signal Acquisition. J. Electron. Test. Thomas Moon, Hyun Woo Choi, David C. Keezer, Abhijit Chatterjee
2018	Misc	`conf`	A chip-level security framework for assessing sensor data integrity: work-in-progress. CODES+ISSS Taimour Wehbe, Vincent John Mooney, David C. Keezer
2018	J	`jnl`	Hardware-Based Run-Time Code Integrity in Embedded Devices. Cryptogr. Taimour Wehbe, Vincent John Mooney III, David C. Keezer
2018	J	`jnl`	Securing Medical Devices Against Hardware Trojan Attacks Through Analog-, Digital-, and Physiological-Based Signatures. J. Hardw. Syst. Secur. Taimour Wehbe, Vincent John Mooney, Omer T. Inan, David C. Keezer
2017	—	`conf`	Biologically inspired hierarchical structure for self-repairing FPGAs. ReConFig David C. Keezer, Jingchi Yang
2017	—	`conf`	Use of Analog Signatures for Hardware Trojan Detection. FPGAworld Taimour Wehbe, Vincent John Mooney, David C. Keezer, Omer T. Inan, Abdul Qadir Javaid
2016	B	`conf`	A 40Gbps economic extension board and FPGA-based testing platform. ETS Te-Hui Chen, David C. Keezer
2016	—	`conf`	An Ultra-High-Speed Test Module and FPGA-Based Development Platform. ATS Te-Hui Chen, David C. Keezer
2015	—	`conf`	A Novel Approach to Detect Hardware Trojan Attacks on Primary Data Inputs. WESS Taimour Wehbe, Vincent John Mooney, David C. Keezer, Nicholas B. Parham
2015	B	`conf`	An FPGA-based ATE extension module for low-cost multi-GHz memory test. ETS David C. Keezer, Te-Hui Chen, Thomas Moon, D. T. Stonecypher, Abhijit Chatterjee, Hyun Woo Choi, Sungyeol Kim, Hosun Yoo
2014	—	`conf`	A signature based architecture for Trojan detection. WESS Aderinola Gbade-Alabi, David C. Keezer, Vincent John Mooney, Axel York Poschmann, Marc Stöttinger, Kshitij Divekar
2014	Misc	`conf`	Multi-channel testing architecture for high-speed eye-diagram using pin electronics and subsampling monobit reconstruction algorithms. VTS Thomas Moon, Hyun Woo Choi, David C. Keezer, Abhijit Chatterjee
2013	—	`conf`	Enhanced Resolution Time-Domain Reflectometry for High Speed Channels: Characterizing Spatial Discontinuities with Non-ideal Stimulus. Asian Test Symposium Suvadeep Banerjee, Hyun Woo Choi, David C. Keezer, Abhijit Chatterjee
2013	—	`conf`	Minimizing simultaneous switching noise at reduced power with constant-voltage power transmission lines for high-speed signaling. ISQED Satyanarayana Telikepalli, Madhavan Swaminathan, David C. Keezer
2013	A	`conf`	Practical methods for extending ATE to 40 and 50Gbps. ITC David C. Keezer, Carl Edward Gray, Te-Hui Chen, Ashraf Majid
2012	J	`jnl`	Guest Editorial: Special Issue on Analog, Mixed-Signal, RF, and MEMS Testing. J. Electron. Test. Hsiu-Ming (Sherman) Chang, David C. Keezer
2012	A	`conf`	Multi-gigahertz arbitrary timing generator and data pattern serializer/formatter. ITC David C. Keezer, Te-Hui Chen, Carl Edward Gray, Hyun Woo Choi, Sungyeol Kim, Seongkwan Lee, Hosun Yoo
2011	—	`conf`	Burst-Mode Transmission and Data Recovery for Multi-GHz Optical Packet Switching Network Testing. Asian Test Symposium Carl Gray, David C. Keezer, Howard Wang, Keren Bergman
2011	J	`jnl`	Extending a DWDM Optical Network Test System to 12 Gbps x4 Channels. J. Electron. Test. Carl Edward Gray, David C. Keezer
2011	A	`conf`	Multi-function multi-GHz ATE extension using state-of-the-art FPGAs. ITC A. M. Majid, David C. Keezer
2011	A	`conf`	Two methods for 24 Gbps test signal synthesis. DATE David C. Keezer, Carl Edward Gray
2010	A	`conf`	An architecture for graphics processing in an FPGA (abstract only). FPGA Marcus Dutton, David C. Keezer
2010	J	`jnl`	Low-Cost 20 Gbps Digital Test Signal Synthesis Using SiGe and InP Logic. J. Electron. Test. David C. Keezer, Carl Gray, Dany Minier, Patrice Ducharme
2010	A	`conf`	Stretching the limits of FPGA SerDes for enhanced ATE performance. DATE A. M. Majid, David C. Keezer
2009	A	`conf`	A development platform and electronic modules for automated test up to 20 Gbps. ITC David C. Keezer, Carl Gray, A. M. Majid, Dany Minier, Patrice Ducharme
2008	A	`conf`	An Electronic Module for 12.8 Gbps Multiplexing and Loopback Test. ITC David C. Keezer, Dany Minier, Patrice Ducharme, A. M. Majid
2008	J	`jnl`	MEMS Switches and SiGe Logic for Multi-GHz Loopback Testing. VLSI Design David C. Keezer, Dany Minier, Patrice Ducharme, Doris Viens, Greg Flynn, John McKillop
2008	A	`conf`	Variable Delay of Multi-Gigahertz Digital Signals for Deskew and Jitter-Injection Test Applications. DATE David C. Keezer, Dany Minier, Patrice Ducharme
2007	A	`conf`	Co-development of test electronics and PCI Express interface for a multi-Gbps optical switching network. ITC Carl Edward Gray, Odile Liboiron-Ladouceur, David C. Keezer, Keren Bergman
2007	J	`jnl`	Low-Cost Multi-Gigahertz Test Systems Using CMOS FPGAs and PECL CoRR David C. Keezer, Carl Gray, Ashraf M. Majid, Nafeez Taher
2007	A	`conf`	Method for reducing jitter in multi-gigahertz ATE. DATE David C. Keezer, Dany Minier, Patrice Ducharme
2007	A	`conf`	Multi-GHz loopback testing using MEMs switches and SiGe logic. ITC David C. Keezer, Dany Minier, Patrice Ducharme, Doris Viens, Greg Flynn, John McKillop
2006	A	`conf`	Multi-Gigahertz Testing of Wafer-Level Packaged Devices. ITC A. M. Majid, David C. Keezer, Jayasanker Jayabalan, Mihai Rotaru
2006	J	`jnl`	Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses. IEEE Des. Test Comput. David C. Keezer, Dany Minier, Patrice Ducharme
2005	—	`conf`	A 5 Gbps Wafer-Level Tester. Asian Test Symposium A. M. Majid, David C. Keezer, J. V. Karia
2005	—	`conf`	Implementing multi-gigahertz test systems using CMOS FPGAs and PECL components. ESSCIRC David C. Keezer, Carl Gray, Ashraf Majid, Nafeez Taher
2005	A	`conf`	Low-Cost Multi-Gigahertz Test Systems Using CMOS FPGAs and PECL. DATE David C. Keezer, Carl Gray, Ashraf M. Majid, Nafeez Taher
2004	A	`conf`	Modular Extension of ATE to 5 Gbps. ITC David C. Keezer, Dany Minier, F. Binette
2004	J	`jnl`	Multiplexing ATE Channels for Production Testing at 2.5 Gbps. IEEE Des. Test Comput. David C. Keezer, Dany Minier, Marie-Christine Caron
2003	A	`conf`	A Production-Oriented Multiplexing System for Testing above 2.5 Gbps. ITC David C. Keezer, Dany Minier, Marie-Christine Caron
2003	A	`conf`	Application and Demonstration of a Digital Test Core: Optoelectronic Test Bed and Wafer-level Prober. ITC John S. Davis, David C. Keezer, Odile Liboiron-Ladouceur, Keren Bergman
2002	A	`conf`	Challenges and Solutions for Multi-Gigahertz Testing. ITC David C. Keezer
2002	Misc	`conf`	Multi-GigaHertz Testing Challenges and Solutions. VTS Karim Arabi, Klaus-Dieter Hilliges, David C. Keezer, Sassan Tabatabaei
2002	A	`conf`	Multi-Purpose Digital Test Core Utilizing Programmable Logic. ITC John S. Davis, David C. Keezer
2001	A	`conf`	Terabit-per-second automated digital testing. ITC David C. Keezer, Q. Zhou, C. Bair, J. Kuan, B. Poole
1999	A	`conf`	Test support processors for enhanced testability of high performance circuits. ITC David C. Keezer, Q. Zhou
1998	A	`conf`	A high throughput test methodology for MCM substrates. ITC Bruce C. Kim, David C. Keezer, Abhijit Chatterjee
1998	A	`conf`	Alternative interface methods for testing high speed bidirectional signals. ITC David C. Keezer, Q. Zhou
1998	A	`conf`	Improved sensitivity for parallel test of substrate interconnections. ITC David C. Keezer, K. E. Newman, John S. Davis
1997	A	`conf`	A Low-Cost Massively-Parallel Interconnect Test Method for MCM Substrates. ITC K. E. Newman, David C. Keezer
1997	A	`conf`	Low-Cost ATE PinElectronics for Multigigabit-per-Second At-Speed Test. ITC David C. Keezer, R. J. Wenzel
1995	A	`conf`	Electrical Troubleshooting, Diagnostics, and Repair of Multichip Modules. ITC David C. Keezer
1993	A	`conf`	Known Godd Die for MCMs: Enabling Technologies. ITC David C. Keezer
1993	C	`conf`	SMAC: A Scene Matching Chip. ICCD N. Ranganathan, Raghu Sastry, Raguveer Venkatesan, Joseph W. Yoder, David C. Keezer
1992	J	`jnl`	An Architecture for WSI Rapid Prototyping. Computer Vijay K. Jain, Hiroomi Hikawa, David C. Keezer
1992	A	`conf`	Calibration Techniques for a Gigahertz Test System. ITC David C. Keezer, R. J. Wenzel
1992	A	`conf`	MCM Test Using Available Technology. ITC David C. Keezer
1991	A	`conf`	High Frequency Wafer Probing and Power Supply Resonance Effects. ITC S. P. Athan, David C. Keezer, J. McKinley
1991	A	`conf`	Real-Time Data Comparison for GigaHertz Digital Test. ITC David C. Keezer
1991	J	`jnl`	Wafer Scale Integration: A university perspective. J. VLSI Signal Process. Vijay K. Jain, David L. Landis, David C. Keezer, K. T. Wilson, Denny Whittaker
1990	A	`conf`	Multiplexing test system channels for data rates above 1 Gb/s. ITC David C. Keezer
1985	A	`conf`	Tester Independent Support Software System (TISSS). ITC L. J. Falkenstrom, David C. Keezer, A. Patterson, Robert M. Rolfe, J. Wolcott