David Borggreve

11 papers C 3Unranked 8

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Characterization of a 5 GHz Frequency Divider for a Cryogenic PLL in 22-nm FDSOI. ICECS Himadri Shekhar Bhattacharyya, Johannes Weber, Erkan Nevzat Isa, David Borggreve, Enno Böhme, Amelie Hagelauer
2023	C	`conf`	A 0.8-V Fully Differential Amplifier with 80-dB DC Gain and 8-GHz GBW in 22-nm FDSOI CMOS Technology. ISCAS Harshitha Basavaraju, David Borggreve, Frank Vanselow, Erkan Nevzat Isa, Linus Maurer
2023	—	`conf`	A FeFET In-Memory-Computing Core with Offset Cancellation for Mitigating Computational Errors. ESSCIRC Lei Zhang, Pengcheng Xu, David Borggreve, Frank Vanselow, Ralf Brederlow
2023	—	`conf`	An Enhanced ACBC Three-Stage Amplifier Using Complementary Indirect Miller Compensation. ICECS Johannes Weber, Lei Zhang, Pengcheng Xu, David Borggreve, Frank Vanselow, Eckhard Hennig
2022	C	`conf`	A Dynamic Charge-Transfer-Based Crossbar with Low Sensitivity to Parasitic Wire-Resistance. ISCAS Pengcheng Xu, Lei Zhang, Ferdinand Pscheidl, David Borggreve, Frank Vanselow, Ralf Brederlow
2021	—	`conf`	A 0.8-V, 2.88-GHz Double-Tail Latched Comparator in 22-nm FDSOI CMOS Technology. NorCAS Harshitha Basavaraju, David Borggreve, Enno Böhme, Frank Vanselow, Erkan Nevzat Isa, Linus Maurer
2021	C	`conf`	Impact of Parasitic Wire Resistance on Accuracy and Size of Resistive Crossbars. ISCAS Lei Zhang, David Borggreve, Frank Vanselow, Ralf Brederlow
2020	—	`conf`	Quantization Considerations of Dense Layers in Convolutional Neural Networks for Resistive Crossbar Implementation. MOCAST Lei Zhang, David Borggreve, Frank Vanselow, Ralf Brederlow
2019	—	`conf`	A 0.8 V Low-Power 3rd order Sigma-Delta Modulator in 22 nm FDSOI CMOS Process for Sensor Interfaces. NEWCAS Pragoti Pran Bora, David Borggreve, Frank Vanselow, Erkan Isa, Linus Maurer
2018	—	`conf`	A low power, offset compensated, CMOS only bandgap reference in 22 nm FD-SOI technology. MOCAST Prajith Kumar Poongodan, Pragoti Pran Bora, David Borggreve, Frank Vanselow, Linus Maurer
2017	—	`conf`	Low-voltage low-distortion sampling switch design in 22 nm FD-SOI CMOS technology. ICECS Pragoti Pran Bora, David Borggreve, Frank Vanselow, Erkan Isa, Linus Maurer