Darshika G. Perera

39 papers B 1C 7Journal 16Unranked 15

Year	Rank	Type	Title / Venue / Authors
2025	C	`conf`	FPGA-Based Hardware Architecture for Sequence Alignment by Genetic Algorithm. ISCAS Laura H. Garcia, Arkan Alkamil, Mokhles A. Mohsin, Johannes Menzel, Darshika G. Perera
2025	J	`jnl`	High-Level Synthesis-Based FPGA Hardware Architecture for PCA+SVM for Real-Time Processing on Edge Computing Platforms. IEEE Access Mokhles A. Mohsin, Darshika G. Perera
2024	J	`jnl`	Analysis of Generalized Hebbian Learning Algorithm for Neuromorphic Hardware Using Spinnaker. CoRR Shivani Sharma, Darshika G. Perera
2024	J	`jnl`	Composing Efficient Computational Models for Real-Time Processing on Next-Generation Edge-Computing Platforms. IEEE Access Mokhles A. Mohsin, S. Navid Shahrouzi, Darshika G. Perera
2024	—	`conf`	Discrepancy in Execution Time: Static vs. Dynamic Reconfigurable Hardware. PACRIM Darshika G. Perera, Kin F. Li
2024	—	`conf`	HDL Code Variation: Impact on FPGA Performance Metrics and CAD Tools. PACRIM Ian D. Atwell, Darshika G. Perera
2024	J	`jnl`	Wavelet Based Frequency Detection Using FPGAs. CoRR Caleb Hill, Darshika G. Perera
2023	C	`conf`	A Systolic Array Architecture for SVM Classifier for Machine Learning on Embedded Devices. ISCAS Srikanth Ramadurgam, Darshika G. Perera
2023	J	`jnl`	An Effective Content Based Image Retrieval System Using Deep Learning Based Inception Model. Wirel. Pers. Commun. E. Ranjith, Latha Parthiban, Thamarai Pugazhendhi Latchoumi, Ananda Kumar Subramanian, Darshika G. Perera, Sangeetha Ramaswamy
2023	C	`conf`	Edge Computing-based Adaptive Machine Learning Model for Dynamic IoT Environment. ISCAS Muhammad Arif, Darshika G. Perera
2023	J	`jnl`	Land Cover Classification Using Landsat 7 Data for Land Sustainability. Wirel. Pers. Commun. K. Lavanya, Abhilasha Gondchar, Irene Maria Mathew, Sumitkumar Sarda, Ananda Kumar Subramanian, Anand Mahendran, Darshika G. Perera
2023	J	`jnl`	Neuromorphic Sentiment Analysis Using Spiking Neural Networks. Sensors Raghavendra Kumar Chunduri, Darshika G. Perera
2023	C	`conf`	Optimizing Density-Based Ant Colony Stream Clustering Using FPGA-Based Hardware Accelerator. ISCAS Jeremy R. Graf, Darshika G. Perera
2023	J	`jnl`	Toward Composing Efficient FPGA-Based Hardware Accelerators for Physics-Based Model Predictive Control Smart Sensor for HEV Battery Cell Management. IEEE Access Anne K. Madsen, Darshika G. Perera
2022	J	`jnl`	Composing Optimized Embedded Software Architectures for Physics-Based EKF-MPC Smart Sensor for Li-Ion Battery Cell Management. Sensors Anne K. Madsen, Darshika G. Perera
2021	—	`conf`	Intelligent Cognitive Radio Architecture Applying Machine Learning and Reconfigurability. NorCAS Jari Nurmi, Darshika G. Perera
2020	C	`conf`	A Quad Joint Relational Feature for 3D Skeletal Action Recognition with Circular CNNs. ISCAS P. V. V. Kishore, Darshika G. Perera, Maddala Teja Kiran Kumar, Dande Anil Kumar, Kiran Kumar Eepuri
2020	C	`conf`	An Optimized FPGA-Based Hardware Accelerator for Physics-Based EKF for Battery Cell Management. ISCAS Anne K. Madsen, Michael Scott Trimboli, Darshika G. Perera
2020	J	`jnl`	Towards Composing Optimized Bi-Directional Multi-Ported Memories for Next-Generation FPGAs. IEEE Access S. Navid Shahrouzi, Arkan Alkamil, Darshika G. Perera
2020	J	`jnl`	Towards Dynamic and Partial Reconfigurable Hardware Architectures for Cryptographic Algorithms on Embedded Devices. IEEE Access Arkan Alkamil, Darshika G. Perera
2019	—	`conf`	A Fast and Secure Pipelined Barrel Processor for Safety-Critical Applications for Real-Time Operating Systems. UEMCON Mong Tee Sim, Darshika G. Perera
2019	J	`jnl`	A design methodology for mobile and embedded applications on FPGA-based dynamic reconfigurable hardware. Int. J. Embed. Syst. Darshika G. Perera, Kin Fun Li
2019	—	`conf`	Efficient FPGA-Based Reconfigurable Accelerators for SIMON Cryptographic Algorithm on Embedded Platforms. ReConFig Arkan Alkamil, Darshika G. Perera
2019	—	`conf`	HDL Code Optimizations: Impact on Hardware Implementations and CAD Tools. PACRIM S. Navid Shahrouzi, Darshika G. Perera
2019	J	`jnl`	Optimized hardware accelerators for data mining applications on embedded platforms: Case study principal component analysis. Microprocess. Microsystems S. Navid Shahrouzi, Darshika G. Perera
2018	—	`conf`	An FPGA-Based Hardware Accelerator for K-Nearest Neighbor Classification for Machine Learning on Mobile Devices. HEART Mokhles A. Mohsin, Darshika G. Perera
2018	J	`jnl`	Efficient embedded architectures for fast-charge model predictive controller for battery cell management in electric vehicles. EURASIP J. Embed. Syst. Anne K. Madsen, Darshika G. Perera
2018	—	`conf`	Optimized Counter-Based Multi-Ported Memory Architectures for Next-Generation FPGAs. SoCC S. Navid Shahrouzi, Darshika G. Perera
2017	—	`conf`	A fast and scalable FPGA-based parallel processing architecture for K-means clustering for big data analysis. PACRIM Ramprasad Raghavan, Darshika G. Perera
2017	—	`conf`	An efficient FPGA-based memory architecture for compute-intensive applications on embedded devices. PACRIM S. Navid Shahrouzi, Darshika G. Perera
2017	—	`conf`	An efficient embedded multi-ported memory architecture for next-generation FPGAs. ASAP S. Navid Shahrouzi, Darshika G. Perera
2017	J	`jnl`	Dynamic partial reconfigurable hardware architecture for principal component analysis on mobile and embedded devices. EURASIP J. Embed. Syst. S. Navid Shahrouzi, Darshika G. Perera
2015	—	`conf`	Analysis of Computational Models and Application Characteristics Suitable for Reconfigurable FPGAs. 3PGCIC Darshika G. Perera, Kin Fun Li
2015	—	`conf`	Analysis of FPGA-Based Reconfiguration Methods for Mobile and Embedded Applications. FPGAworld Darshika G. Perera
2013	J	`jnl`	A Hardware Collective Intelligence Agent. Trans. Comput. Collect. Intell. Kin Fun Li, Darshika G. Perera
2011	—	`conf`	FPGA-Based Reconfigurable Hardware for Compute Intensive Data Mining Applications. 3PGCIC Darshika G. Perera, Kin Fun Li
2009	C	`conf`	Similarity Computation Using Reconfigurable Embedded Hardware. DASC Darshika G. Perera, Kin Fun Li
2008	B	`conf`	Parallel Computation of Similarity Measures Using an FPGA-Based Processor Array. AINA Darshika G. Perera, Kin Fun Li
2007	—	`conf`	An Investigation of Chip-Level Hardware Support for Web Mining. AINA Workshops (1) Kin Fun Li, Darshika G. Perera