Daniil Chivilikhin

34 papers A* 2A 2B 2C 9Journal 9Unranked 10

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	Decomposing Hard SAT Instances with Metaheuristic Optimization. CoRR Daniil Chivilikhin, Artem Pavlenko, Alexander A. Semenov
2023	A*	`conf`	Probabilistic Generalization of Backdoor Trees with Application to SAT. AAAI Alexander A. Semenov, Daniil Chivilikhin, Stepan Kochemazov, Ibragim Dzhiblavi
2022	B	`conf`	Asynchronous Evolutionary Algorithm for Finding Backdoors in Boolean Satisfiability. CEC Artem Pavlenko, Daniil Chivilikhin, Alexander A. Semenov
2022	J	`jnl`	Estimating the hardness of SAT encodings for Logical Equivalence Checking of Boolean circuits. CoRR Alexander A. Semenov, Konstantin Chukharev, Egor Tarasov, Daniil Chivilikhin, Viktor Kondratiev
2022	A*	`conf`	On Probabilistic Generalization of Backdoors in Boolean Satisfiability. AAAI Alexander A. Semenov, Artem Pavlenko, Daniil Chivilikhin, Stepan Kochemazov
2022	J	`jnl`	fbSAT: Automatic Inference of Minimal Finite-State Models of Function Blocks Using SAT Solver. IEEE Access Konstantin Chukharev, Daniil Chivilikhin
2021	J	`jnl`	BeBoSy: Behavior Examples Meet Bounded Synthesis. IEEE Access Daniil Chivilikhin, Ilya Zakirzyanov, Vladimir Ulyantsev
2021	A	`conf`	Evaluating the Hardness of SAT Instances Using Evolutionary Optimization Algorithms. CP Alexander A. Semenov, Daniil Chivilikhin, Artem Pavlenko, Ilya V. Otpuschennikov, Vladimir Ulyantsev, Alexey Ignatiev
2021	B	`conf`	Temporal Specification Mining for IEC 61499 Function Blocks Using Evolutionary Algorithms and Model Checking. CEC Daniil Chivilikhin
2020	J	`jnl`	Automatic State Machine Reconstruction From Legacy Programmable Logic Controller Using Data Collection and SAT Solver. IEEE Trans. Ind. Informatics Daniil Chivilikhin, Sandeep Patil, Konstantin Chukharev, Anthony Cordonnier, Valeriy Vyatkin
2020	J	`jnl`	SAT-Based Counterexample-Guided Inductive Synthesis of Distributed Controllers. IEEE Access Konstantin Chukharev, Dmitrii Suvorov, Daniil Chivilikhin, Valeriy Vyatkin
2019	J	`jnl`	Function Block Finite-State Model Identification Using SAT and CSP Solvers. IEEE Trans. Ind. Informatics Daniil Chivilikhin, Vladimir Ulyantsev, Anatoly Shalyto, Valeriy Vyatkin
2019	C	`conf`	Towards automatic state machine reconstruction from legacy PLC using data collection. INDIN Daniil Chivilikhin, Sandeep Patil, Anthony Cordonnier, Valeriy Vyatkin
2019	J	`jnl`	fbSAT: Automatic Inference of Minimal Finite-State Models of Function Blocks. CoRR Konstantin Chukharev, Daniil Chivilikhin
2018	C	`conf`	Active Learning of Formal Plant Models For Cyber-Physical Systems. INDIN Polina Ovsiannikova, Daniil Chivilikhin, Vladimir Ulyantsev, Andrey Stankevich, Ilya Zakirzyanov, Valeriy Vyatkin, Anatoly Shalyto
2018	C	`conf`	Counterexample-guided inference of controller logic from execution traces and temporal formulas. ETFA Daniil Chivilikhin, Igor Buzhinsky, Vladimir I. Ulyantsev, Andrey Stankevich, Anatoly Shalyto, Valeriy Vyatkin
2017	C	`conf`	CSP-based inference of function block finite-state models from execution traces. INDIN Daniil Chivilikhin, Vladimir Ulyantsev, Anatoly Shalyto, Valeriy Vyatkin
2017	C	`conf`	Closed-loop verification of a compensating group drive model using synthesized formal plant model. ETFA Polina Ovsiannikova, Daniil Chivilikhin, Vladimir Ulyantsev, Anatoly Shalyto
2017	C	`conf`	Plant trace generation for formal plant model inference: Methods and case study. INDIN Dmitry Avdyukhin, Daniil Chivilikhin, Georgiy Korneev, Vladimir Ulyantsev, Anatoly Shalyto
2017	J	`jnl`	Reconstruction of Function Block Logic Using Metaheuristic Algorithm. IEEE Trans. Ind. Informatics Daniil Chivilikhin, Anatoly Shalyto, Sandeep Patil, Valeriy Vyatkin
2016	—	`conf`	Experimental Study of Automated Parameter Tuning on the Example of irace and the Traveling Salesman Problem. GECCO (Companion) Daniil Chivilikhin
2016	C	`conf`	Reconstruction of function block controllers based on test scenarios and verification. INDIN Daniil Chivilikhin, Ilya Ivanov, Anatoly Shalyto, Valeriy Vyatkin
2016	—	`conf`	Small-Moves Based Mutation For Pick-Up And Delivery Problem. GECCO (Companion) Viacheslav Shalamov, Andrey Filchenkov, Daniil Chivilikhin
2015	—	`conf`	Inferring Automata Logic from Manual Control Scenarios: Implementation in Function Blocks. TrustCom/BigDataSE/ISPA (3) Daniil Chivilikhin, Anatoly Shalyto, Valeriy Vyatkin
2015	—	`conf`	Inferring Temporal Properties of Finite-State Machine Models with Genetic Programming. GECCO (Companion) Daniil Chivilikhin, Ilya Ivanov, Anatoly Shalyto
2015	C	`conf`	Reconstruction of function block logic using metaheuristic algorithm: Initial explorations. INDIN Daniil Chivilikhin, Anatoly Shalyto, Sandeep Patil, Valeriy Vyatkin
2014	C	`conf`	Combining Exact and Metaheuristic Techniques for Learning Extended Finite-State Machines from Test Scenarios and Temporal Properties. ICMLA Daniil Chivilikhin, Vladimir Ulyantsev, Anatoly Shalyto
2014	—	`conf`	Improving the quality of supervised finite-state machine construction using real-valued variables. GECCO (Companion) Igor Buzhinsky, Daniil Chivilikhin, Vladimir Ulyantsev, Fedor Tsarev
2014	—	`conf`	Inferring automata-based programs from specification with mutation-based ant colony optimization. GECCO (Companion) Daniil Chivilikhin, Vladimir Ulyantsev
2013	—	`conf`	Learning Finite-State Machines: Conserving Fitness Function Evaluations by Marking Used Transitions. ICMLA (2) Daniil Chivilikhin, Vladimir Ulyantsev
2013	A	`conf`	MuACOsm: a new mutation-based ant colony optimization algorithm for learning finite-state machines. GECCO Daniil Chivilikhin, Vladimir Ulyantsev
2013	—	`conf`	Solving Five Instances of the Artificial Ant Problem with Ant Colony Optimization. MIM Daniil Chivilikhin, Vladimir Ulyantsev, Anatoly Shalyto
2012	—	`conf`	Learning Finite-State Machines with Ant Colony Optimization. ANTS Daniil Chivilikhin, Vladimir Ulyantsev
2012	—	`conf`	Test-based extended finite-state machines induction with evolutionary algorithms and ant colony optimization. GECCO (Companion) Daniil Chivilikhin, Vladimir Ulyantsev, Fedor Tsarev