Daniel Reiser

12 papers Journal 3Unranked 9
YearRankTypeTitle / Venue / Authors
2025 J jnl
RISC-V CPU Design Using RRAM-CMOS Standard Cells.
IEEE Trans. Very Large Scale Integr. Syst.
Markus Fritscher, Max Uhlmann, Philip Ostrovskyy, Daniel Reiser, Junchao Chen, Jianan Wen, Carsten Schulze, Gerhard Kahmen, Dietmar Fey, Marc Reichenbach, Milos Krstic, Christian Wenger
2025 J jnl
Towards a Memristor-Based Circuit Implementation of the Hindmarsh-Rose Model.
Int. J. Circuit Theory Appl.
Sebastian Jenderny, Daniel Reiser, Karlheinz Ochs, Marc Reichenbach
2024 — conf
Area-Efficient Digital Design Using RRAM-CMOS Standard Cells.
ISVLSI
Markus Fritscher, Max Uhlmann, Philip Ostrovskyy, Daniel Reiser, Junchao Chen, Markus Andreas Schubert, Carsten Schulze, Gerhard Kahmen, Dietmar Fey, Marc Reichenbach, Milos Krstic, Christian Wenger
2024 — conf
Cycle-Accurate FPGA Emulation of RRAM Crossbar Array: Efficient Device and Variability Modeling with Energy Consumption Assessment.
LATS
Jianan Wen, Fabian Luis Vargas, Fukun Zhu, Daniel Reiser, Andrea Baroni, Markus Fritscher, Eduardo Pérez, Marc Reichenbach, Christian Wenger, Milos Krstic
2024 J jnl
Design and analysis of an adaptive radiation resilient RRAM subsystem for processing systems in satellites.
Des. Autom. Embed. Syst.
Daniel Reiser, Junchao Chen, Johannes Knödtel, Andrea Baroni, Milos Krstic, Marc Reichenbach
2024 — conf
HyRPF: Hybrid RRAM Prototyping on FPGA.
SAMOS
Daniel Reiser, Johannes Knödtel, Liliia Almeeva, Jianan Wen, Andrea Baroni, Milos Krstic, Marc Reichenbach
2023 — conf
Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array Configurations.
NEWCAS
Daniel Reiser, Marc Reichenbach, Tommaso Rizzi, Andrea Baroni, Markus Fritscher, Christian Wenger, Cristian Zambelli, Davide Bertozzi
2022 — conf
Thermal switching of TiO
ESSCIRC
Alessandro Milozzi, Daniel Reiser, Andreas Drost, Thomas Neuner, Marc Tornow, Daniele Ielmini
2021 — conf
Fast HBM Access with FPGAs: Analysis, Architectures, and Applications.
IPDPS Workshops
Philipp Holzinger, Daniel Reiser, Tobias Hahn, Marc Reichenbach
2021 — conf
Simulating large neural networks embedding MLC RRAM as weight storage considering device variations.
LASCAS
Markus Fritscher, Johannes Knödtel, Daniel Reiser, Maen Mallah, Stefan Pechmann, Dietmar Fey, Marc Reichenbach
2020 — conf
A Model-to-Circuit Compiler for Evaluation of DNN Accelerators based on Systolic Arrays and Multibit Emerging Memories.
MOCAST
Johannes Knödtel, Markus Fritscher, Daniel Reiser, Dietmar Fey, Marco Breiling, Marc Reichenbach
2013 — conf
A Framework for Interoperability Testing in Pan-European Public Service Provision.
EGOV
Ansgar Mondorf, Maria A. Wimmer, Daniel Reiser