Daniel Mueller-Gritschneder

102 papers A* 2A 21B 4C 9Misc 3Journal 28Unranked 34

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A High-Level Compiler Integration Approach for Deep Learning Accelerators Supporting Abstraction and Optimization. CoRR Samira Ahmadifarsani, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2025	B	`conf`	Automated Graph-level Passes for TinyML Fault Tolerance. IJCNN Johannes Kappes, Johannes Geier, Phillipp van Kempen, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2025	J	`jnl`	DRIP: DRop unImportant data Points - Enhancing Machine Learning Efficiency with Grad-CAM-Based Real-Time Data Prioritization for On-Device Training. CoRR Marcus Rüb, Daniel Konegen, Axel Sikora, Daniel Mueller-Gritschneder
2025	B	`conf`	DRIP: DRop unImportant data Points - Enhancing Machine Learning Efficiency with Grad-CAM-Based Streaming Data Prioritization for On-Device Training. IJCNN Marcus Rüb, Daniel Konegen, Axel Sikora, Daniel Mueller-Gritschneder
2025	—	`conf`	FLAR-SVD: Fast and Latency-Aware Singular Value Decomposition for Model Compression. CVPR Workshops Moritz Thoma, Jorge Villasante, Emad Aghajanzadeh, Shambhavi Balamuthu Sampath, Pierpaolo Morì, Maximilian Groetzinger, Daniil Dylkin, Manoj Rohit Vemparala, Nael Fasfous, Alexander Frickenstein, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2025	A	`conf`	HiFi-SAGE: High Fidelity GraphSAGE-Based Latency Estimators for DNN Optimization. DATE Shambhavi Balamuthu Sampath, Leon Hecht, Moritz Thoma, Lukas Frickenstein, Pierpaolo Morì, Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Walter Stechele, Daniel Mueller-Gritschneder, Claudio Passerone
2025	J	`jnl`	Hybrid Convolution and Vision Transformer NAS Search Space for TinyML Image Classification. CoRR Mikhael Djajapermana, Moritz Reiber, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2025	J	`jnl`	PerCoV2: Improved Ultra-Low Bit-Rate Perceptual Image Compression with Implicit Hierarchical Masked Image Modeling. CoRR Nikolai Körber, Eduard Kromer, Andreas Siebert, Sascha Hauke, Daniel Mueller-Gritschneder, Björn W. Schuller
2025	A	`conf`	Rapid Fault Injection Simulation by Hash-Based Differential Fault Effect Equivalence Checks. DATE Johannes Geier, Leonidas Kontopoulos, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2025	—	`conf`	Sim-to-Real: Tiny Deep Learning Agents on Resource-Constrained Embedded Microcontrollers. CCTA Steven Klotz, Sourabh Kulkarni, Nehaja Joglekar, Thorsten Bucksch, Dip Goswami, Daniel Mueller-Gritschneder
2025	A*	`conf`	SuperFast: Fast Supernet Training Using Initial Knowledge. DAC Moritz Thoma, Emad Aghajanzadeh, Shambhavi Balamuthu Sampath, Pierpaolo Morì, Nael Fasfous, Alexander Frickenstein, Manoj Rohit Vemparala, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2025	—	`conf`	Uncertainty Aware Training to Improve Uncertainty Active Learning for Semantic Segmentation. CVPR Workshops Moritz Thoma, Tobias Preintner, Emad Aghajanzadeh, Shambhavi Balamuthu Sampath, Pierpaolo Morì, Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2024	—	`conf`	A Continual and Incremental Learning Approach for TinyML On-device Training Using Dataset Distillation and Model Size Adaption. ICPS Marcus Rüb, Philipp Tuchel, Axel Sikora, Daniel Mueller-Gritschneder
2024	J	`jnl`	A Continual and Incremental Learning Approach for TinyML On-device Training Using Dataset Distillation and Model Size Adaption. CoRR Marcus Rüb, Philipp Tuchel, Axel Sikora, Daniel Mueller-Gritschneder
2024	B	`conf`	Advancing On-Device Neural Network Training with TinyPropv2: Dynamic, Sparse, and Efficient Backpropagation. IJCNN Marcus Rüb, Axel Sikora, Daniel Mueller-Gritschneder
2024	J	`jnl`	Advancing On-Device Neural Network Training with TinyPropv2: Dynamic, Sparse, and Efficient Backpropagation. CoRR Marcus Rüb, Axel Sikora, Daniel Mueller-Gritschneder
2024	—	`conf`	EGIC: Enhanced Low-Bit-Rate Generative Image Compression Guided by Semantic Segmentation. ECCV (35) Nikolai Körber, Eduard Kromer, Andreas Siebert, Sascha Hauke, Daniel Mueller-Gritschneder, Björn W. Schuller
2024	—	`conf`	Energy-Aware Speed Regulation in Electrical Drives: A Load-Agnostic Motor Control Approach via Reinforcement Learning. ECC Steven Klotz, Thorsten Bucksch, Dip Goswami, Daniel Mueller-Gritschneder
2024	J	`jnl`	Flexible Generation of Fast and Accurate Software Performance Simulators From Compact Processor Descriptions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Conrad Foik, Robert Kunzelmann, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2024	A	`conf`	MATAR: Multi-Quantization-Aware Training for Accurate and Fast Hardware Retargeting. DATE Pierpaolo Morì, Moritz Thoma, Lukas Frickenstein, Shambhavi Balamuthu Sampath, Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Walter Stechele, Daniel Mueller-Gritschneder, Claudio Passerone
2024	—	`conf`	MuDSE: GA-ILP-based Framework for Automated Deployment of Multiple DNNs on Heterogeneous Mixed-Criticality Systems. COINS Alexander Hoffman, Ala Fnayou, Fedor Smirnov, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2024	—	`conf`	MuNAS: TinyML Network Architecture Search Using Goal Attainment and Reinforcement Learning. MECO Alexander Hoffman, Ulf Schlichtmann, Daniel Mueller-Gritschneder
2024	J	`jnl`	PerCo (SD): Open Perceptual Compression. CoRR Nikolai Körber, Eduard Kromer, Andreas Siebert, Sascha Hauke, Daniel Mueller-Gritschneder, Björn W. Schuller
2024	C	`conf`	Seal5: Semi-Automated LLVM Support for RISC-V ISA Extensions Including Autovectorization. DSD Philipp van Kempen, Mathis Salmen, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2024	A	`conf`	Wino Vidi Vici: Conquering Numerical Instability of 8-bit Winograd Convolution for Accurate Inference Acceleration on Edge. WACV Pierpaolo Morì, Lukas Frickenstein, Shambhavi Balamuthu Sampath, Moritz Thoma, Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Christian Unger, Walter Stechele, Daniel Mueller-Gritschneder, Claudio Passerone
2024	—	`conf`	muRISCV-NN: Challenging Zve32x Autovectorization with TinyML Inference Library for RISC-V Vector Extension. CF (Companion) Philipp van Kempen, Jefferson Parker Jones, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2023	—	`conf`	CompaSeC: A Compiler-Assisted Security Countermeasure to Address Instruction Skip Fault Attacks on RISC-V. ASP-DAC Johannes Geier, Lukas Auer, Daniel Mueller-Gritschneder, Uzair Sharif, Ulf Schlichtmann
2023	J	`jnl`	EGIC: Enhanced Low-Bit-Rate Generative Image Compression Guided by Semantic Segmentation. CoRR Nikolai Körber, Eduard Kromer, Andreas Siebert, Sascha Hauke, Daniel Mueller-Gritschneder
2023	—	`conf`	Effective Processor Model Generation from Instruction Set Simulator to Hardware Design. NorCAS Johannes Kappes, Robert Kunzelmann, Karsten Emrich, Conrad Foik, Daniel Mueller-Gritschneder, Wolfgang Ecker
2023	A	`conf`	Efficient Software-Implemented HW Fault Tolerance for TinyML Inference in Safety-critical Applications. DATE Uzair Sharif, Daniel Mueller-Gritschneder, Rafael Stahl, Ulf Schlichtmann
2023	A	`conf`	Extended Abstract: Monitoring-based Thermal Management for Mixed-Criticality Systems. DATE Marcel Mettler, Martin Rapp, Heba Khdr, Daniel Mueller-Gritschneder, Jörg Henkel, Ulf Schlichtmann
2023	J	`jnl`	Fused Depthwise Tiling for Memory Optimization in TinyML Deep Neural Network Inference. CoRR Rafael Stahl, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2023	—	`conf`	MLonMCU: TinyML Benchmarking with Fast Retargeting. CODAI Philipp van Kempen, Rafael Stahl, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2023	J	`jnl`	MLonMCU: TinyML Benchmarking with Fast Retargeting. CoRR Philipp van Kempen, Rafael Stahl, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2023	B	`conf`	Memory Latency Distribution-Driven Regulation for Temporal Isolation in MPSoCs. ECRTS Ahsan Saeed, Denis Hoornaert, Dakshina Dasari, Dirk Ziegenbein, Daniel Mueller-Gritschneder, Ulf Schlichtmann, Andreas Gerstlauer, Renato Mancuso
2023	—	`conf`	MonTM: Monitoring-Based Thermal Management for Mixed-Criticality Systems. PARMA-DITAM Marcel Mettler, Martin Rapp, Heba Khdr, Daniel Mueller-Gritschneder, Jörg Henkel, Ulf Schlichtmann
2023	J	`jnl`	The Universal Safety Format in Action: Tool Integration and Practical Application. SN Comput. Sci. Frederik Haxel, Alexander Viehl, Michael Benkel, Bjoern Beyreuther, Klaus Birken, Rolf Schmedes, Kim Grüttner, Daniel Mueller-Gritschneder
2023	J	`jnl`	TinyProp - Adaptive Sparse Backpropagation for Efficient TinyML On-device Learning. CoRR Marcus Rüb, Daniel Maier, Daniel Mueller-Gritschneder, Axel Sikora
2023	—	`conf`	Towards Rapid Exploration of Heterogeneous TinyML Systems using Virtual Platforms and TVM's UMA. CODAI Samira Ahmadifarsani, Rafael Stahl, Philipp van Kempen, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2023	—	`conf`	vRTLmod: An LLVM based Open-source Tool to Enable Fault Injection in Verilator RTL Simulations. CF Johannes Geier, Daniel Mueller-Gritschneder
2022	J	`jnl`	An FPGA-based Approach to Evaluate Thermal and Resource Management Strategies of Many-core Processors. ACM Trans. Archit. Code Optim. Marcel Mettler, Martin Rapp, Heba Khdr, Daniel Mueller-Gritschneder, Jörg Henkel, Ulf Schlichtmann
2022	—	`conf`	COMPAS: Compiler-assisted Software-implemented Hardware Fault Tolerance for RISC-V. MECO Uzair Sharif, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2022	C	`conf`	CorePerfDSL: A Flexible Processor Description Language for Software Performance Simulation. FDL Conrad Foik, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2022	—	`conf`	Key-Recovery Fault Injection Attack on the Classic McEliece KEM. CBCrypto Sabine Pircher, Johannes Geier, Julian Danner, Daniel Mueller-Gritschneder, Antonia Wachter-Zeh
2022	J	`jnl`	Key-Recovery Fault Injection Attack on the Classic McEliece KEM. IACR Cryptol. ePrint Arch. Sabine Pircher, Johannes Geier, Julian Danner, Daniel Mueller-Gritschneder, Antonia Wachter-Zeh
2022	A	`conf`	Memory Utilization-Based Dynamic Bandwidth Regulation for Temporal Isolation in Multi-Cores. RTAS Ahsan Saeed, Dakshina Dasari, Dirk Ziegenbein, Varun Rajasekaran, Falk Rehm, Michael Pressler, Arne Hamann, Daniel Mueller-Gritschneder, Andreas Gerstlauer, Ulf Schlichtmann
2022	A	`conf`	The Scale4Edge RISC-V Ecosystem. DATE Wolfgang Ecker, Peer Adelt, Wolfgang Müller, Reinhold Heckmann, Milos Krstic, Vladimir Herdt, Rolf Drechsler, Gerhard Angst, Ralf Wimmer, Andreas Mauderer, Rafael Stahl, Karsten Emrich, Daniel Mueller-Gritschneder, Bernd Becker, Philipp Scholl, Eyck Jentzsch, Jan Schlamelcher, Kim Grüttner, Paul Palomero Bernardo, Oliver Bringmann, Mihaela Damian, Julian Oppermann, Andreas Koch, Jörg Bormann, Johannes Partzsch, Christian Mayr, Wolfgang Kunz
2022	C	`conf`	Universal Safety Format: Automated Safety Software Generation. MODELSWARD Frederik Haxel, Alexander Viehl, Michael Benkel, Bjoern Beyreuther, Klaus Birken, Rolf Schmedes, Kim Grüttner, Daniel Mueller-Gritschneder
2021	J	`jnl`	A Distributed Hardware Monitoring System for Runtime Verification on Multi-Tile MPSoCs. ACM Trans. Archit. Code Optim. Marcel Mettler, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2021	Misc	`conf`	Automated HW/SW co-design for edge AI: state, challenges and steps ahead. CODES+ISSS Oliver Bringmann, Wolfgang Ecker, Ingo Feldner, Adrian Frischknecht, Christoph Gerum, Timo Hämäläinen, Muhammad Abdullah Hanif, Michael J. Klaiber, Daniel Mueller-Gritschneder, Paul Palomero Bernardo, Sebastian Siegfried Prebeck, Muhammad Shafique
2021	J	`jnl`	DeeperThings: Fully Distributed CNN Inference on Resource-Constrained Edge Devices. Int. J. Parallel Program. Rafael Stahl, Alexander Hoffman, Daniel Mueller-Gritschneder, Andreas Gerstlauer, Ulf Schlichtmann
2021	—	`conf`	Exploring the RISC-V Vector Extension for the Classic McEliece Post-Quantum Cryptosystem. ISQED Sabine Pircher, Johannes Geier, Alexander Zeh, Daniel Mueller-Gritschneder
2021	—	`conf`	Learning based Memory Interference Prediction for Co-running Applications on Multi-Cores. MLCAD Ahsan Saeed, Daniel Mueller-Gritschneder, Falk Rehm, Arne Hamann, Dirk Ziegenbein, Ulf Schlichtmann, Andreas Gerstlauer
2021	J	`jnl`	REPAIR: Control Flow Protection based on Register Pairing Updates for SW-Implemented HW Fault Tolerance. ACM Trans. Embed. Comput. Syst. Uzair Sharif, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2021	C	`conf`	Tiny Generative Image Compression for Bandwidth-Constrained Sensor Applications. ICMLA Nikolai Körber, Andreas Siebert, Sascha Hauke, Daniel Mueller-Gritschneder
2020	J	`jnl`	Driver Generation for IoT Nodes With Optimization of the Hardware/Software Interface. IEEE Embed. Syst. Lett. Rafael Stahl, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2020	—	`conf`	Investigating the Inherent Soft Error Resilience of Embedded Applications by Full-System Simulation. ASP-DAC Uzair Sharif, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2020	—	`conf`	ML Training on a Tiny Microcontroller for a Self-adaptive Neural Network-Based DC Motor Speed Controller. IoT Streams/ITEM@PKDD/ECML Frederik Funk, Thorsten Bucksch, Daniel Mueller-Gritschneder
2020	J	`jnl`	Machine Learning Approaches for Efficient Design Space Exploration of Application-Specific NoCs. ACM Trans. Design Autom. Electr. Syst. Yong Hu, Marcel Mettler, Daniel Mueller-Gritschneder, Thomas Wild, Andreas Herkersdorf, Ulf Schlichtmann
2020	Misc	`conf`	Runtime Monitoring of Inter- and Intra-Thread Requirements on Embedded MPSoCs. VLSID Marcel Mettler, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2019	J	`jnl`	Analysis of Dissipative Losses in Modular Reconfigurable Energy Storage Systems Using SystemC TLM and SystemC-AMS. ACM Trans. Design Autom. Electr. Syst. Thomas Zimmermann, Mathias Mora, Sebastian Steinhorst, Daniel Mueller-Gritschneder, Andreas Jossen
2019	A*	`conf`	Cross-Layer Resilience: Challenges, Insights, and the Road Ahead. DAC Eric Cheng, Daniel Mueller-Gritschneder, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Deming Chen, Hyungmin Cho, Yanjing Li, Uzair Sharif, Kevin Skadron, Mircea Stan, Ulf Schlichtmann, Subhasish Mitra
2019	—	`conf`	Fully Distributed Deep Learning Inference on Resource-Constrained Edge Devices. SAMOS Rafael Stahl, Zhuoran Zhao, Daniel Mueller-Gritschneder, Andreas Gerstlauer, Ulf Schlichtmann
2019	—	`conf`	Instruction Extension of a RISC-V Processor Modeled with IP-XACT. NORCAS Saman Payvar, Esko Pekkarinen, Rafael Stahl, Daniel Mueller-Gritschneder, Timo D. Hämäläinen
2019	—	`conf`	MAGIC: A Wear-leveling Circuitry to Mitigate Aging Effects in Sense Amplifiers of SRAMs. NEWCAS Alexandra Listl, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2019	—	`conf`	Neural Network-based Vehicle Image Classification for IoT Devices. SiPS Saman Payvar, Mir Khan, Rafael Stahl, Daniel Mueller-Gritschneder, Jani Boutellier
2019	A	`conf`	SRAM Design Exploration with Integrated Application-Aware Aging Analysis. DATE Alexandra Listl, Daniel Mueller-Gritschneder, Ulf Schlichtmann, Sani R. Nassif
2019	—	`conf`	SeRoHAL: generation of selectively robust hardware abstraction layers for efficient protection of mixed-criticality systems. ASP-DAC Petra R. Kleeberger, Juana Rivera, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2018	C	`conf`	Automated Redirection of Hardware Accesses for Host-Compiled Software Simulation. FDL Rafael Stahl, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2018	A	`conf`	Design and validation of fault-tolerant embedded controllers. DATE Saurav Kumar Ghosh, Soumyajit Dey, Dip Goswami, Daniel Mueller-Gritschneder, Samarjit Chakraborty
2018	A	`conf`	ETISS-ML: A multi-level instruction set simulator with RTL-level fault injection support for the evaluation of cross-layer resiliency techniques. DATE Daniel Mueller-Gritschneder, Martin Dittrich, Josef Weinzierl, Eric Cheng, Subhasish Mitra, Ulf Schlichtmann
2018	C	`conf`	Efficient Fault Injection for Embedded Systems: As Fast as Possible but as Accurate as Necessary. IOLTS Petra R. Maier, Uzair Sharif, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2018	C	`conf`	Emulation of an ASIC Power, Temperature and Aging Monitor System for FPGA Prototyping. IOLTS Alexandra Listl, Daniel Mueller-Gritschneder, Fabian Kluge, Ulf Schlichtmann
2018	J	`jnl`	Fault Injection for Test-Driven Development of Robust SoC Firmware. ACM Trans. Embed. Comput. Syst. Petra R. Maier, Veit B. Kleeberger, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2018	J	`jnl`	Graph-Grammar-Based IP-Integration (GRIP) - An EDA Tool for Software-Defined SoCs. ACM Trans. Design Autom. Electr. Syst. Munish Jassi, Yong Hu, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2018	A	`conf`	Performance and accuracy in soft-error resilience evaluation using the multi-level processor simulator ETISS-ML. ICCAD Daniel Mueller-Gritschneder, Uzair Sharif, Ulf Schlichtmann
2018	A	`conf`	Wavefront-MCTS: multi-objective design space exploration of NoC architectures based on Monte Carlo tree search. ICCAD Yong Hu, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2017	—	`ch.`	Host-Compiled Simulation. Handbook of Hardware/Software Codesign Daniel Mueller-Gritschneder, Andreas Gerstlauer
2017	C	`conf`	The extendable translating instruction set simulator (ETISS) interlinked with an MDA framework for fast RISC prototyping. RSP Daniel Mueller-Gritschneder, Keerthikumara Devarajegowda, Martin Dittrich, Wolfgang Ecker, Marc Greim, Ulf Schlichtmann
2016	Misc	`conf`	Fault injection at host-compiled level with static fault set reduction for SoC firmware robustness testing. CODES+ISSS Petra R. Maier, Veit Kleeberger, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2016	—	`conf`	Safety evaluation based on virtual prototypes: Fault injection with multi-level processor models. ISIC Daniel Mueller-Gritschneder, Marc Greim, Ulf Schlichtmann
2015	A	`conf`	The next generation of virtual prototyping: ultra-fast yet accurate simulation of HW/SW systems. DATE Oliver Bringmann, Wolfgang Ecker, Andreas Gerstlauer, Ajay Goyal, Daniel Mueller-Gritschneder, Prasanth Sasidharan, Simranjit Singh
2014	J	`jnl`	Deterministic Synthesis of Hybrid Application-Specific Network-on-Chip Topologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Vladimir Todorov, Daniel Mueller-Gritschneder, Helmut Reinig, Ulf Schlichtmann
2014	—	`conf`	Fault-tolerant embedded control systems for unreliable hardware. ISIC Dip Goswami, Daniel Mueller-Gritschneder, Twan Basten, Ulf Schlichtmann, Samarjit Chakraborty
2014	J	`jnl`	Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. Microelectron. Reliab. Andreas Herkersdorf, Hananeh Aliee, Michael Engel, Michael Glaß, Christina Gimmler-Dumont, Jörg Henkel, Veit Kleeberger, Michael A. Kochte, Johannes Maximilian Kühn, Daniel Mueller-Gritschneder, Sani R. Nassif, Holm Rauchfuss, Wolfgang Rosenstiel, Ulf Schlichtmann, Muhammad Shafique, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis, Hans-Joachim Wunderlich
2014	—	`conf`	System C-based multi-level error injection for the evaluation of fault-tolerant systems. ISIC Daniel Mueller-Gritschneder, Petra R. Maier, Marc Greim, Ulf Schlichtmann
2013	J	`jnl`	A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience. IEEE Micro Veit Kleeberger, Christina Gimmler-Dumont, Christian Weis, Andreas Herkersdorf, Daniel Mueller-Gritschneder, Sani R. Nassif, Ulf Schlichtmann, Norbert Wehn
2013	—	`conf`	A greedy approach for latency-bounded deadlock-free routing path allocation for application-specific NoCs. NOCS Amit Verma, Pritpal S. Multani, Daniel Mueller-Gritschneder, Vladimir Todorov, Ulf Schlichtmann
2013	A	`conf`	A spectral clustering approach to application-specific network-on-chip synthesis. DATE Vladimir Todorov, Daniel Mueller-Gritschneder, Helmut Reinig, Ulf Schlichtmann
2013	A	`conf`	A virtual prototyping platform for real-time systems with a case study for a two-wheeled robot. DATE Daniel Mueller-Gritschneder, Kun Lu, Erik Wallander, Marc Greim, Ulf Schlichtmann
2013	A	`conf`	Analytical timing estimation for temporally decoupled TLMs considering resource conflicts. DATE Kun Lu, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2013	—	`conf`	Application of Dempster-Shafer Theory to task mapping under epistemic uncertainty. SysCon Carsten Uphoff, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2013	A	`conf`	Fast cache simulation for host-compiled simulation of embedded software. DATE Kun Lu, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2013	—	`conf`	Memory access reconstruction based on memory allocation mechanism for source-level simulation of embedded software. ASP-DAC Kun Lu, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2013	—	`conf`	Technology-aware system failure analysis in the presence of soft errors by Mixture Importance Sampling. DFTS Veit Kleeberger, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2012	A	`conf`	Accurately timed transaction level models for virtual prototyping at high abstraction level. DATE Kun Lu, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2012	A	`conf`	Automated construction of a cycle-approximate transaction level model of a memory controller. DATE Vladimir Todorov, Daniel Mueller-Gritschneder, Helmut Reinig, Ulf Schlichtmann
2011	C	`conf`	Control-Flow-Driven Source Level Timing Annotation for Embedded Software Models on Transaction Level. DSD Daniel Mueller-Gritschneder, Kun Lu, Ulf Schlichtmann
2011	—	`conf`	Removal of unnecessary context switches from the systemc simulation kernel for fast VP simulation. ICSAMOS Kun Lu, Daniel Mueller-Gritschneder, Ulf Schlichtmann
2010	A	`conf`	Computation of yield-optimized Pareto fronts for analog integrated circuit specifications. DATE Daniel Mueller-Gritschneder, Helmut Graeb
2009	J	`jnl`	A Successive Approach to Compute the Bounded Pareto Front of Practical Multiobjective Optimization Problems. SIAM J. Optim. Daniel Mueller-Gritschneder, Helmut E. Graeb, Ulf Schlichtmann
2009	J	`jnl`	Pareto optimization of analog circuits considering variability. Int. J. Circuit Theory Appl. Helmut Graeb, Daniel Mueller-Gritschneder, Ulf Schlichtmann