Daniel L. Ostapko

17 papers A* 2A 1Journal 10Unranked 4

Year	Rank	Type	Title / Venue / Authors
2005	—	`conf`	A Mask Reuse Methodology for Reducing System-on-a-Chip Cost. ISQED Subhrajit Bhattacharya, John A. Darringer, Daniel L. Ostapko, Youngsoo Shin
2004	—	`conf`	Modeling Temporal and Spatial Power Supply Voltage Variation for Timing Analysis. PATMOS Howard Chen, Daniel L. Ostapko
2001	A	`conf`	On the Signal Bounding Problem in Timing Analysis. ICCAD Jin-Fuw Lee, Daniel L. Ostapko, Jeffery Soreff, C. K. Wong
1984	J	`jnl`	A Mapping and Memory Chip Hardware which Provides Symmetric Reading/Writing of Horizontal and Vertical Lines. IBM J. Res. Dev. Daniel L. Ostapko
1982	A*	`conf`	Interactive design language: A unified approach to hardware simulation, synthesis and documentation. DAC Leon I. Maissel, Daniel L. Ostapko
1981	J	`jnl`	A Simple Procedure to Generate Optimum Test Patterns for Parity Logic Networks. IEEE Trans. Computers Se June Hong, Daniel L. Ostapko
1979	J	`jnl`	Fault Analysis and Test Generation for Programmable Logic Arrays (PLA's). IEEE Trans. Computers Daniel L. Ostapko, Se June Hong
1975	J	`jnl`	Codes for Self-Clocking, AC-Coupled Transmission: Aspects of Synthesis and Analysis. IBM J. Res. Dev. Se June Hong, Daniel L. Ostapko
1974	—	`conf`	Analysis of algorithms implemented in software and hardware. ACM Annual Conference (2) Daniel L. Ostapko
1974	J	`jnl`	Generating Test Examples for Heuristic Boolean Minimization. IBM J. Res. Dev. Daniel L. Ostapko, Se June Hong
1974	J	`jnl`	MINI: A Heuristic Approach for Logic Minimization. IBM J. Res. Dev. Se June Hong, Robert G. Cain, Daniel L. Ostapko
1974	J	`jnl`	On deriving a relation between circuits and input/output by analyzing an equivalent program. ACM SIGPLAN Notices Daniel L. Ostapko
1972	J	`jnl`	On Complementation of Boolean Functions. IEEE Trans. Computers Se June Hong, Daniel L. Ostapko
1971	A*	`conf`	Minimum test patterns for residue networks. DAC Douglas C. Bossen, Daniel L. Ostapko, Arvind M. Patel, Martin S. Schmookler
1970	—	`conf`	Optimum test patterns for parity networks. AFIPS Fall Joint Computing Conference Douglas C. Bossen, Daniel L. Ostapko, Arvind M. Patel
1970	J	`jnl`	Realization of an Arbitrary Switching Function with a Two-Level Network of Threshold and Parity Elements. IEEE Trans. Computers Daniel L. Ostapko, Stephen S. Yau
1968	J	`jnl`	Realization of a Class of Switching Functions by Threshold-Logic Networks. IEEE Trans. Computers Stephen Sik-Sang Yau, Daniel L. Ostapko