Daniel Kehrer - RankMe

11 papers Journal 3Unranked 8

Year	Rank	Type	Title / Venue / Authors
2010	J	`jnl`	A 75 nm 7 Gb/s/pin 1 Gb GDDR5 Graphics Memory Device With Bandwidth Improvement Techniques. IEEE J. Solid State Circuits Rex Kho, David Boursin, Martin Brox, Peter Gregorius, Heinz Hoenigschmid, Bianka Kho, Sabine Kieser, Daniel Kehrer, Maksim Kuzmenka, Udo Moeller, Pavel Veselinov Petkov, Manfred Plan, Michael Richter, Ian Russell, Kai Schiller, Ronny Schneider, Kartik Swaminathan, Bradley Weber, Julien Weber, Ingo Bormann, Fabien Funfrock, Mario Gjukic, Wolfgang Spirkl, Holger Steffens, Jörg Weller, Thomas Hein
2009	—	`conf`	75nm 7Gb/s/pin 1Gb GDDR5 graphics memory device with bandwidth-improvement techniques. ISSCC Rex Kho, David Boursin, Martin Brox, Peter Gregorius, Heinz Hoenigschmid, Bianka Kho, Sabine Kieser, Daniel Kehrer, Maksim Kuzmenka, Udo Moeller, Pavel Veselinov Petkov, Manfred Plan, Michael Richter, Ian Russell, Kai Schiller, Ronny Schneider, Kartik Swaminathan, Bradley Weber, Julien Weber, Ingo Bormann, Fabien Funfrock, Mario Gjukic, Wolfgang Spirkl, Holger Steffens, Jörg Weller, Thomas Hein
2007	—	`conf`	Cascading Techniques for a High-Speed Memory Interface. ISSCC Zheng Gu, Peter Gregorius, Daniel Kehrer, Lydia Neumann, Evelyn Neuscheler, Thomas Rickes, Hermann Ruckerbauer, Ralf Schledz, Martin Streibl, Jürgen Zielbauer
2005	—	`conf`	A 24 GHz dual-modulus prescaler in 90nm CMOS. ISCAS (4) Hans-Dieter Wohlmuth, Daniel Kehrer
2004	J	`jnl`	A 30-gb/s 70-mW one-stage 4: 1 multiplexer in 0.13-μm CMOS. IEEE J. Solid State Circuits Daniel Kehrer, Hans-Dieter Wohlmuth
2004	—	`conf`	A low power 13-Gb/s 2^7-1 pseudo random bit sequence generator IC in 120 nm bulk CMOS. SBCCI Hans-Dieter Wohlmuth, Daniel Kehrer
2003	J	`jnl`	40-Gb/s 2: 1 multiplexer and 1: 2 demultiplexer in 120-nm standard CMOS. IEEE J. Solid State Circuits Daniel Kehrer, Hans-Dieter Wohlmuth, Herbert Knapp, Martin Wurzer, Arpad L. Scholtz
2003	—	`conf`	A 15 GHz 256/257 dual-modulus prescaler in 120 nm CMOS. ESSCIRC Hans-Dieter Wohlmuth, Daniel Kehrer
2003	—	`conf`	A 20 Gb/s 82mW one-stage 4:1 multiplexer in 0.13 μm CMOS. ESSCIRC Daniel Kehrer, Hans-Dieter Wohlmuth
2002	—	`conf`	A monolithic 2.45 GHz, 0.56 W power amplifier with 45% PAE at 2.4 V in standard 25 GHz f ISCAS (4) Winfried Bakalski, Werner Simbürger, Daniel Kehrer, Hans-Dieter Wohlmuth, Mirjana Rest, Arpad L. Scholtz
2001	—	`conf`	Modeling of monolithic lumped planar transformers up to 20 GHz. CICC Daniel Kehrer, Werner Simbürger, Hans-Dieter Wohlmuth, Arpad L. Scholtz