Daniel Hackenberg

50 papers A* 1A 2B 8C 3Misc 1Journal 13Unranked 22
YearRankTypeTitle / Venue / Authors
2024 — conf
16 Years of SPEC Power: An Analysis of x86 Energy Efficiency Trends.
CLUSTER Workshops
Hannes Tröpgen, Robert Schöne, Thomas Ilsche, Daniel Hackenberg
2024 J jnl
16 Years of SPEC Power: An Analysis of x86 Energy Efficiency Trends.
CoRR
Hannes Tröpgen, Robert Schöne, Thomas Ilsche, Daniel Hackenberg
2024 — conf
Calculating User-Centric Carbon Footprints for HPC.
CLUSTER Workshops
Christian Wassermann, Mario Bielert, Gert Vanberg, Daniel Hackenberg, Christian Terboven, Matthias S. Müller
2024 B conf
Energy Efficiency Features of the Intel Alder Lake Architecture.
ICPE
Robert Schöne, Markus Velten, Daniel Hackenberg, Thomas Ilsche
2024 J jnl
Energy-aware operation of HPC systems in Germany.
CoRR
Estela Suarez, Hendryk Bockelmann, Norbert Eicker, Jan Eitzinger, Salem El Sayed, Thomas Fieseler, Martin Frank, Peter Frech, Pay Giesselmann, Daniel Hackenberg, Georg Hager, Andreas Herten, Thomas Ilsche, Bastian Koller, Erwin Laure, Cristina Manzano, Sebastian Oeste, Michael Ott, Klaus Reuter, Ralf Schneider, Kay Thust, Benedikt von St. Vieth
2022 B conf
Memory Performance of AMD EPYC Rome and Intel Cascade Lake SP Server Processors.
ICPE
Markus Velten, Robert Schöne, Thomas Ilsche, Daniel Hackenberg
2022 J jnl
Memory Performance of AMD EPYC Rome and Intel Cascade Lake SP Server Processors.
CoRR
Markus Velten, Robert Schöne, Thomas Ilsche, Daniel Hackenberg
2021 C conf
Energy Efficiency Aspects of the AMD Zen 2 Architecture.
CLUSTER
Robert Schöne, Thomas Ilsche, Mario Bielert, Markus Velten, Markus Schmidl, Daniel Hackenberg
2021 J jnl
Energy Efficiency Aspects of the AMD Zen 2 Architecture.
CoRR
Robert Schöne, Thomas Ilsche, Mario Bielert, Markus Velten, Markus Schmidl, Daniel Hackenberg
2021 C conf
FIRESTARTER 2: Dynamic Code Generation for Processor Stress Tests.
CLUSTER
Robert Schöne, Markus Schmidl, Mario Bielert, Daniel Hackenberg
2021 J jnl
FIRESTARTER 2: Dynamic Code Generation for Processor Stress Tests.
CoRR
Robert Schöne, Markus Schmidl, Mario Bielert, Daniel Hackenberg
2019 — conf
Energy Efficiency Features of the Intel Skylake-SP Processor and Their Impact on Performance.
HPCS
Robert Schöne, Thomas Ilsche, Mario Bielert, Andreas Gocht, Daniel Hackenberg
2019 J jnl
Energy Efficiency Features of the Intel Skylake-SP Processor and Their Impact on Performance.
CoRR
Robert Schöne, Thomas Ilsche, Mario Bielert, Andreas Gocht, Daniel Hackenberg
2019 — conf
MetricQ: A Scalable Infrastructure for Processing High-Resolution Time Series Data.
DAAC@SC
Thomas Ilsche, Daniel Hackenberg, Robert Schöne, Mario Höpfner, Wolfgang E. Nagel
2019 J jnl
Power measurement techniques for energy-efficient computing: reconciling scalability, resolution, and accuracy.
SICS Softw.-Intensive Cyber Phys. Syst.
Thomas Ilsche, Robert Schöne, Joseph Schuchart, Daniel Hackenberg, Marc Simon, Yiannis Georgiou, Wolfgang E. Nagel
2018 J jnl
The Shift from Processor Power Consumption to Performance Variations: Fundamental Implications at Scale.
CoRR
Joseph Schuchart, Daniel Hackenberg, Robert Schöne, Thomas Ilsche, Ramkumar Nagappan, Michael K. Patterson
2017 B conf
Detecting Memory-Boundedness with Hardware Performance Counters.
ICPE
Daniel Molka, Robert Schöne, Daniel Hackenberg, Wolfgang E. Nagel
2017 — conf
Powernightmares: The Challenge of Efficiently Using Sleep States on Multi-core Systems.
Euro-Par Workshops
Thomas Ilsche, Marcus Hähnel, Robert Schöne, Mario Bielert, Daniel Hackenberg
2017 J jnl
The READEX formalism for automatic tuning for energy efficiency.
Computing
Joseph Schuchart, Michael Gerndt, Per Gunnar Kjeldsberg, Michael Lysaght, David Horák, Lubomír Ríha, Andreas Gocht, Mohammed Sourouri, Madhura Kumaraswamy, Anamika Chowdhury, Magnus Jahre, Kai Diethelm, Othman Bouizi, Umbreen Sabir Mian, Jakub Kruzík, Radim Sojka, Martin Beseda, Venkatesh Kannan, Zakaria Bendifallah, Daniel Hackenberg, Wolfgang E. Nagel
2017 A conf
Towards fine-grained dynamic tuning of HPC applications on modern multi-core architectures.
SC
Mohammed Sourouri, Espen Birger Raknes, Nico Reissmann, Johannes Langguth, Daniel Hackenberg, Robert Schöne, Per Gunnar Kjeldsberg
2017 C conf
lo2s - Multi-core System and Application Performance Analysis for Linux.
CLUSTER
Thomas Ilsche, Robert Schöne, Mario Bielert, Andreas Gocht, Daniel Hackenberg
2016 — conf
Software Controlled Clock Modulation for Energy Efficiency Optimization on Intel Processors.
E2SC@SC
Robert Schöne, Thomas Ilsche, Mario Bielert, Daniel Molka, Daniel Hackenberg
2016 J jnl
The shift from processor power consumption to performance variations: fundamental implications at scale.
Comput. Sci. Res. Dev.
Joseph Schuchart, Daniel Hackenberg, Robert Schöne, Thomas Ilsche, Ramkumar Nagappan, Michael K. Patterson
2015 — conf
An Energy Efficiency Feature Survey of the Intel Haswell Processor.
IPDPS Workshops
Daniel Hackenberg, Robert Schöne, Thomas Ilsche, Daniel Molka, Joseph Schuchart, Robin Geyer
2015 — conf
Business Strategy, IT Management and Business Value - a tripartite interaction?
AMCIS
Heiko Gewald, Daniel Hackenberg, Andy Weeger
2015 B conf
Cache Coherence Protocol and Memory Performance of the Intel Haswell-EP Architecture.
ICPP
Daniel Molka, Daniel Hackenberg, Robert Schöne, Wolfgang E. Nagel
2015 A conf
Node variability in large-scale power measurements: perspectives from the Green500, Top500 and EEHPCWG.
SC
Thomas Scogland, Jonathan Azose, David Rohr, Suzanne Rivoire, Natalie J. Bates, Daniel Hackenberg
2015 — conf
Power measurements for compute nodes: Improving sampling rates, granularity and accuracy.
IGSC
Thomas Ilsche, Daniel Hackenberg, Stefan Graul, Robert Schöne, Joseph Schuchart
2014 — conf
Analysis of Parallel Applications on a High Performance-Low Energy Computer.
Euro-Par Workshops (2)
Florina M. Ciorba, Thomas Ilsche, Elke Franz, Stefan Pfennig, Christian Scheunert, Ulf Markwardt, Joseph Schuchart, Daniel Hackenberg, Robert Schöne, Andreas Knüpfer, Wolfgang E. Nagel, Eduard A. Jorswieck, Matthias S. Müller
2014 — conf
HDEEM: high definition energy efficiency monitoring.
E2SC@SC
Daniel Hackenberg, Thomas Ilsche, Joseph Schuchart, Robert Schöne, Wolfgang E. Nagel, Marc Simon, Yiannis Georgiou
2014 — conf
Main memory and cache performance of intel sandy bridge and AMD bulldozer.
MSPC@PLDI
Daniel Molka, Daniel Hackenberg, Robert Schöne
2013 — conf
Introducing FIRESTARTER: A processor stress test utility.
IGCC
Daniel Hackenberg, Roland Oldenburg, Daniel Molka, Robert Schöne
2013 B conf
Power measurement techniques on standard compute nodes: A quantitative comparison.
ISPASS
Daniel Hackenberg, Thomas Ilsche, Robert Schöne, Daniel Molka, Maik Schmidt, Wolfgang E. Nagel
2012 Misc conf
Collecting Distributed Performance Data with Dataheap: Generating and Exploiting a Holistic System View.
ICCS
Michael Kluge, Daniel Hackenberg, Wolfgang E. Nagel
2012 J jnl
Flexible workload generation for HPC cluster efficiency benchmarking.
Comput. Sci. Res. Dev.
Daniel Molka, Daniel Hackenberg, Robert Schöne, Timo Minartz, Wolfgang E. Nagel
2012 — conf
Memory Performance at Reduced CPU Clock Speeds: An Analysis of Current x86_64 Processors.
HotPower
Robert Schöne, Daniel Hackenberg, Daniel Molka
2012 J jnl
Performance analysis of multi-level parallelism: inter-node, intra-node and hardware accelerators.
Concurr. Comput. Pract. Exp.
Daniel Hackenberg, Guido Juckeland, Holger Brunst
2012 — conf
SPEC OMP2012 - An Application Benchmark Suite for Parallel Systems Using OpenMP.
IWOMP
Matthias S. Müller, John Baron, William C. Brantley, Huiyu Feng, Daniel Hackenberg, Robert Henschel, Gabriele Jost, Daniel Molka, Chris Parrott, Joe Robichaux, Pavel Shelepugin, G. Matthijs van Waveren, Brian Whitney, Kalyan Kumaran
2011 — conf
Memory Performance and SPEC OpenMP Scalability on Quad-Socket x86_64 Systems.
ICA3PP (1)
Daniel Molka, Robert Schöne, Daniel Hackenberg, Matthias S. Müller
2011 B conf
On-line analysis of hardware performance events for workload characterization and processor frequency scaling decisions.
ICPE
Robert Schöne, Daniel Hackenberg
2011 — conf
Simultaneous multithreading on x86_64 systems: an energy efficiency evaluation.
HotPower@SOSP
Robert Schöne, Daniel Hackenberg, Daniel Molka
2010 — conf
Characterizing the energy consumption of data transfers and arithmetic operations on x86-64 processors.
Green Computing Conference
Daniel Molka, Daniel Hackenberg, Robert Schöne, Matthias S. Müller
2010 B conf
High Resolution Program Flow Visualization of Hardware Accelerated Hybrid Multi-core Applications.
CCGRID
Daniel Hackenberg, Guido Juckeland, Holger Brunst
2010 J jnl
Quantifying power consumption variations of HPC systems using SPEC MPI benchmarks.
Comput. Sci. Res. Dev.
Daniel Hackenberg, Robert Schöne, Daniel Molka, Matthias S. Müller, Andreas Knüpfer
2010 — conf
The VampirTrace Plugin Counter Interface: Introduction and Examples.
Euro-Par Workshops
Robert Schöne, Ronny Tschüter, Thomas Ilsche, Daniel Hackenberg
2009 A* conf
Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems.
MICRO
Daniel Hackenberg, Daniel Molka, Wolfgang E. Nagel
2009 — conf
Comprehensive Performance Tracking with Vampir 7.
Parallel Tools Workshop
Holger Brunst, Daniel Hackenberg, Guido Juckeland, Heide Rohling
2009 B conf
Memory Performance and Cache Coherency Effects on an Intel Nehalem Multiprocessor System.
PACT
Daniel Molka, Daniel Hackenberg, Robert Schöne, Matthias S. Müller
2008 — conf
Event Tracing and Visualization for Cell Broadband Engine Systems.
Euro-Par
Daniel Hackenberg, Holger Brunst, Wolfgang E. Nagel
2006 — conf
Optimizing OpenMP Parallelized DGEMM Calls on SGI Altix 3700.
Euro-Par
Daniel Hackenberg, Robert Schöne, Wolfgang E. Nagel, Stefan Pflüger