Daniel Gajski - RankMe

127 papers A* 32A 18B 4C 5Misc 6Journal 23Unranked 39

Year	Rank	Type	Title / Venue / Authors
2016	J	`jnl`	A case study to develop a graduate-level degree program in embedded & cyber-physical systems. SIGBED Rev. Fadi J. Kurdahi, Mohammad Abdullah Al Faruque, Daniel Gajski, Ahmed M. Eltawil
2015	J	`jnl`	Implementing flexible hybrid instruction in an electrical engineering course: The best of three worlds? Comput. Educ. Wenliang He, Daniel Gajski, George Farkas, Mark Warschauer
2010	B	`conf`	Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications. LCTES Ines Viskic, Lochi Yu, Daniel Gajski
2010	A*	`conf`	What input-language is the best choice for high level synthesis (HLS)? DAC Daniel Gajski, Todd M. Austin, Steve Svoboda
2009	—	`conf`	Hardware-dependent software synthesis for many-core embedded systems. ASP-DAC Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho, Yonghyun Hwang, Lochi Yu, Daniel Gajski
2009	J	`jnl`	Model Based Synthesis of Embedded Software. J. Softw. Samar Abdi, Daniel Gajski, Ines Viskic
2008	J	`jnl`	An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors. IEEE Trans. Very Large Scale Integr. Syst. Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel Gajski
2008	A*	`conf`	Automatic architecture refinement techniques for customizing processing elements. DAC Bita Gorjiara, Daniel Gajski
2008	A*	`conf`	C-based design flow: a case study on G.729A for voice over internet protocol (VoIP). DAC Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski
2008	A	`conf`	Cycle-approximate Retargetable Performance Estimation at the Transaction Level. DATE Yonghyun Hwang, Samar Abdi, Daniel Gajski
2008	J	`jnl`	Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs. ACM Trans. Reconfigurable Technol. Syst. Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski
2008	A*	`conf`	Specify-explore-refine (SER): from specification to implementation. DAC Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Daniel Gajski, Atsushi Nakamura, Dai Araki, Yuuji Nishihara
2007	C	`conf`	A novel profile-driven technique for simultaneous power and code-size optimization of microcoded IPs. ICCD Bita Gorjiara, Daniel Gajski
2007	—	`conf`	Automatic Data Path Generation from C code for Custom Processors. IESS Jelena Trajkovic, Daniel Gajski
2007	J	`jnl`	Automatic Layer-Based Generation of System-On-Chip Bus Communication Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Andreas Gerstlauer, Dongwan Shin, Junyu Peng, Rainer Dömer, Daniel Gajski
2007	A	`conf`	FPGA-friendly code compression for horizontal microcoded custom IPs. FPGA Bita Gorjiara, Daniel Gajski
2007	B	`conf`	Interface synthesis for heterogeneous multi-core systems from transaction level models. LCTES Hansu Cho, Samar Abdi, Daniel Gajski
2007	A	`conf`	Interrupt and low-level programming support for expanding the application domain of statically-scheduled horizontal-microcoded architectures in embedded systems. DATE Mehrdad Reshadi, Daniel Gajski
2006	C	`conf`	A Graph Based Algorithm for Data Path Optimization in Custom Processors. DSD Jelena Trajkovic, Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski
2006	C	`conf`	Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths . ICCD Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski
2006	—	`conf`	Design and implementation of transducer for ARM-TMS communication. ASP-DAC Hansu Cho, Samar Abdi, Daniel Gajski
2006	Misc	`conf`	Generic netlist representation for system and PE level design exploration. CODES+ISSS Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski
2006	—	`conf`	Transaction Routing and its Verification by Correct Model Transformations. HLDVT Samar Abdi, Daniel Gajski
2006	J	`jnl`	Verification of System Level Model Transformations. Int. J. Parallel Program. Samar Abdi, Daniel Gajski
2005	—	`conf`	A clustering technique to optimize hardware/software synchronization. ASP-DAC Junyu Peng, Samar Abdi, Daniel Gajski
2005	Misc	`conf`	A cycle-accurate compilation algorithm for custom pipelined datapaths. CODES+ISSS Mehrdad Reshadi, Daniel Gajski
2005	—	`conf`	A formalism for functionality preserving system level transformations. ASP-DAC Samar Abdi, Daniel Gajski
2005	—	`conf`	Multi-metric and multi-entity characterization of applications for early system design exploration. ASP-DAC Lukai Cai, Andreas Gerstlauer, Daniel Gajski
2005	C	`conf`	System design extreme makeover. MEMOCODE Daniel Gajski
2005	Misc	`conf`	What will system level design be when it grows up? CODES+ISSS Grant Martin, Daniel Gajski, David Goodwin, Patrick Lysaght, Peter Marwedel, Mike Muller, Jeff Welser
2004	—	`conf`	A novel memory size model for variable-mapping in system level design. ASP-DAC Lukai Cai, Haobo Yu, Daniel Gajski
2004	—	`conf`	Automatic generation of bus functional models from transaction level models. ASP-DAC Dongwan Shin, Samar Abdi, Daniel Gajski
2004	A*	`conf`	Automatic generation of equivalent architecture model from functional specification. DAC Samar Abdi, Daniel Gajski
2004	—	`conf`	Embedded software generation from system level design languages. ASP-DAC Haobo Yu, Rainer Dömer, Daniel Gajski
2004	Misc	`conf`	Embedded systems education: how to teach the required skills? CODES+ISSS Peter Marwedel, Daniel Gajski, Erwin A. de Kock, Hugo De Man, Mariagiovanna Sami, Ingemar Söderquist
2004	—	`conf`	Model validation for mapping specification behaviors to processing elements. HLDVT Samar Abdi, Daniel Gajski
2004	—	`conf`	On deriving equivalent architecture model from system specification. ASP-DAC Samar Abdi, Daniel Gajski
2004	A*	`conf`	Retargetable profiling for rapid, early system-level design space exploration. DAC Lukai Cai, Andreas Gerstlauer, Daniel Gajski
2004	A*	`conf`	Were the good old days all that good?: EDA then and now. DAC Shishpal Rawat, William H. Joyner Jr., John A. Darringer, Daniel Gajski, Pat O. Pistilli, Hugo De Man, Carl Harris, James Solomon
2003	A*	`conf`	Automatic communication refinement for system level design. DAC Samar Abdi, Dongwan Shin, Daniel Gajski
2003	A	`conf`	RTOS Modeling for System Level Design. DATE Andreas Gerstlauer, Haobo Yu, Daniel Gajski
2003	Misc	`conf`	RTOS scheduling in transaction level models. CODES+ISSS Haobo Yu, Andreas Gerstlauer, Daniel Gajski
2003	A	`conf`	Transaction Based Design: Another Buzzword or the Solution to a Design Problem? DATE Heinz-Josef Schlebusch, Gary Smith, Donatella Sciuto, Daniel Gajski, Carsten Mielenz, Christopher K. Lennard, Frank Ghenassia, Stuart Swan, Joachim Kunkel
2003	Misc	`conf`	Transaction level modeling: an overview. CODES+ISSS Lukai Cai, Daniel Gajski
2002	—	`conf`	Automatic Model Refinement for Fast Architecture Exploration. ASP-DAC/VLSI Design Junyu Peng, Samar Abdi, Daniel Gajski
2002	—	`conf`	Modeling a new RTL semantics in C++. ISCAS (5) Shuqing Zhao, Daniel Gajski
2002	—	`conf`	Optimal Message-Passing for Data Coherency in Distributed Architecture. ISSS Daniel Gajski, Junyu Peng
2002	—	`conf`	System-Level Abstraction Semantics. ISSS Daniel Gajski, Andreas Gerstlauer
2002	A	`conf`	Top-Down System Level Design Methodology Using SpecC, VCC and SystemC. DATE Lukai Cai, Daniel Gajski, Paul Kritzinger, Mike Olivarez
2001	A	`conf`	C/C++: progress or deadlock in system-level specification. DATE Daniel Gajski, Eugenio Villar, Wolfgang Rosenstiel, Vassilios Gerousis, D. Barton, Jonas Plantin, S. E. Ericsson, Patrizia Cavalloro, Gjalt G. de Jong
2001	—	`conf`	Compiling SpecC for simulation. ASP-DAC Jianwen Zhu, Daniel Gajski
2001	—	`conf`	Introduction of system level architecture exploration using the SpecC methodology. ISCAS (5) Lukai Cai, Daniel Gajski, Mike Olivarez
2001	A*	`conf`	Panel: The Next HDL: If C++ is the Answer, What was the Question? DAC Rajesh K. Gupta, Shishpal Rawat, Ingrid Verbauwhede, Gérard Berry, Ramesh Chandra, Daniel Gajski, Kris Konigsfeld, Patrick Schaumont
2001	J	`jnl`	Performance-constrained hierarchical pipelining for behaviors, loops, and operations. ACM Trans. Design Autom. Electr. Syst. Smita Bakshi, Daniel Gajski
2001	—	`conf`	RTL semantics and methodology. ISSS Brian Bailey, Daniel Gajski
2000	—	`conf`	Embedded tutorial: essential issues for IP reuse. ASP-DAC Daniel Gajski, Allen C.-H. Wu, Viraphol Chaiyakul, Shojiro Mori, Tom Nukiyama, Pierre Bricaud
2000	—	`conf`	One language or more?: how can we design an SoC at a system level? ASP-DAC Masaharu Imai, Gary Smith, Steven Schulz, Karen Bartleson, Daniel Gajski, Wolfgang Rosenstiel, Peter Flake, Hiroto Yasuura
2000	—	`conf`	Reuse and protection of intellectual property in the SpecC system. ASP-DAC Rainer Dömer, Daniel Gajski
2000	—	`conf`	The Specification Language SpecC within the PARADISE Design Environment. DIPES Achim Rettberg, Franz J. Rammig, Andreas Gerstlauer, Daniel Gajski, Wolfram Hardt, Bernd Kleinjohann
2000	—	`conf`	Usage-based characterization of complex functional blocks for reuse in behavioral synthesis. ASP-DAC Nong Fan, Viraphol Chaiyakul, Daniel Gajski
1999	—	`conf`	A unified formal model of ISA and FSMD. CODES Jianwen Zhu, Daniel Gajski
1999	A*	`conf`	IP-based Design Methodology. DAC Daniel Gajski
1999	A	`conf`	OpenJ: An Extensible System Level Design Language. DATE Jianwen Zhu, Daniel Gajski
1999	—	`conf`	Panel Statement: System-Level Design: Designers' Wish List vs. Reality. ISSS Daniel Gajski, Reinaldo A. Bergamaschi
1999	—	`conf`	Rapid Prototyping with HW/SW Codesign Tool. ECBS Dai Araki, Tadatoshi Ishii, Daniel Gajski
1999	A*	`conf`	Soft Scheduling in High Level Synthesis. DAC Jianwen Zhu, Daniel Gajski
1998	—	`conf`	IP-Centric Methodology and Specification Language. DIPES Daniel Gajski, Rainer Dömer, Jianwen Zhu
1998	A*	`conf`	System-level exploration with SpecSyn. DAC Daniel Gajski, Frank Vahid, Sanjiv Narayan, Jie Gong
1997	—	`conf`	A Scheduling and Pipelining Algorithm for Hardware/Software Systems. ISSS Smita Bakshi, Daniel Gajski
1997	A*	`conf`	Hardware/Software Partitioning and Pipelining. DAC Smita Bakshi, Daniel Gajski
1997	J	`jnl`	Model refinement for hardware-software codesign. ACM Trans. Design Autom. Electr. Syst. Jie Gong, Daniel Gajski, Smita Bakshi
1996	J	`jnl`	An optimal clock period selection method based on slack minimization criteria. ACM Trans. Design Autom. Electr. Syst. En-Shou Chang, Daniel Gajski, Sanjiv Narayan
1996	A	`conf`	Clock-driven performance optimization in interactive behavioral synthesis. ICCAD Hsiao-Ping Juan, Daniel Gajski, Viraphol Chaiyakul
1996	C	`conf`	Opportunities and pitfalls in HDL-based system design. ICCD Rajesh K. Gupta, Daniel Gajski, Randy Allen, Yatin Trivedi
1995	A*	`conf`	Interfacing Incompatible Protocols Using Interface Process Generation. DAC Sanjiv Narayan, Daniel Gajski
1994	—	`conf`	A System-Design Methodology: Executable-Specification Refinement. EDAC-ETC-EUROASIC Daniel Gajski, Frank Vahid, Sanjiv Narayan
1994	—	`conf`	An Algorithm for Array Variable Clustering. EDAC-ETC-EUROASIC Loganath Ramachandran, Daniel Gajski, Viraphol Chaiyakul
1994	—	`conf`	An Algorithm for Generation of Behavioral Shape Functions. EDAC-ETC-EUROASIC Nancy D. Holmes, Daniel Gajski
1994	A*	`conf`	Protocol Generation for Communication Channels. DAC Sanjiv Narayan, Daniel Gajski
1994	—	`conf`	Synthesis of System-Level Bus Interfaces. EDAC-ETC-EUROASIC Sanjiv Narayan, Daniel Gajski
1993	A*	`conf`	High-Level Transformations for Minimizing Syntactic Variances. DAC Viraphol Chaiyakul, Daniel Gajski, Loganath Ramachandran
1992	A	`conf`	Accurate layout area and delay modeling for system level design. ICCAD Champaka Ramachandran, Fadi J. Kurdahi, Daniel Gajski, Allen C.-H. Wu, Viraphol Chaiyakul
1992	A	`conf`	An effective methodology for functional pipelining. ICCAD Tsing-Fa Lee, Allen C.-H. Wu, Daniel Gajski, Youn-Long Lin
1992	A	`conf`	An efficient multi-view design model for real-time interactive synthesis. ICCAD Allen C.-H. Wu, Tedd Hadley, Daniel Gajski
1992	—	`conf`	Benchmarking and the Art of Syntesis Tool Comparison. Synthesis for Control Dominated Circuits Daniel Gajski, Nikil D. Dutt
1992	A*	`conf`	Functional Synthesis Using Area and Delay Optimization. DAC Elke A. Rundensteiner, Daniel Gajski
1992	A*	`conf`	Specification Partitioning for System Design. DAC Frank Vahid, Daniel Gajski
1991	A	`conf`	An Algorithm for Component Selection in Performance Optimized Scheduling. ICCAD Loganath Ramachandran, Daniel Gajski
1991	A	`conf`	Layout-Area Models for High-Level Synthesis. ICCAD Allen C.-H. Wu, Viraphol Chaiyakul, Daniel Gajski
1991	A	`conf`	Obtaining Functionally Equivalent Simulations using VHDL and a Time-Shift Transformation. ICCAD Frank Vahid, Daniel Gajski
1991	A	`conf`	System Specification and Synthesis with the SpecCharts Language. ICCAD Sanjiv Narayan, Frank Vahid, Daniel Gajski
1990	—	`conf`	A new algorithm for transistor sizing in CMOS circuits. EURO-DAC Allen C.-H. Wu, Nels Vander Zanden, Daniel Gajski
1990	A*	`conf`	An Intelligent Component Database for Behavioral Synthesis. DAC Gwo-Dong Chen, Daniel Gajski
1990	A*	`conf`	An Intermediate Representation for Behavioral Synthesis. DAC Nikil D. Dutt, Tedd Hadley, Daniel Gajski
1990	J	`jnl`	Hypertool: A Programming Aid for Message-Passing Systems. IEEE Trans. Parallel Distributed Syst. Min-You Wu, Daniel Gajski
1990	A	`conf`	Partitioning Algorithms for Layout Synthesis from Register-Transfer Netlists. ICCAD Allen C.-H. Wu, Daniel Gajski
1990	A*	`conf`	Percolation Based Synthesis. DAC Roni Potasman, Joseph Lis, Alexandru Nicolau, Daniel Gajski
1990	—	`conf`	Silicon compilation of switched: capacitor networks. EURO-DAC Mehrdad Negahban, Daniel Gajski
1990	A	`conf`	The Component Sythesis Algorithm: Technology Mapping for Register Transfer Descriptions. ICCAD Elke A. Rundensteiner, Daniel Gajski, Lubomir Bic
1989	A*	`conf`	Designer Controlled Behavioral Synthesis. DAC Nikil D. Dutt, Daniel Gajski
1989	—	`conf`	Hypertool: A Programming Aid for Multicomputers. ICPP (2) Min-You Wu, Daniel Gajski
1989	J	`jnl`	Power routing in channelless floorplan layouts. Integr. Chidchanok Lursinsap, Daniel Gajski
1989	A*	`conf`	VHDL Synthesis Using Structured Modeling. DAC Joseph Lis, Daniel Gajski
1988	A*	`conf`	MILO: A Microarchitecture and Logic Optimizer. DAC Nels Vander Zanden, Daniel Gajski
1987	—	`conf`	A Programming Aid for Message-passing Systems. PP Min-You Wu, Daniel Gajski
1987	A*	`conf`	Improving a PLA Area by Pull-Up Transistor Folding. DAC Chidchanok Lursinsap, Daniel Gajski
1987	A*	`conf`	Knowledge Based Control in Micro-Architecture Design. DAC Forrest Brewer, Daniel Gajski
1987	A*	`conf`	LES: A Layout Expert System. DAC Youn-Long Lin, Daniel Gajski
1986	J	`jnl`	A Heuristic for Suffix Solutions. IEEE Trans. Computers Avinoam Bilgory, Daniel Gajski
1986	A*	`conf`	An expert-system paradigm for design. DAC Forrest Brewer, Daniel Gajski
1986	B	`conf`	CAMP: A Programming Aide for Multiprocessors. ICPP Jih-Kwon Peir, Daniel Gajski
1986	A*	`conf`	Flow graph representation. DAC Alex Orailoglu, Daniel Gajski
1985	J	`jnl`	Comparison of five multiprocessor systems. Parallel Comput. Daniel Gajski, Jih-Kwon Peir
1985	J	`jnl`	Essential Issues in Multiprocessor Systems. Computer Daniel Gajski, Jih-Kwon Peir
1984	J	`jnl`	A Parallel Pipelined Relational Query Processor. ACM Trans. Database Syst. Won Kim, Daniel Gajski, David J. Kuck
1984	A*	`conf`	A Parallel Pipelined Relational Query Processor: An Architectural Overview. ISCA Daniel Gajski, Won Kim, Shinya Fushimi
1984	A*	`conf`	Cell compilation with constraints. DAC Chidchanok Lursinsap, Daniel Gajski
1984	A*	`conf`	Fast Execution of Loops With IF Statements. ISCA Utpal Banerjee, Daniel Gajski
1984	J	`jnl`	Fast Execution of Loops with IF Statements. IEEE Trans. Computers Utpal Banerjee, Daniel Gajski
1983	J	`jnl`	CEDAR: a large scale multiprocessor. SIGARCH Comput. Archit. News Daniel Gajski, David J. Kuck, Duncan H. Lawrie, Ahmed H. Sameh
1983	B	`conf`	Cedar : A Large Scale Multiprocessor. ICPP Daniel Gajski, David J. Kuck, Duncan H. Lawrie, Ahmed H. Sameh
1983	J	`jnl`	New VLSI Tools - Guest Editors' Introduction. Computer Daniel Gajski, Robert H. Kuhn
1982	J	`jnl`	A Second Opinion on Data Flow Machines and Languages. Computer Daniel Gajski, David A. Padua, David J. Kuck, Robert H. Kuhn
1981	J	`jnl`	An Algorithm for Solving Linear Recurrence Systems on Parallel and Pipelined Machines. IEEE Trans. Computers Daniel Gajski
1981	J	`jnl`	Design of Testable Structures Defined by Simple Loops. IEEE Trans. Computers Jacob A. Abraham, Daniel Gajski
1981	—	`conf`	Recurrence semigroups and their relation to data storage in fast recurrence solvers on parallel machines. CONPAR Daniel Gajski
1980	J	`jnl`	Parallel Compressors. IEEE Trans. Computers Daniel Gajski