Daniel Etiemble

76 papers A* 2A 1B 7C 6Misc 1Journal 32Unranked 26

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	Optical flow algorithms optimized for speed, energy and accuracy on embedded GPUs. J. Real Time Image Process. Thomas Romera, Andrea Petreto, Florian Lemaitre, Manuel Bouyer, Quentin L. Meunier, Lionel Lacassagne, Daniel Etiemble
2022	J	`jnl`	CNTFET quaternary multipliers are less efficient than the corresponding binary ones. CoRR Daniel Etiemble
2022	J	`jnl`	Technologies and Computing Paradigms: Beyond Moore's law? CoRR Daniel Etiemble
2022	J	`jnl`	Ternary and Quaternary CNTFET Full Adders are less efficient than the Binary Ones for Carry-Propagate Adders. CoRR Daniel Etiemble
2022	J	`jnl`	Two New CNTFET Quaternary Full Adders for Carry-Propagate Adders. CoRR Daniel Etiemble
2021	J	`jnl`	Best CNTFET Ternary Adders? CoRR Daniel Etiemble
2020	J	`jnl`	Best implementations of quaternary adders. CoRR Daniel Etiemble
2020	J	`jnl`	Comments on "High-Performance and Energy-Efficient CNFET-Based Designs for Ternary Logic Circuits". IEEE Access Daniel Etiemble
2020	J	`jnl`	Comparing quaternary and binary multipliers. CoRR Daniel Etiemble
2020	J	`jnl`	Multivalued circuits and Interconnect issues. CoRR Daniel Etiemble
2019	J	`jnl`	Comparing ternary and binary adders and multipliers. CoRR Daniel Etiemble
2019	J	`jnl`	Coprocessors: failures and successes. CoRR Daniel Etiemble
2019	J	`jnl`	Evolution of Technologies and Multivalued Circuits. CoRR Daniel Etiemble
2019	J	`jnl`	Ternary circuits: why R=3 is not the Optimal Radix for Computation. CoRR Daniel Etiemble
2018	J	`jnl`	45-year CPU evolution: one law and two equations. CoRR Daniel Etiemble
2018	J	`jnl`	Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors. J. Real Time Image Process. Laurent Cabaret, Lionel Lacassagne, Daniel Etiemble
2017	—	`conf`	Distanceless label propagation: An efficient direct connected component labeling algorithm for GPUs. IPTA Laurent Cabaret, Lionel Lacassagne, Daniel Etiemble
2016	—	`conf`	A new SIMD iterative connected component labeling algorithm. WPMVP@PPoPP Lionel Lacassagne, Laurent Cabaret, Daniel Etiemble, Farouk Hebache, Andrea Petreto
2016	J	`jnl`	Automatic Task-Based Code Generation for High Performance Domain Specific Embedded Language. Int. J. Parallel Program. Antoine Tran Tan, Joel Falcou, Daniel Etiemble, Hartmut Kaiser
2015	J	`jnl`	Color tracking with contextual switching: real-time implementation on CPU. J. Real Time Image Process. Florence Laguzet, Andrés Romero Mier y Terán, Michèle Gouiffès, Lionel Lacassagne, Daniel Etiemble
2015	B	`conf`	Parallel light speed labeling: An efficient connected component labeling algorithm for multi-core processors. ICIP Laurent Cabaret, Lionel Lacassagne, Daniel Etiemble
2014	—	`conf`	High level transforms for SIMD and low-level computer vision algorithms. WPMVP@PPoPP Lionel Lacassagne, Daniel Etiemble, Ali Hassan Zahraee, Alain Dominguez, Pascal Vezolle
2013	—	`conf`	High level tranforms toreduce energy consumption of signal and image processing operators. PATMOS H. Ye, Lionel Lacassagne, Joël Falcou, Daniel Etiemble, Laurent Cabaret, Olivier Florent
2013	J	`jnl`	Parallel Smith-Waterman Comparison on Multicore and Manycore Computing Platforms with BSP++. Int. J. Parallel Program. Khaled Hamidouche, Fernando Machado Mendonca, Joel Falcou, Alba Cristina Magalhaes Alves de Melo, Daniel Etiemble
2012	—	`conf`	Impact of high level transforms on high level synthesis for motion detection algorithm. DASIP H. Ye, Lionel Lacassagne, Daniel Etiemble, Laurent Cabaret, Joel Falcou, Andrés Romero Mier y Terán, Olivier Florent
2011	—	`conf`	A framework for an automatic hybrid MPI+OpenMP code generation. SpringSim (HPC) Khaled Hamidouche, Joel Falcou, Daniel Etiemble
2011	—	`conf`	A small footprint interleaved multithreaded processor for embedded systems. ICECS Charly Bechara, Aurelien Berhault, Nicolas Ventroux, Stéphane Chevobbe, Yves Lhuillier, Raphaël David, Daniel Etiemble
2011	—	`conf`	AHDAM: An Asymmetric Homogeneous with Dynamic Allocator Manycore Chip. Facing the Multicore-Challenge Charly Bechara, Nicolas Ventroux, Daniel Etiemble
2011	—	`conf`	Automatic color space switching for robust tracking. ICSIPA Florence Laguzet, Michèle Gouiffès, Lionel Lacassagne, Daniel Etiemble
2011	C	`conf`	Comparison of Different Thread Scheduling Strategies for Asymmetric Chip MultiThreading Architectures in Embedded Systems. DSD Charly Bechara, Nicolas Ventroux, Daniel Etiemble
2011	C	`conf`	Embedded MRAM for high-speed computing. VLSI-SoC Weisheng Zhao, Yue Zhang, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, D. Revelosona, Claude Chappert, Lionel Torres, Luis Vitorio Cargnini, Raphael Martins Brum, Yoann Guillemenet, Gilles Sassatelli
2011	—	`conf`	High Performance SoC Design Using Magnetic Logic and Memory. VLSI-SoC (Selected Papers) Weisheng Zhao, Lionel Torres, Luis Vitorio Cargnini, Raphael Martins Brum, Yue Zhang, Yoann Guillemenet, Gilles Sassatelli, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, Dafine Ravelosona, Claude Chappert
2011	C	`conf`	Parallel Biological Sequence Comparison on Heterogeneous High Performance Computing Platforms with BSP++. SBAC-PAD Khaled Hamidouche, Fernando Machado Mendonca, Joël Falcou, Daniel Etiemble
2010	C	`conf`	Towards a parameterizable cycle-accurate ISS in ArchC. AICCSA Charly Bechara, Nicolas Ventroux, Daniel Etiemble
2009	B	`conf`	Algorithmic Skeletons within an Embedded Domain Specific Language for the CELL Processor. PACT Tarik Saidani, Joel Falcou, Claude Tadonki, Lionel Lacassagne, Daniel Etiemble
2005	—	`conf`	16-bit Floating Point Instructions for Embedded Multimedia Applications. CAMP Lionel Lacassagne, Daniel Etiemble, S. A. Ould Kablia
2005	—	`conf`	Customizing 16-bit FP Instructions on a NIOS II Processor for FPGA Image and Media Processing. ESTIMedia Daniel Etiemble, Samir Bouaziz, Lionel Lacassagne
2005	J	`jnl`	Des flottants 16 bits sur microprocesseurs d'usage général pour images et multimédia. Tech. Sci. Informatiques Daniel Etiemble, Lionel Lacassagne
2004	B	`conf`	16-Bit FP Sub-Word Parallelism to Facilitate Compiler Vectorization and Improve Performance of Image and Media Processing. ICPP Daniel Etiemble, Lionel Lacassagne
2003	J	`jnl`	Why M-Valued Circuits are Restricted to a Small Niche. J. Multiple Valued Log. Soft Comput. Daniel Etiemble
2002	J	`jnl`	Computer arithmetic and hardware: "off the shelf" microprocessors versus "custom hardware". Theor. Comput. Sci. Daniel Etiemble
2002	J	`jnl`	MPI ou MPI+OpenMP sur grappes de multiprocesseurs? Tech. Sci. Informatiques Franck Cappello, Daniel Etiemble
2002	—	`conf`	Numerical Applications and Sub-Word Parallelism: The NAS Benchmarks on a Pentium 4. HPCS Daniel Etiemble
2002	—	`conf`	Optimizing DSP and media benchmarks for Pentium 4: hardware and software issues. ICME (2) Daniel Etiemble
2001	J	`jnl`	Understanding performance of SMP clusters running MPI programs. Future Gener. Comput. Syst. Franck Cappello, Olivier Richard, Daniel Etiemble
2000	A*	`conf`	Investigating the Performance of Two Programming Models for Clusters of SMP PCs. HPCA Franck Cappello, Olivier Richard, Daniel Etiemble
2000	A	`conf`	MPI versus MPI+OpenMP on IBM SP for the NAS Benchmarks. SC Franck Cappello, Daniel Etiemble
1999	Misc	`conf`	Performance Evaluation of Two Programming Models for a Cluster of PC Biprocessors. PDPTA Franck Cappello, Olivier Richard, Daniel Etiemble
1999	B	`conf`	Performance of the NAS Benchmarks on a Cluster of SMP PCs Using a Parallelization of the MPI Programs with OpenMP. PaCT Franck Cappello, Olivier Richard, Daniel Etiemble
1997	B	`conf`	An HPF Case Study of a Domain-Decomposition Based Irregular Application. PaCT Cécile Germain, Jacques Laminie, Marie Pallud, Daniel Etiemble
1997	B	`conf`	Communications in Parallel Architectures and Networks of Workstations: From Standardisation to New Standards. PaCT Franck Cappello, Daniel Etiemble
1997	—	`conf`	Complete x86 instruction trace generation from hardware bus collect. EUROMICRO P. Bosch, A. Carloganu, Daniel Etiemble
1997	—	`conf`	Performance evaluation of the memory hierarchy of a desktop PC using commodity chips with specific traces. EUROMICRO A. Pavlov, Jean-Luc Béchennec, Daniel Etiemble
1995	—	`conf`	From Multi-Valued Current Mode CMOS Circuits to Efficient Voltage Mode CMOS Arithmetic Operators. ISMVL Keivan Navi, Daniel Etiemble
1995	B	`conf`	Standard Microprocessors Versus Custom Processing Elements for Massively Parallel Architectures. PaCT Daniel Etiemble, Cécile Germain
1994	—	`conf`	CML Current Mode Full Adders for 2.5-V Power Supply. ISMVL A. Kazeminejad, Keivan Navi, Daniel Etiemble
1994	J	`jnl`	Parallel architecture and language in Europe. Future Gener. Comput. Syst. Daniel Etiemble, Jean-Claude Syre
1994	—	`conf`	Performance of CMOS Current Mode Full Adders. ISMVL Keivan Navi, A. Kazeminejad, Daniel Etiemble
1993	—	`conf`	A Basis for the Comparison of Binary and m-Valued Current Mode Circuits: the Multioperand Addition with Redundant Number Systems. ISMVL Daniel Etiemble, Keivan Navi
1993	J	`jnl`	A Communication Architecture for a Massively Parallel Message-Passing Multicomputer. J. Parallel Distributed Comput. Cécile Germain, Jean-Luc Béchennec, Daniel Etiemble, Jean-Paul Sansonnet
1993	—	`conf`	A Parralel Architecture Based on Compiled Communication Schemes. PARCO Franck Cappello, Jean-Luc Béchennec, Franck Delaplace, Damien Gautier de Lahaut, Cécile Germain, Jean-Louis Giavitto, Vincent Néri, Daniel Etiemble
1993	C	`conf`	Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system. IEEE Symposium on Computer Arithmetic Daniel Etiemble, Keivan Navi
1993	—	`conf`	Balanced Distributed Memory Parallel Computers. ICPP (1) Franck Cappello, Jean-Luc Béchennec, Franck Delaplace, Cécile Germain, Jean-Louis Giavitto, Vincent Néri, Daniel Etiemble
1993	J	`jnl`	Hardware features of the static communication network of a parallel architecture. Microprocess. Microprogramming Vincent Néri, Jean-Luc Béchennec, Franck Cappello, Daniel Etiemble
1992	—	`conf`	On the Performance of Multivalued Integrated Circuits: Past, Present and Future. ISMVL Daniel Etiemble
1992	—	`ed.`	PARLE '92: Parallel Architectures and Languages Europe, 4th International PARLE Conference, Paris, France, June 15-18, 1992, Proceedings PARLE Daniel Etiemble, Jean-Claude Syre
1991	J	`jnl`	3D hardware packages for parallel architectures. Microprocessing and Microprogramming Jean-Luc Béchennec, Franck Cappello, Daniel Etiemble
1990	—	`conf`	4-Valued BiCMOS Circuits for the Transmission System of a Massively Parallel Architecture. ISMVL Daniel Etiemble, Christophe Chanussot, Vincent Néri
1990	J	`jnl`	A risc central processing unit for a massivelly parallel architecture. Microprocessing and Microprogramming Franck Cappello, Jean-Luc Béchennec, Daniel Etiemble
1988	C	`conf`	A highly parallel processor with an instruction set including relational algebra. ICCD Pascal Faudemay, Daniel Etiemble, Jean-Luc Béchennec
1988	J	`jnl`	Comparison of Binary and Multivalued ICs According to VLSI Criteria. Computer Daniel Etiemble, Michel Israël
1987	—	`conf`	The Database Processor 'RAPID'. IWDM Pascal Faudemay, Daniel Etiemble, Jean-Luc Béchennec, He Hé
1984	A*	`conf`	Micro-computer oriented algorithms for delay evaluation of MOS gates. DAC Daniel Etiemble, V. Adeline, Nguyen H. Duyet, J. C. Ballegeer
1980	J	`jnl`	Multivalued I IEEE Trans. Computers Daniel Etiemble
1978	—	`conf`	TTL circuits for a 4-valued bus a way to reduce package and interconnections. MVL Daniel Etiemble
1977	J	`jnl`	Implementation of Ternary Circuits with Binary Integrated Circuits. IEEE Trans. Computers Daniel Etiemble, Michel Israël