Dan Lake

12 papers A* 1Misc 1Journal 3Unranked 7
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Standardized 20-Tb/s Bandwidth Scalable Heterogeneous 2.5-D System Supporting Assembly Time Workload-Dependent Chiplet Configurations.
IEEE J. Solid State Circuits
Srivatsa Rangachar Srinivasa, Dileep John Kurian, Paolo A. Aseron, Prerna Budhkar, Vinayak Honkote, Dan Lake, Mikhail J. Moiseev, Robert J. Munoz, Anuradha Srinivasan, Tanay Karnik
2026 — conf
HERACLES: 8192-Way SIMD Programmable Scalable Fully-Homomorphic Encryption SoC for Privacy-Preserving Cloud Computing in Intel 3 CMOS.
ISSCC
Anupam Golder, Raghavan Kumar, Sachin Taneja, Kylan Race, Paolo A. Aseron, James Greensky, Wen Wang, Huijing Gong, Lalith Kethareswaran, Vikram B. Suresh, Adish Vartak, AppaRao Challagundla, Jeremy Casas, Poornima Lalwaney, Duhyeong Kim, Christopher N. Gutierrez, Ernesto Zamora Ramos, Wonhee Cho, Jose M. Rojas Chaves, Michael Steiner, Dan Lake, Nataraj Yennampelli, Karthik Nivarthi, Kamalakanth Bijinapally, Bala Prasad Talamala, Sravanth Valluri, Vasantha Srirambhatla, Chris Wilkerson, Rosario Cammarota, Sanu Mathew
2025 — conf
A 300MB SRAM, 20Tb/s Bandwidth Scalable Heterogenous 2.5D System Inferencing Simultaneous Streams Across 20 Chiplets with Workload-Dependent Configurations.
ISSCC
Srivatsa Rangachar Srinivasa, Dileep Kurian, Paolo A. Aseron, Prerna Budhkar, Arun Radhakrishnan, Alejandro Cardenas Lopez, Jainaveen Sundaram, Vinayak Honkote, Leonid Azarenkov, Dan Lake, Jaykant Timbadiya, Mikhail J. Moiseev, Brando Perez Esparza, Ronald Kalim, Erika Ramirez Lozano, Mukesh Bhartiya, Sriram Muthukumar, Satish Yada, Sureshbabu Kadavakollu, Saransh Chhabra, Kamakhya Prasad Sahu, James Greensky, Xavier Brun, Esdras Juarez Hernandez, Robert Munoz, Thomas P. Thomas, Shawna Liff, Vivek De, Anuradha Srinivasan, Tanay Karnik
2025 — conf
System-Level Validation Across Multiple Platforms to build a Robust 2.5D Multi Foundry Chiplet Solution.
ACM Great Lakes Symposium on VLSI
Srivatsa Rangachar Srinivasa, Dileep Kurian, Paolo A. Aseron, Prerna Budhkar, Vinayak Honkote, Dan Lake, Jaykant Timbadiya, Satish Yada, Suresh Kadavakollu, James Greensky, Gauthaman Murali, Anuradha Srinivasan, Ragh Kuttappa, Tanay Karnik
2023 J jnl
A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference.
IEEE J. Solid State Circuits
Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Dan Lake, Brent R. Carlton
2022 — conf
A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal Startup.
ISSCC
Somnath Kundu, Timo Huusari, Hao Luo, Abhishek Agrawal, Eduardo Alban, Sarah Shahraini, Thao Xiong, Dan Lake, Stefano Pellerano, Jason Mix, Nasser A. Kurd, Mohamed Abdel-Moneum, Brent R. Carlton
2022 — conf
A 32.2 TOPS/W SRAM Compute-in-Memory Macro Employing a Linear 8-bit C-2C Ladder for Charge Domain Computation in 22nm for Edge Inference.
VLSI Technology and Circuits
Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Xiaosen Liu, Dan Lake, Brent R. Carlton, May Wu
2021 J jnl
A Back-Sampling Chain Technique for Accelerated Detection, Characterization, and Reconstruction of Radiation-Induced Transient Pulses.
IEEE Trans. Very Large Scale Integr. Syst.
Saurabh Kumar, Minki Cho, Luke R. Everson, Andres Malavasi, Dan Lake, Carlos Tokunaga, Muhammad M. Khellah, James W. Tschanz, Vivek De, Chris H. Kim
2020 — conf
A 0.05pJ/Pixel 70fps FHD 1Meps Event-Driven Visual Data Processing Unit.
VLSI Circuits
Somnath Paul, Turbo Majumder, Charles Augustine, Andres F. Malavasi, S. Usirikayala, Raghavan Kumar, Jisna Kollikunnel, S. Chhabra, Satish Yada, M. L. Barajas, Carlos Ornelas, Dan Lake, Muhammad M. Khellah, Jim Tschanz, Vivek De
2012 A* conf
Navigating large data sets in virtual worlds.
VR
Huaiyu Liu, Mic Bowman, Robert Adams, Dan Lake, Jerry Talton, Sean Koehl, Robert Noradki
2010 — conf
Distributed scene graph to enable thousands of interacting users in a virtual environment.
NETGAMES
Dan Lake, Mic Bowman, Huaiyu Liu
2010 Misc conf
Scaling virtual worlds: Simulation requirements and challenges.
WSC
Huaiyu Liu, Mic Bowman, Robert Adams, John Hurliman, Dan Lake