Dale E. Hocevar

19 papers A* 1A 1B 3Journal 8Unranked 5
YearRankTypeTitle / Venue / Authors
2006 — conf
A Reduced-Complexity, Scalable Implementation of Low Density Parity Check (LDPC) Decoder.
SiPS
Yuming Zhu, Yanni Chen, Dale E. Hocevar, Manish Goel
2003 B conf
A FPGA and ASIC implementation of rate 1/2, 8088-b irregular low density parity check decoder.
GLOBECOM
Yanni Chen, Dale E. Hocevar
2003 B conf
Efficient encoding for a family of quasi-cyclic LDPC codes.
GLOBECOM
Dale E. Hocevar
2003 — conf
LDPC code construction with flexible hardware implementation.
ICC
Dale E. Hocevar
2002 — conf
600 MHz DSP for baseband processing in 3G base stations.
CICC
Tod Wolf, Dale E. Hocevar, Alan Gatherer, Patrick Geremia, Armelle Laine
2001 — conf
Improving performance of a space-time turbo code in a Rayleigh fading channel.
VTC Fall
Everest Huang, Alan Gatherer, Tarik Muharemovic, Dale E. Hocevar
2001 B conf
Space-time codes with bit interleaving.
GLOBECOM
Tarik Muharemovic, Alan Gatherer, Will Ebel, Srinath Hosur, Dale E. Hocevar, Everest Huang
1998 — conf
Top-Down Design Using Cycle Based Simulation: an MPEG A/V Decoder Example.
Great Lakes Symposium on VLSI
Dale E. Hocevar, Ching-Yu Hung, Dan Pickens, Sundararajan Sriram
1991 J jnl
Direct circuit simulation algorithms for parallel processing [VLSI].
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Paul F. Cox, Richard Burch, Dale E. Hocevar, Ping Yang, Berton D. Epler
1990 A conf
A Usable Circuit Optimizer for Designers.
ICCAD
Dale E. Hocevar, Rajeev Arora, Uttiya Dasgupta, Sattam Dasgupta, Nagaraj Subramanyam, Sham Kashyap
1989 J jnl
New implicit integration method for efficient latency exploitation in circuit simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Paul F. Cox, Richard Burch, Ping Yang, Dale E. Hocevar
1988 J jnl
Parametric yield optimization for MOS circuit blocks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dale E. Hocevar, Paul F. Cox, Ping Yang
1988 A* conf
Pattern-Independent Current Estimation for Reliability Analysis of CMOS Circuits.
DAC
Richard Burch, Farid N. Najm, Ping Yang, Dale E. Hocevar
1987 J jnl
SPIDER -- A CAD System for Modeling VLSI Metallization Patterns.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Joseph E. Hall, Dale E. Hocevar, Ping Yang, Michael J. McGraw
1986 J jnl
An Integrated and Efficient Approach for MOS VLSI Statistical Circuit Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ping Yang, Dale E. Hocevar, Paul F. Cox, Charles F. Machala III, Pallab K. Chatterjee
1985 J jnl
Transient Sensitivity Computation for MOSFET Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dale E. Hocevar, Ping Yang, Timothy N. Trick, Berton D. Epler
1984 J jnl
An Extrapolated Yield Approximation Technique for Use in Yield Maximization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dale E. Hocevar, Michael R. Lightner, Timothy N. Trick
1983 J jnl
A Study of Variance Reduction Techniques for Estimating Circuit Yields.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dale E. Hocevar, Michael R. Lightner, Timothy N. Trick
1982 — —
Automatic Tuning Algorithms and Statistical Circuit Design
Dale E. Hocevar