Daisuke Suzuki

99 papers A* 2A 11B 6C 3Journal 44Unranked 33

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	A Nonvolatile IoT Sensor Node Based on Input-Data Driven Power-Gating Scheme and its Emulation Using FPGA and Temperature Sensor. MCSoC Daisuke Suzuki, Takahiro Hanyu
2025	—	`conf`	An FPGA-based rapid-prototyping platform for spintronics-based edge-computing hardware. ISMVL Daisuke Suzuki, Akira Tamakoshi, Tomohiro Yoneda, Masanori Natsui, Yasuhiro Takako, Takahiro Hanyu
2025	—	`conf`	Implementation of an MRAM-Based Edge AI Hardware with a Fine-Grained Power-Gating Technique. ISMVL Tomohiro Yoneda, Yasuhiro Takako, Akira Tamakoshi, Masanori Natsui, Daisuke Suzuki, Takahiro Hanyu
2023	—	`conf`	Design of a Nonvolatile-Neural-Network-Accelerator-Embedded Edge-IoT Device and Its Hardware Emulation. MCSoC Ken Sato, Daisuke Suzuki
2022	—	`conf`	A Spintronics-Based Nonvolatile FPGA and Its Application to Edge-AI Accelerator. MCSoC Daisuke Suzuki, Takahiro Hanyu
2022	—	`conf`	Attitude Control System Design of 3U CubeSat with Electrodynamic Tether for Post Mission Disposal Demonstration. SII Naoya Shiraishi, Yuji Sato, Yoshihiko Shibuya, Shinya Fujita, Toshinori Kuwahara, Daisuke Suzuki
2022	J	`jnl`	Bypassing Isolated Execution on RISC-V using Side-Channel-Assisted Fault-Injection and Its Countermeasure. IACR Trans. Cryptogr. Hardw. Embed. Syst. Shoei Nashimoto, Daisuke Suzuki, Rei Ueno, Naofumi Homma
2022	B	`conf`	Construction of a Quality Estimation Dataset for Automatic Evaluation of Japanese Grammatical Error Correction. LREC Daisuke Suzuki, Yujin Takahashi, Ikumi Yamashita, Taichi Aida, Tosho Hirasawa, Michitaka Nakatsuji, Masato Mita, Mamoru Komachi
2022	J	`jnl`	Construction of a Quality Estimation Dataset for Automatic Evaluation of Japanese Grammatical Error Correction. CoRR Daisuke Suzuki, Yujin Takahashi, Ikumi Yamashita, Taichi Aida, Tosho Hirasawa, Michitaka Nakatsuji, Masato Mita, Mamoru Komachi
2022	J	`jnl`	Evaluation of PPG Feature Values Toward Biometric Authentication Against Presentation Attacks. IEEE Access Shun Hinatsu, Daisuke Suzuki, Hiroki Ishizuka, Sei Ikeda, Osamu Oshiro
2022	—	`conf`	Orbital Demonstration of Gossamer Structure Shape Estimation using Time-of-Flight Camera System. SII Toshinori Kuwahara, Alperen Pala, Adrien Potier, Yoshihiko Shibuya, Yuji Sato, Shinya Fujita, Daisuke Suzuki, Tetsuya Kaneko
2022	—	`conf`	Orbital Maneuver Evaluation of Micro-satellite ALE-1 with a Separable Drag Sail. SII Alperen Pala, Toshinori Kuwahara, Kohei Takeda, Yoshihiko Shibuya, Yuji Sato, Shinya Fujita, Daisuke Suzuki, Tetsuya Kaneko
2022	—	`conf`	Towards Isolated AI Accelerators with OP-TEE on SoC-FPGAs. ACNS Workshops Tsunato Nakai, Daisuke Suzuki, Takeshi Fujino
2021	—	`conf`	A Memory-Access-Minimized BCNN Accelerator Using Nonvolatile FPGA with Only-Once- Write Shifting. MCSoC Daisuke Suzuki, Takahiro Oka, Takahiro Hanyu
2021	J	`jnl`	Adversarial Black-Box Attacks with Timing Side-Channel Leakage. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Tsunato Nakai, Daisuke Suzuki, Fumio Omatsu, Takeshi Fujino
2021	—	`conf`	Attack on PPG Biometrics: Presentation Attack by Stealth Recording and Waveform Estimation. EMBC Shun Hinatsu, Daisuke Suzuki, Hiroki Ishizuka, Sei Ikeda, Osamu Oshiro
2021	B	`conf`	Evaluation Framework for Performance Limitation of Autonomous Systems Under Sensor Attack. SAFECOMP Koichi Shimizu, Daisuke Suzuki, Ryo Muramatsu, Hisashi Mori, Tomoyuki Nagatsuka, Tsutomu Matsumoto
2021	J	`jnl`	Evaluation Framework for Performance Limitation of Autonomous Systems under Sensor Attack. CoRR Koichi Shimizu, Daisuke Suzuki, Ryo Muramatsu, Hisashi Mori, Tomoyuki Nagatsuka, Tsutomu Matsumoto
2021	J	`jnl`	Low-cost distance-spoofing attack on FMCW radar and its feasibility study on countermeasure. J. Cryptogr. Eng. Shoei Nashimoto, Daisuke Suzuki, Noriyuki Miura, Tatsuya Machida, Kohei Matsuda, Makoto Nagata
2021	J	`jnl`	Nonvolatile Field-Programmable Gate Array Using a Standard-Cell-Based Design Flow. IEICE Trans. Inf. Syst. Daisuke Suzuki, Takahiro Hanyu
2021	J	`jnl`	Timing Black-Box Attacks: Crafting Adversarial Examples through Timing Leaks against DNNs on Embedded Devices. IACR Trans. Cryptogr. Hardw. Embed. Syst. Tsunato Nakai, Daisuke Suzuki, Takeshi Fujino
2021	—	`conf`	Towards Trained Model Confidentiality and Integrity Using Trusted Execution Environments. ACNS Workshops Tsunato Nakai, Daisuke Suzuki, Takeshi Fujino
2020	—	`conf`	An Optimized Implementation of AES-GCM for FPGA Acceleration Using High-Level Synthesis. GCCE Tsubasa Takaki, Yang Li, Kazuo Sakiyama, Shoei Nashimoto, Daisuke Suzuki, Takeshi Sugawara
2020	—	`conf`	Analysis of Driving Performance Data Considering the Characteristics of Railway Stations. AHFE (12) Daisuke Suzuki, Ayako Suzuki, Keiko Shimano, Kazuki Kiyota, Yutaka Kakizaki
2020	J	`jnl`	Bypassing Isolated Execution on RISC-V with Fault Injection. IACR Cryptol. ePrint Arch. Shoei Nashimoto, Daisuke Suzuki, Rei Ueno, Naofumi Homma
2020	—	`conf`	Design and Evaluation of a Synthesizable Standard-Cell-Based Nonvolatile FPGA. ISMVL Daisuke Suzuki, Takahiro Hanyu
2020	—	`conf`	Photoplethysmographic Subject Identification by Considering Feature Values Derived from Heartbeat and Respiration. EMBC Shun Hinatsu, Daisuke Suzuki, Hiroki Ishizuka, Sei Ikeda, Osamu Oshiro
2019	J	`jnl`	A 47.14-µW 200-MHz MOS/MTJ-Hybrid Nonvolatile Microcontroller Unit Embedding STT-MRAM and FPGA for IoT Applications. IEEE J. Solid State Circuits Masanori Natsui, Daisuke Suzuki, Akira Tamakoshi, Toshinari Watanabe, Hiroaki Honjo, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu
2019	—	`conf`	A Low-Cost Replica-Based Distance-Spoofing Attack on mmWave FMCW Radar. ASHES@CCS Noriyuki Miura, Tatsuya Machida, Kohei Matsuda, Makoto Nagata, Shoei Nashimoto, Daisuke Suzuki
2019	—	`conf`	An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz. ISSCC Masanori Natsui, Daisuke Suzuki, Akira Tamakoshi, Toshinari Watanabe, Hiroaki Honjo, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu
2019	—	`conf`	Analysis of Driving Performance Data to Evaluate Brake Manipulation by Railway Drivers. AHFE (13) Daisuke Suzuki, Naoki Mizukami, Yutaka Kakizaki, Nobuyuki Tsuyuki
2019	J	`jnl`	Circuit optimization technique of nonvolatile logic-in-memory based lookup table circuits using magnetic tunnel junction devices. Microelectron. J. Daisuke Suzuki, Takahiro Oka, Takahiro Hanyu
2019	J	`jnl`	SAEB: A Lightweight Blockcipher-Based AEAD Mode of Operation. IACR Cryptol. ePrint Arch. Yusuke Naito, Mitsuru Matsui, Takeshi Sugawara, Daisuke Suzuki
2018	—	`conf`	Aggregation of Charged Microgels by Relatively Diamagnetic Assembly. MHS Hisae Suenaga, Haruka Minato, Daisuke Suzuki, Yoshitake Akiyama
2018	A	`conf`	Design of an MTJ-Based Nonvolatile LUT Circuit with a Data-Update Minimized Shift Operation for an Ultra-Low-Power FPGA: (Abstract Only). FPGA Daisuke Suzuki, Takahiro Hanyu
2018	J	`jnl`	SAEB: A Lightweight Blockcipher-Based AEAD Mode of Operation. IACR Trans. Cryptogr. Hardw. Embed. Syst. Yusuke Naito, Mitsuru Matsui, Takeshi Sugawara, Daisuke Suzuki
2018	A	`conf`	Sensor CON-Fusion: Defeating Kalman Filter in Signal Injection Attack. AsiaCCS Shoei Nashimoto, Daisuke Suzuki, Takeshi Sugawara, Kazuo Sakiyama
2017	J	`jnl`	Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme. IEICE Trans. Inf. Syst. Daisuke Suzuki, Takahiro Hanyu
2017	A	`conf`	Three-terminal MTJ-based nonvolatile logic circuits with self-terminated writing mechanism for ultra-low-power VLSI processor. DATE Takahiro Hanyu, Daisuke Suzuki, Naoya Onizawa, Masanori Natsui
2016	B	`conf`	A low-power MTJ-based nonvolatile FPGA using self-terminated logic-in-memory structure. FPL Daisuke Suzuki, Takahiro Hanyu
2016	J	`jnl`	Asymmetric Leakage from Multiplier and Collision-Based Single-Shot Side-Channel Attack. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki
2016	—	`conf`	Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme. ISMVL Daisuke Suzuki, Takahiro Hanyu
2016	—	`conf`	Light-Weight Single Image Super-Resolution via Pattern-wise Regression Function. Digital Photography and Mobile Imaging Kohei Kurihara, Yoshitaka Toyoda, Shotaro Moriya, Daisuke Suzuki, Takeo Fujita, Narihiro Matoba, Jay E. Thorton, Fatih Porikli
2016	J	`jnl`	Standby-Power-Free Integrated Circuits Using MTJ-Based VLSI Computing. Proc. IEEE Takahiro Hanyu, Tetsuo Endoh, Daisuke Suzuki, Hiroki Koike, Yitao Ma, Naoya Onizawa, Masanori Natsui, Shoji Ikeda, Hideo Ohno
2016	C	`conf`	Zero-cross switching control of halogen lamp heater with delta-sigma modulator. IECON Daisuke Suzuki, Akihiko Yoneya
2015	—	`conf`	Design of an MTJ-based nonvolatile lookup table circuit using an energy-efficient single-ended logic-in-memory structure. MWSCAS Daisuke Suzuki, Takahiro Hanyu
2015	B	`conf`	Development of the Multi-dimensional Robot Attitude Scale: Constructs of People's Attitudes Towards Domestic Robots. ICSR Takumi Ninomiya, Akihito Fujita, Daisuke Suzuki, Hiroyuki Umemuro
2015	—	`conf`	Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure. VLSIC Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, Sadahiko Miura, Hiroaki Honjo, Hideo Sato, Shunsuke Fukami, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2015	J	`jnl`	Faster Enumeration of All Maximal Cliques in Unit Disk Graphs Using Geometric Structure. IEICE Trans. Inf. Syst. Taisuke Izumi, Daisuke Suzuki
2015	J	`jnl`	Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction. IEEE J. Solid State Circuits Masanori Natsui, Daisuke Suzuki, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2015	—	`conf`	PUF as a sensor. GCCE Koichi Shimizu, Takeshi Sugawara, Daisuke Suzuki
2015	J	`jnl`	Reversing stealthy dopant-level circuits. J. Cryptogr. Eng. Takeshi Sugawara, Daisuke Suzuki, Ryoichi Fujii, Shigeaki Tawa, Ryohei Hori, Mitsuru Shiozaki, Takeshi Fujino
2015	A	`conf`	Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable VLSI computing paradigm. DATE Takahiro Hanyu, Daisuke Suzuki, Naoya Onizawa, Shoun Matsunaga, Masanori Natsui, Akira Mochizuki
2015	—	`conf`	Two Operands of Multipliers in Side-Channel Attack. COSADE Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki
2015	J	`jnl`	Two Operands of Multipliers in Side-Channel Attack. IACR Cryptol. ePrint Arch. Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki
2014	J	`jnl`	A compact low-power nonvolatile flip-flop using domain-wall-motion-device-based single-ended structure. IEICE Electron. Express Daisuke Suzuki, Noboru Sakimura, Masanori Natsui, Akira Mochizuki, Tadahiko Sugibayashi, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2014	J	`jnl`	On measurable side-channel leaks inside ASIC design primitives. J. Cryptogr. Eng. Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki, Mitsuru Shiozaki, Takeshi Fujino
2014	A	`conf`	Reversing Stealthy Dopant-Level Circuits. CHES Takeshi Sugawara, Daisuke Suzuki, Ryoichi Fujii, Shigeaki Tawa, Ryohei Hori, Mitsuru Shiozaki, Takeshi Fujino
2014	J	`jnl`	Reversing Stealthy Dopant-Level Circuits. IACR Cryptol. ePrint Arch. Takeshi Sugawara, Daisuke Suzuki, Ryoichi Fujii, Shigeaki Tawa, Ryohei Hori, Mitsuru Shiozaki, Takeshi Fujino
2014	J	`jnl`	Unified Coprocessor Architecture for Secure Key Storage and Challenge-Response Authentication. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Koichi Shimizu, Daisuke Suzuki, Toyohiro Tsurumaru, Takeshi Sugawara, Mitsuru Shiozaki, Takeshi Fujino
2013	—	`conf`	A visibility improvement technique for fog images suitable for real-time application. Real-Time Image and Video Processing Yoshitaka Toyoda, Daisuke Suzuki, Koichi Yamashita, Takashi Ito, Narihiro Matoba, Tetsuya Kuno, Hiroaki Sugiura
2013	B	`conf`	Cross-regional comparative study of dimensions of people's attitudes toward robots. RO-MAN Akihito Fujita, Daisuke Suzuki, Hiroyuki Umemuro
2013	J	`jnl`	Fabrication of a magnetic tunnel junction-based 240-tile nonvolatile field-programmable gate array chip skipping wasted write operations for greedy power-reduced logic applications. IEICE Electron. Express Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Hideo Sato, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2013	J	`jnl`	Metastable Ordered Phase Formation in CoPt and Co IEICE Trans. Electron. Mitsuru Ohtake, Daisuke Suzuki, Fumiyoshi Kirino, Masaaki Futamoto
2013	—	`conf`	Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating. ISSCC Masanori Natsui, Daisuke Suzuki, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2013	A	`conf`	On Measurable Side-Channel Leaks Inside ASIC Design Primitives. CHES Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki, Mitsuru Shiozaki, Takeshi Fujino
2013	J	`jnl`	On Measurable Side-Channel Leaks inside ASIC Design Primitives. IACR Cryptol. ePrint Arch. Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki, Mitsuru Shiozaki, Takeshi Fujino
2013	J	`jnl`	Using Pulse Laser Processing to Shape Cutting Edge of PcBN Tool for High-Precision Turning of Hardened Steel. Int. J. Autom. Technol. Daisuke Suzuki, Fumihiro Itoigawa, Keiichi Kawata, Takashi Nakamura
2012	—	`conf`	Area-efficient LUT circuit design based on asymmetry of MTJ's current switching for a nonvolatile FPGA. MWSCAS Daisuke Suzuki, Masanori Natsui, Takahiro Hanyu
2012	—	`conf`	Building Blocks to Use in Innovative Non-volatile FPGA Architecture Based on MTJs. ISVLSI Luca Montesi, Zeljko Zilic, Takahiro Hanyu, Daisuke Suzuki
2012	C	`conf`	Circuit Simulation for Fault Sensitivity Analysis and Its Application to Cryptographic LSI. FDTC Takeshi Sugawara, Daisuke Suzuki, Toshihiro Katashita
2012	A*	`conf`	Dimensions of people's attitudes toward robots. HRI Daisuke Suzuki, Hiroyuki Umemuro
2012	J	`jnl`	Glitch PUF: Extracting Information from Usually Unwanted Glitches. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Koichi Shimizu, Daisuke Suzuki, Tomomi Kasuya
2011	J	`jnl`	How to Decide Selection Functions for Power Analysis: From the Viewpoint of Hardware Architecture of Block Ciphers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Daisuke Suzuki, Minoru Saeki, Koichi Shimizu, Tsutomu Matsumoto
2011	J	`jnl`	How to Maximize the Potential of FPGA-Based DSPs for Modular Exponentiation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Daisuke Suzuki, Tsutomu Matsumoto
2010	J	`jnl`	A Design Methodology for a DPA-Resistant Circuit with RSL Techniques. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Daisuke Suzuki, Minoru Saeki, Koichi Shimizu, Akashi Satoh, Tsutomu Matsumoto
2010	J	`jnl`	High-Speed Passphrase Search System for PGP. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Koichi Shimizu, Daisuke Suzuki, Toyohiro Tsurumaru
2010	J	`jnl`	Increasing the Strength of Odors Produced by an Odor-Emitting Technology Using Odor Capsules. IEICE Trans. Inf. Syst. Ayako Nishimura, Minoru Sakairi, Daisuke Suzuki
2010	J	`jnl`	Phototactic and Chemotactic Signal Transduction by Transmembrane Receptors and Transducers in Microorganisms. Sensors Daisuke Suzuki, Hiroki Irieda, Michio Homma, Ikuro Kawagishi, Yuki Sudo
2010	J	`jnl`	Simultaneous detection of breath and alcohol using breath-alcohol sensor for prevention of drunk driving. IEICE Electron. Express Minoru Sakairi, Daisuke Suzuki, Ayako Nishimura, Yukiko Ichige, Masashi Kiguchi
2010	A	`conf`	The Glitch PUF: A New Delay-PUF Architecture Exploiting Glitch Shapes. CHES Daisuke Suzuki, Koichi Shimizu
2009	A	`conf`	A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques. CHES Minoru Saeki, Daisuke Suzuki, Koichi Shimizu, Akashi Satoh
2009	—	`conf`	A Study of Auditory Warning Signals for the Design Guidelines of Man-Machine Interfaces. HCI (9) Mie Nakatani, Daisuke Suzuki, Nobuchika Sakata, Shogo Nishida
2009	—	`conf`	Complementary logics vs masked logics: Which countermeasure is a better selection? ECCTD Tsutomu Matsumoto, Hidenobu Mimura, Daisuke Suzuki
2009	J	`jnl`	Olfaction Presentation System Using Odor Scanner and Odor-Emitting Apparatus Coupled with Chemical Capsules of Alginic Acid Polymer. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Minoru Sakairi, Ayako Nishimura, Daisuke Suzuki
2008	J	`jnl`	An Analysis of Leakage Factors for Dual-Rail Pre-Charge Logic Style. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Daisuke Suzuki, Minoru Saeki
2008	B	`conf`	High-Speed Search System for PGP Passphrases. CANS Koichi Shimizu, Daisuke Suzuki, Toyohiro Tsurumaru
2008	J	`jnl`	Security Evaluations of MRSL and DRSL Considering Signal Delays. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Minoru Saeki, Daisuke Suzuki
2007	A	`conf`	How to Maximize the Potential of FPGA Resources for Modular Exponentiation. CHES Daisuke Suzuki
2007	J	`jnl`	Leakage Analysis of DPA Countermeasures at the Logic Level. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Minoru Saeki, Daisuke Suzuki, Tetsuya Ichikawa
2007	J	`jnl`	Pulse-Width Modulation with Current Uniformization for TFT-OLEDs. IEICE Trans. Electron. Mutsumi Kimura, Shigeki Sawamura, Masakazu Kato, Yuji Hara, Daisuke Suzuki, Hiroyuki Hara, Satoshi Inoue
2007	J	`jnl`	Random Switching Logic: A New Countermeasure against DPA and Second-Order DPA at the Logic Level. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa
2006	A	`conf`	Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style. CHES Daisuke Suzuki, Minoru Saeki
2006	A*	`conf`	Word Vectors and Two Kinds of Similarity. ACL Akira Utsumi, Daisuke Suzuki
2005	A	`conf`	DPA Leakage Models for CMOS Logic Circuits. CHES Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa
2004	J	`jnl`	Random Switching Logic: A Countermeasure against DPA based on Transition Probability. IACR Cryptol. ePrint Arch. Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa
2002	—	`conf`	A high-level synthesis method for simultaneous placement and scheduling considering data communication delay. APCCAS (1) Kazuhito Ito, Daisuke Suzuki
2002	J	`jnl`	Two-dimensional mapping of impedance magnetocardiograms. IEEE Trans. Biomed. Eng. Akihiko Kandori, Tsuyoshi Miyashita, Daisuke Suzuki, Koichi Yokosawa, Keiji Tsukada
2000	C	`conf`	A Supporting System for Colored Knitting Design. IEA/AIE Daisuke Suzuki, Tsuyoshi Miyazaki, Koji Yamada, Tsuyoshi Nakamura, Hidenori Itoh