Daisuke Kanemoto

41 papers C 13Journal 16Unranked 12

Year	Rank	Type	Title / Venue / Authors
2026	C	`conf`	A Battery-Free Wireless EEG Transmission System Using Compressed Sensing and Powered by Body-Ambient Temperature Difference: Outdoor Demonstration at Expo 2025. ICCE Daisuke Kanemoto, Kazane Yoshimoto, Shodai Motomochi, Tetsuya Hirose
2025	C	`conf`	Design Guidelines for Noise in a Low-Noise Amplifier Using EEG Signals as a Basis Matrix in Compressed Sensing System. ICCE Riku Matsubara, Daisuke Kanemoto, Tetsuya Hirose
2025	C	`conf`	Development of Low-power and High-accuracy Wireless EEG Transmission System Using Compressed Sensing with an EEG Basis. ISCAS Daisuke Kanemoto, Eichi Takimoto, Tetsuya Hirose
2025	—	`conf`	Low quiescent current LDO with FBPEC to improve PSRR specific frequency band for wearable EEG recording devices. ASP-DAC Kenji Mii, Daisuke Kanemoto, Tetsuya Hirose
2025	C	`conf`	Low-power and Low-noise Amplifier with Intermittent Operation for Compressed Sensing in EEG Measurement Systems. ISCAS Kenji Mii, Daisuke Kanemoto, Tetsuya Hirose
2025	C	`conf`	Noise-Masking Cryptosystem Using Watermark and Chain Generation for EEG Measurement with Compressed Sensing. ICCE Tomoya Yamamoto, Daisuke Kanemoto, Tetsuya Hirose
2025	C	`conf`	Sub-50-mV Static Flip-Flop Consisting of Recursive Stacking Body-Bias Logic Gates for Extremely Low-Voltage VLSIs. ISCAS Shintaro Sumi, Hikaru Sebe, Daisuke Kanemoto, Tetsuya Hirose
2025	—	`conf`	Ultra Low-power Capacitively-coupled Chopper Amplifier Focusing on the Sparsity of Compressed Sensing for EEG Recording. ASP-DAC Kenji Mii, Daisuke Kanemoto, Tetsuya Hirose
2024	C	`conf`	Noise-Masking Cryptosystem Using Watermark and Chain Generation for EEG Measurement with Compressed Sensing. ICCE Ryota Tsunaga, Daisuke Kanemoto, Tetsuya Hirose
2024	J	`jnl`	Programmable Differential Bandgap Reference Circuit for Ultra-Low-Power CMOS LSIs. IEICE Trans. Electron. Yoshinori Itotagawa, Koma Atsumi, Hikaru Sebe, Daisuke Kanemoto, Tetsuya Hirose
2024	C	`conf`	Reducing Power Consumption in LNA by Utilizing EEG Signals as Basis Matrix in Compressed Sensing. ISCAS Riku Matsubara, Daisuke Kanemoto, Tetsuya Hirose
2024	J	`jnl`	Sub-60-mV Charge Pump and its Driver Circuit for Extremely Low-Voltage Thermoelectric Energy Harvesting. IEICE Trans. Electron. Hikaru Sebe, Daisuke Kanemoto, Tetsuya Hirose
2024	C	`conf`	Utilizing Previously Acquired BSBL Algorithm Parameters in the Compressed Sensing Framework for EEG Measurements. ICCE Takuya Miyata, Daisuke Kanemoto, Tetsuya Hirose
2023	C	`conf`	A Programmable Differential Bandgap Reference for Ultra-Low-Power IoT Edge Node Devices. ISCAS Yoshinori Itotagawa, Koma Atsumi, Hikaru Sebe, Daisuke Kanemoto, Tetsuya Hirose
2023	C	`conf`	EEG Measurements with Compressed Sensing Utilizing EEG Signals as the Basis Matrix. ISCAS Daisuke Kanemoto, Tetsuya Hirose
2023	C	`conf`	Random Undersampling Wireless EEG Measurement Device using a Small TEG. ISCAS Takuya Miyata, Daisuke Kanemoto, Tetsuya Hirose
2023	—	`conf`	Sub-30-mV-Supply, Fully Integrated Ring Oscillator Consisting of Recursive Stacking Body-Bias Inverters for Extremely Low-Voltage Energy Harvesting. ESSCIRC Hikaru Sebe, Tomohisa Okumura, Shintaro Sumi, Daisuke Kanemoto, Po-Hung Chen, Tetsuya Hirose
2022	J	`jnl`	Compressed Sensing EEG Measurement Technique with Normally Distributed Sampling Series. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yuki Okabe, Daisuke Kanemoto, Osamu Maida, Tetsuya Hirose
2022	J	`jnl`	Image Quality Improvement for Capsule Endoscopy Based on Compressed Sensing with K-SVD Dictionary Learning. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yuuki Harada, Daisuke Kanemoto, Takahiro Inoue, Osamu Maida, Tetsuya Hirose
2022	C	`conf`	Sub-50-mV Charge Pump and its Driver for Extremely Low-Voltage Thermal Energy Harvesting. ISCAS Hikaru Sebe, Daisuke Kanemoto, Tetsuya Hirose
2021	J	`jnl`	A 35-mV supply ring oscillator consisting of stacked body bias inverters for extremely low-voltage LSIs. IEICE Electron. Express Masaya Nishi, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Hikaru Sebe, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
2021	J	`jnl`	Applying K-SVD Dictionary Learning for EEG Compressed Sensing Framework with Outlier Detection and Independent Component Analysis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Kotaro Nagai, Daisuke Kanemoto, Makoto Ohki
2020	—	`conf`	A 34-mV Startup Ring Oscillator Using Stacked Body Bias Inverters for Extremely Low-Voltage Thermoelectric Energy Harvesting. NEWCAS Masaya Nishi, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Hikaru Sebe, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
2020	J	`jnl`	An 11.8 nA ultra-low power active diode using a hysteresis common gate comparator for low-power energy harvesting systems. IEICE Electron. Express Kaori Matsumoto, Hiroki Asano, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
2020	J	`jnl`	Compressed Sensing Framework Applying Independent Component Analysis after Undersampling for Reconstructing Electroencephalogram Signals. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Daisuke Kanemoto, Shun Katsumata, Masao Aihara, Makoto Ohki
2019	—	`conf`	Applying Outlier Detection and Independent Component Analysis for Compressed Sensing EEG Measurement Framework. BioCAS Shun Katsumata, Daisuke Kanemoto, Makoto Ohki
2019	—	`conf`	Sub-0.1V Input, Low-Voltage CMOS Driver Circuit for Multi-Stage Switched Capacitor Voltage Boost Converter. ICECS Masaya Nishi, Yuichiro Nakazawa, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
2018	—	`conf`	Framework of Applying Independent Component Analysis After Compressed Sensing for Electroencephalogram Signals. BioCAS Daisuke Kanemoto, Shun Katsumata, Masao Aihara, Makoto Ohki
2015	—	`conf`	A tri-level 50MS/s 10-bit capacitive-DAC for Bluetooth applications. ASP-DAC Daisuke Kanemoto, Keigo Oshiro, Keiji Yoshida, Haruichi Kanaya
2015	—	`conf`	Effect of Linearity Enhancement in A/D Conversion for Single Carrier Transmission Systems. VTC Spring Osamu Muta, Daisuke Kanemoto, Syota Fukushige, Hiroshi Furukawa
2014	J	`jnl`	A design methodology for SAR ADC optimal redundancy bit. IEICE Electron. Express Toru Okazaki, Daisuke Kanemoto, Ramesh K. Pokharel, Keiji Yoshida, Haruichi Kanaya
2014	—	`conf`	High frequency ring oscillator using capacitor based level shift circuits. APCCAS Takahide Sato, Takeshi Nagata, Daisuke Kanemoto
2013	J	`jnl`	A self-biasing class-E power amplifier for 5-GHz constant envelope modulation system. IEICE Electron. Express Yuki Yamashita, Daisuke Kanemoto, Haruichi Kanaya, Ramesh K. Pokharel, Keiji Yoshida
2012	J	`jnl`	A High Dynamic Range and Low Power Consumption Audio Delta-Sigma Modulator with Opamp Sharing Technique among Three Integrators. IEICE Trans. Electron. Daisuke Kanemoto, Toru Ido, Kenji Taniguchi
2012	J	`jnl`	A novel RC time constant tuning technique utilizing programmable current sources for continuous-time delta-sigma modulators. IEICE Electron. Express Daisuke Kanemoto, Yu Tamura, Indika U. K. Bogoda Appuhamylage, Toshimasa Matsuoka, Kenji Taniguchi
2012	J	`jnl`	A novel high-precision DAC utilizing tribonacci series. IEICE Electron. Express Kazuya Hokazono, Daisuke Kanemoto, Haruichi Kanaya, Ramesh K. Pokharel, Keiji Yoshida
2012	—	`conf`	A small die area and high linearity 10-bit capacitive three-level DAC. APCCAS Keigo Oshiro, Daisuke Kanemoto, Haruichi Kanaya, Ramesh K. Pokharel, Keiji Yoshida
2011	—	`conf`	A 7.5mW 101dB SNR low-power high-performance audio delta-sigma modulator utilizing opamp sharing technique. ISOCC Daisuke Kanemoto, Toru Ido, Kenji Taniguchi
2011	J	`jnl`	A Novel 100ppm/°C current reference for ultra-low-power subthreshold applications. IEICE Electron. Express Indika U. K. Bogoda Appuhamylage, Daisuke Kanemoto, Kenji Taniguchi
2011	J	`jnl`	A third order delta-sigma modulator employing shared opamp technique for WCDMA on 0.18um CMOS. IEICE Electron. Express Ghazal A. Fahmy, Daisuke Kanemoto, Haruichi Kanaya, Keiji Yoshida, Ramesh K. Pokharel, Awinash Anand
2008	J	`jnl`	A novel third order Delta Sigma Modulator with one opamp shared among three integrator stages. IEICE Electron. Express Daisuke Kanemoto, Toru Ido, Kenji Taniguchi