Daihyun Lim

17 papers Journal 4Unranked 12
YearRankTypeTitle / Venue / Authors
2026 — conf
15.6 A 36GB 3.3TB/S HBM4 DRAM with Per-Channel TSV RDQS Auto Calibration and Fully-Programmable MBIST.
ISSCC
Sunghwan Joo, Jinyeon Kim, Yongsun Lee, Ji-Young Kim, Youngsik Lee, Yong-Min Kim, Chi Sung Oh, Kyu-Ha Shim, Haesuk Lee, Young-Yong Byun, Changhyun Bae, Joohwan Kim, Je-Min Ryu, Shin-Haeng Kang, Jaehoon Lee, Young-Uk Chang, Jaekyung Lee, Jong Tae Hwang, Daehwan Seo, Ki-Heon Na, Young Guen Song, Daihyun Lim, Kyung-Soo Ha, Young-Soo Sohn, Sangjoon Hwang
2025 — conf
A 16Gb 12.7Gb/s/pin LPDDR5-Ultra-Pro DRAM with 4-Phase Self-Calibration and AC-Coupled Transceiver Equalization in a 5
ISSCC
Jin-Hyeok Baek, Jang-Hoo Kim, Yoo-Chang Sung, Jae-Woo Jeong, Jin-Kwan Park, Hyun-Kyu Oh, Bo-Hyeon Lee, Dong-Wan Ko, Tae-Seob Oh, Seung-Gi Hong, Chang-Ki Kwon, Daihyun Lim, Myeong-O. Kim, Seung-Jun Bae, Tae-Young Oh, Sang-Jun Hwang
2024 — conf
13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5
ISSCC
IkJoon Choi, Seunghwan Hong, Kihyun Kim, Jeongsik Hwang, Seunghan Woo, Young-Sang Kim, Cheongryong Cho, Eun-Young Lee, Hun-Jae Lee, Min-su Jung, Hee-Yun Jung, Ju-Seong Hwang, Junsub Yoon, Wonmook Lim, Hyeong-Jin Yoo, Won-Ki Lee, Jung-Kyun Oh, Dong-Su Lee, Jong-eun Lee, Jun-Hyung Kim, Young-Kwan Kim, Su-Jin Park, Byung-Kyu Ho, Byongwook Na, Hye-In Choi, Chung-Ki Lee, Soo-Jung Lee, Hyunsung Shin, Young-Kyu Lee, Jang-Woo Ryu, Sangwoong Shin, Sungchul Park, Daihyun Lim, Seung-Jun Bae, Young-Soo Sohn, Tae-Young Oh, Sangjoon Hwang
2024 J jnl
A 1.01-V 8.5-Gb/s/pin 16-Gb LPDDR5x SDRAM With Advanced I/O Circuitry for High-Speed and Low-Power Applications.
IEEE J. Solid State Circuits
Hyun-A. Ahn, Yoo-Chang Sung, Yong-Hun Kim, Janghoo Kim, Kihan Kim, Dong-Hun Lee, Young-Gil Go, Jae-Woo Lee, Jae-Woo Jung, Yong-Hyun Kim, Garam Choi, Jun-Seo Park, Bo-Hyeon Lee, Jin-Hyeok Baek, Daesik Moon, Joo-Youn Lim, Daihyun Lim, Seung-Jun Bae, Tae-Young Oh
2023 — conf
A 1.01V 8.5Gb/s/pin 16Gb LPDDR5x SDRAM with Self-Pre-Emphasized Stacked-Tx, Supply Voltage Insensitive Rx, and Optimized Clock Using 4th-Generation 10nm DRAM Process for High-Speed and Low-Power Applications.
A-SSCC
Hyun-A. Ahn, Yoo-Chang Sung, Yong-Hun Kim, Janghoo Kim, Kihan Kim, Donghun Lee, Young-Gil Go, Jae-Woo Lee, Jae-Woo Jung, Yong-Hyun Kim, Garam Choi, Jun-Seo Park, Bo-Hyeon Lee, Jin-Hyeok Baek, Daesik Moon, Daihyun Lim, Seung-Jun Bae, Young-Soo Sohn, Changsik Yoo, Tae-Young Oh
2020 J jnl
A Dual-Polarization Silicon-Photonic Coherent Transmitter Supporting 552 Gb/s/wavelength.
IEEE J. Solid State Circuits
Abdelrahman H. Ahmed, Abdellatif Elmoznine, Daihyun Lim, Yangjin Ma, Alexander V. Rylyakov, Sudip Shekhar
2019 — conf
A 6V Swing 3.6% THD >40GHz Driver with 4.5× Bandwidth Extension for a 272Gb/s Dual-Polarization 16-QAM Silicon Photonic Transmitter.
ISSCC
Abdelrahman H. Ahmed, Daihyun Lim, Abdellatif Elmoznine, Yangjin Ma, Tam N. Huynh, Christopher Williams, Leonardo Vera, Yang Liu, Ruizhi Shi, Matthew Streshinsky, Ari Novack, Ran Ding, Rick Younce, Rafid A. Sukkar, Jose Roman, Michael Hochberg, Sudip Shekhar, Alexander V. Rylyakov
2019 — conf
An All-Silicon Transmitter with Co-Designed Modulator and DC-Coupled Driver.
OFC
Yangjin Ma, Christopher Williams, Mostafa Gamal Ahmed, Abdellatif Elmoznine, Daihyun Lim, Yang Liu, Ruizhi Shi, Tam N. Huynh, Jose Roman, Abdelrahman H. Ahmed, Leonardo Vera, Yaojia Chen, Alexandre Horth, Hang Guan, Kishore Padmaraju, Matthew Streshinsky, Ari Novack, Rafid A. Sukkar, Rick Younce, Alexander V. Rylyakov, Dominick Scordo, Michael Hochberg
2018 — conf
A Silicon Photonic Transceiver and Hybrid Tunable Laser for 64 Gbaud Coherent Communication.
OFC
Ari Novack, Matthew Streshinsky, Tam N. Huynh, Tal Galfsky, Hang Guan, Yang Liu, Yangjin Ma, Ruizhi Shi, Alexandre Horth, Yaojia Chen, Amir Hanjani, Jose Roman, Yury Dziashko, Ran Ding, Saeed Fathololoumi, Andy Eu-Jin Lim, Kishore Padmaraju, Rafid A. Sukkar, Rick Younce, Harald Rohde, Robert Palmer, Guido Saathoff, Torsten Wuth, Marc Bohn, Abdelrahman H. Ahmed, Mostafa Gamal Ahmed, Christopher Williams, Daihyun Lim, Abdellatif Elmoznine, Alexander V. Rylyakov, Tom Baehr Jones, Peter Magill, Dominick Scordo, Michael Hochberg
2008 — —
Characterization of process variability and robust optimization of analog circuits.
Daihyun Lim
2008 — conf
Early prediction of product performance and yield via technology benchmark.
CICC
Choongyeun Cho, Daeik D. Kim, Jonghae Kim, Daihyun Lim, Sangyeun Cho
2007 — conf
A 70GHz Manufacturable Complementary LC-VCO with 6.14GHz Tuning Range in 65nm SOI CMOS.
ISSCC
Daeik D. Kim, Jonghae Kim, Jean-Olivier Plouchart, Choongyeun Cho, Weipeng Li, Daihyun Lim, Robert Trzcinski, Mahender Kumar, Christine Norris, David Ahlgren
2007 — conf
A Data-Driven Statistical Approach to Analyzing Process Variation in 65nm SOI Technology.
ISQED
Choongyeun Cho, Daeik D. Kim, Jonghae Kim, Jean-Olivier Plouchart, Daihyun Lim, Sangyeun Cho, Robert Trzcinski
2007 — conf
Performance Variability of a 90GHz Static CML Frequency Divider in 65nm SOI CMOS.
ISSCC
Daihyun Lim, Jonghae Kim, Jean-Olivier Plouchart, Choongyeun Cho, Daeik D. Kim, Robert Trzcinski, Duane S. Boning
2007 — conf
Variation.
ISQED
Duane S. Boning, Karthik Balakrishnan, Hong Cai, Nigel Drego, Ali Farahanchi, Karen Gettings, Daihyun Lim, Ajay Somani, Hayden Taylor, Daniel Truque, Xiaolin Xie
2005 J jnl
Extracting secret keys from integrated circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Daihyun Lim, Jae W. Lee, Blaise Gassend, G. Edward Suh, Marten van Dijk, Srinivas Devadas
2004 J jnl
Identification and authentication of integrated circuits.
Concurr. Pract. Exp.
Blaise Gassend, Daihyun Lim, Dwaine E. Clarke, Marten van Dijk, Srinivas Devadas