Daichi Mukunoki

40 papers A 1B 1C 4Journal 12Unranked 22

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	DGEMM using FP64 Arithmetic Emulation and FP8 Tensor Cores with Ozaki Scheme. SCA/HPC Asia Workshops Daichi Mukunoki
2026	—	`conf`	Evaluating Claude Code's Coding and Test Automation for GPU Acceleration ofa Legacy Fortran Application: A GeoFEM Case Study. SCA/HPC Asia Workshops Tetsuya Hoshino, Shun-ichiro Hayashi, Daichi Mukunoki, Takahiro Katagiri, Toshihiro Hanawa
2026	J	`jnl`	Improving HPC Code Generation Capability of LLMs via Online Reinforcement Learning with Real-Machine Benchmark Rewards. CoRR Ryo Mikasa, Shun-ichiro Hayashi, Daichi Mukunoki, Tetsuya Hoshino, Takahiro Katagiri
2026	J	`jnl`	Learning-Augmented Performance Model for Tensor Product Factorization in High-Order FEM. IEEE Access Xuanzhengbo Ren, Yuta Kawai, Tetsuya Hoshino, Hirofumi Tomita, Takahiro Katagiri, Daichi Mukunoki, Seiya Nishizawa
2026	J	`jnl`	Learning-Augmented Performance Model for Tensor Product Factorization in High-Order FEM. CoRR Xuanzhengbo Ren, Yuta Kawai, Tetsuya Hoshino, Hirofumi Tomita, Takahiro Katagiri, Daichi Mukunoki, Seiya Nishizawa
2025	J	`jnl`	3Dify: a Framework for Procedural 3D-CG Generation Assisted by LLMs Using MCP and RAG. CoRR Shun-ichiro Hayashi, Daichi Mukunoki, Tetsuya Hoshino, Satoshi Ohshima, Takahiro Katagiri
2025	—	`conf`	An Algorithm Portfolio Approach for Parameter Tuning in Coherent Ising Machines. CANDARW Tatsuro Hanyu, Takahiro Katagiri, Daichi Mukunoki, Tetsuya Hoshino
2025	J	`jnl`	DGEMM without FP64 Arithmetic - Using FP64 Emulation and FP8 Tensor Cores with Ozaki Scheme. CoRR Daichi Mukunoki
2025	J	`jnl`	Performance Evaluation of General Purpose Large Language Models for Basic Linear Algebra Subprograms Code Generation. CoRR Daichi Mukunoki, Shun-ichiro Hayashi, Tetsuya Hoshino, Takahiro Katagiri
2025	—	`conf`	Performance Evaluation of Loop Body Splitting for Fast Modal Filtering in SCALE-DG on A64FX. HPC Asia Workshops Xuanzhengbo Ren, Yuta Kawai, Hirofumi Tomita, Seiya Nishizawa, Takahiro Katagiri, Tetsuya Hoshino, Daichi Mukunoki, Masatoshi Kawai, Toru Nagai
2025	—	`conf`	Sparse Iterative Solvers Using High-Precision Arithmetic with Quasi Multi-Word Algorithms. MCSoC Daichi Mukunoki, Katsuhisa Ozaki
2025	J	`jnl`	Sparse Iterative Solvers Using High-Precision Arithmetic with Quasi Multi-Word Algorithms. CoRR Daichi Mukunoki, Katsuhisa Ozaki
2025	J	`jnl`	Towards Generalized Parameter Tuning in Coherent Ising Machines: A Portfolio-Based Approach. CoRR Tatsuro Hanyu, Takahiro Katagiri, Daichi Mukunoki, Tetsuya Hoshino
2025	J	`jnl`	VibeCodeHPC: An Agent-Based Iterative Prompting Auto-Tuner for HPC Code Generation Using LLMs. CoRR Shun-ichiro Hayashi, Koki Morita, Daichi Mukunoki, Tetsuya Hoshino, Takahiro Katagiri
2024	—	`conf`	Performance evaluation and modelling of single-precision matrix multiplication on Cerebras CS-2. SC Workshops Ryunosuke Matsuzaki, Daichi Mukunoki, Takaaki Miyajima
2024	—	`conf`	Reduced-Precision and Reduced-Exponent Formats for Accelerating Adaptive Precision Sparse Matrix-Vector Product. Euro-Par (3) Stef Graillat, Fabienne Jézéquel, Théo Mary, Roméo Molina, Daichi Mukunoki
2023	—	`conf`	Sparse Matrix-Vector Multiplication with Reduced-Precision Memory Accessor. MCSoC Daichi Mukunoki, Masatoshi Kawai, Toshiyuki Imamura
2022	—	`conf`	Infinite-Precision Inner Product and Sparse Matrix-Vector Multiplication Using Ozaki Scheme with Dot2 on Manycore Processors. PPAM (1) Daichi Mukunoki, Katsuhisa Ozaki, Takeshi Ogita, Toshiyuki Imamura
2021	—	`conf`	A Rapid Euclidean Norm Calculation Algorithm that Reduces Overflow and Underflow. ICCSA (1) Takeyuki Harayama, Shuhei Kudo, Daichi Mukunoki, Toshiyuki Imamura, Daisuke Takahashi
2021	B	`conf`	Accurate Matrix Multiplication on Binary128 Format Accelerated by Ozaki Scheme. ICPP Daichi Mukunoki, Katsuhisa Ozaki, Takeshi Ogita, Toshiyuki Imamura
2021	C	`conf`	Conjugate Gradient Solvers with High Accuracy and Bit-wise Reproducibility between CPU and GPU using Ozaki scheme. HPC Asia Daichi Mukunoki, Katsuhisa Ozaki, Takeshi Ogita, Roman Iakymchuk
2021	A	`conf`	Matrix Engines for High Performance Computing: A Paragon of Performance or Grasping at Straws? IPDPS Jens Domke, Emil Vatai, Aleksandr Drozd, Peng Chen, Yosuke Oyama, Lingqi Zhang, Shweta Salaria, Daichi Mukunoki, Artur Podobas, Mohamed Wahib, Satoshi Matsuoka
2021	—	`conf`	Task Scheduling Strategies for Batched Basic Linear Algebra Subprograms on Many-core CPUs. MCSoC Daichi Mukunoki, Yusuke Hirota, Toshiyuki Imamura
2020	—	`conf`	Can We Avoid Rounding-Error Estimation in HPC Codes and Still Get Trustworthy Results? VSTTE Fabienne Jézéquel, Stef Graillat, Daichi Mukunoki, Toshiyuki Imamura, Roman Iakymchuk
2020	C	`conf`	DGEMM Using Tensor Cores, and Its Accurate and Reproducible Versions. ISC Daichi Mukunoki, Katsuhisa Ozaki, Takeshi Ogita, Toshiyuki Imamura
2020	J	`jnl`	Matrix Engines for High Performance Computing: A Paragon of Performance or Grasping at Straws? CoRR Jens Domke, Emil Vatai, Aleksandr Drozd, Peng Chen, Yosuke Oyama, Lingqi Zhang, Shweta Salaria, Daichi Mukunoki, Artur Podobas, Mohamed Wahib, Satoshi Matsuoka
2020	J	`jnl`	Performance and energy consumption of accurate and mixed-precision linear algebra kernels on GPUs. J. Comput. Appl. Math. Daichi Mukunoki, Takeshi Ogita
2020	J	`jnl`	White Paper from Workshop on Large-scale Parallel Numerical Computing Technology (LSPANC 2020): HPC and Computer Arithmetic toward Minimal-Precision Computing. CoRR Roman Iakymchuk, Daichi Mukunoki, Artur Podobas, Fabienne Jézéquel, Toshiyuki Imamura, Norihisa Fujita, Jens Huthmann, Shuhei Kudo, Yiyu Tan, Jens Domke, Kai Torben Ohlhus, Takeshi Fukaya, Takeo Hoshi, Yuki Murakami, Maho Nakata, Takeshi Ogita, Kentaro Sano, Taisuke Boku
2019	—	`conf`	Design of an FPGA-Based Matrix Multiplier with Task Parallelism. PARCO Yiyu Tan, Toshiyuki Imamura, Daichi Mukunoki
2019	—	`conf`	Reproducible BLAS Routines with Tunable Accuracy Using Ozaki Scheme for Many-Core Architectures. PPAM (1) Daichi Mukunoki, Takeshi Ogita, Katsuhisa Ozaki
2018	—	`conf`	Performance Analysis of 2D-compatible 2.5D-PDGEMM on Knights Landing Cluster. ICCS (3) Daichi Mukunoki, Toshiyuki Imamura
2017	—	`conf`	Design Towards Modern High Performance Numerical LA Library Enabling Heterogeneity and Flexible Data Formats. PARCO Toshiyuki Imamura, Daichi Mukunoki, Yusuke Hirota, Susumu Yamada, Masahiko Machida
2017	—	`conf`	Implementation and Performance Analysis of 2.5D-PDGEMM on the K Computer. PPAM (1) Daichi Mukunoki, Toshiyuki Imamura
2016	—	`conf`	Automatic Thread-Block Size Adjustment for Memory-Bound BLAS Kernels on GPUs. MCSoC Daichi Mukunoki, Toshiyuki Imamura, Daisuke Takahashi
2016	C	`conf`	Reduced-Precision Floating-Point Formats on GPUs for High Performance and Energy Efficient Computation. CLUSTER Daichi Mukunoki, Toshiyuki Imamura
2015	C	`conf`	Fast Implementation of General Matrix-Vector Multiplication (GEMV) on Kepler GPUs. PDP Daichi Mukunoki, Toshiyuki Imamura, Daisuke Takahashi
2013	—	`conf`	Optimization of Sparse Matrix-Vector Multiplication for CRS Format on NVIDIA Kepler Architecture GPUs. ICCSA (5) Daichi Mukunoki, Daisuke Takahashi
2013	—	`conf`	Using Quadruple Precision Arithmetic to Accelerate Krylov Subspace Methods on GPUs. PPAM (1) Daichi Mukunoki, Daisuke Takahashi
2012	—	`conf`	Implementation and Evaluation of Triple Precision BLAS Subroutines on GPUs. IPDPS Workshops Daichi Mukunoki, Daisuke Takahashi
2010	—	`conf`	Implementation and Evaluation of Quadruple Precision BLAS Functions on GPUs. PARA (1) Daichi Mukunoki, Daisuke Takahashi