Cédric Marchand

33 papers A 3B 1C 9Misc 1Journal 8Unranked 11
YearRankTypeTitle / Venue / Authors
2025 C conf
Exploring Enhancements to 1T1C FeMFET Bitcells with a Versatile DTCO Methodology.
VLSI-SoC
Rosario Pronsat, Antoine Cauquil, Pascal Vivet, Jean Coignus, Damien Deleruyelle, Cédric Marchand, Lioua Labrak, Ian O'Connor
2025 C conf
Non-Volatile Ferroelectric-AND (FeAND) Memory Cell Design.
VLSI-SoC
Basile Darne, Miqueas Filsinger, Alberto Bosio, Damien Deleruyelle, Ian O'Connor, Bertrand Vilquin, Cédric Marchand
2025 C conf
On the Possibility of Relying Solely on FeMFET Variability for PUF Implementations.
VLSI-SoC
Miqueas Filsinger, Antoine Cauquil, Damien Deleruyelle, David Navarro, Ian O'Connor, Cédric Marchand
2025 — conf
Special Session Paper: FeMFET-Based High Performance, Ultra-Low Power Memory Cells for Reliable State Retention of Dataflow Networks.
DFT
Basile Darne, Abrarul Karim, Paul-Antoine Matrangolo, Joachim Falk, Ian O'Connor, Cédric Marchand, Alberto Bosio, Jürgen Teich
2024 C conf
3D VNWFET-Based Standard Cell Library Design Flow: from Circuit and Physical Design to Logic Synthesis.
VLSI-SoC
Sara Mannaa, Cédric Marchand, Damien Deleruyelle, Bastien Deveautour, Alberto Bosio, Christoph Lenz, Oskar Baumgartner, Ian O'Connor
2024 C conf
A Novel Design Technique for Enhanced Security and New Applications of Ferroelectric-Based Non-Volatile SRAM.
VLSI-SoC
Lucas Rhetat, Jean-Philippe Noel, Bastien Giraud, Laurent Grenouillet, Julie Laguerre, Cédric Marchand, Ian O'Connor
2024 J jnl
Complexity Assessment of Analog Security Primitives Using the Disentropy of Autocorrelation.
CoRR
Paul Jiménez, Raphael Cardoso, Mauricio Gomes de Queiroz, Mohab Abdalla, Cédric Marchand, Xavier Letartre, Fabio Pavanello
2024 A conf
FVLLMONTI: The 3D Neural Network Compute Cube $(N^{2}C^{2})$ Concept for Efficient Transformer Architectures Towards Speech-to-Speech Translation.
DATE
Ian O'Connor, Sara Mannaa, Alberto Bosio, Bastien Deveautour, Damien Deleruyelle, Tetiana Obukhova, Cédric Marchand, Jens Trommer, Çigdem Çakirlar, Bruno Neckel Wesling, Thomas Mikolajick, Oskar Baumgartner, Mischa Thesberg, David Pirker, Christoph Lenz, Zlatan Stanojevic, Markus Karner, Guilhem Larrieu, Sylvain Pelloquin, Konstantinous Moustakas, Jonas Müller, Giovanni Ansaloni, Alireza Amirshahi, David Atienza, Jean-Luc Rouas, Leila Ben Letaifa, Georgeta Bordeall, Charles Brazier, Chhandak Mukherjee, Marina Deng, Yifan Wang, Marc François, Houssem Rezgui, Reveil Lucas, Cristell Maneux
2024 — conf
Scalable Design Techniques for Expanding Ferroelectric-Based Non-volatile SRAMs Applications.
VLSI-SoC (Selected Papers)
Lucas Rhetat, Jean-Philippe Noel, Bastien Giraud, Laurent Grenouillet, Julie Laguerre, Cédric Marchand, Ian O'Connor
2024 A conf
Security Layers and Related Services within the Horizon Europe NEUROPULS Project.
DATE
Fabio Pavanello, Cédric Marchand, Paul Jiménez, Xavier Letartre, Ricardo Chaves, Niccolò Marastoni, Alberto Lovato, Mariano Ceccato, George Papadimitriou, Vasileios Karakostas, Dimitris Gizopoulos, Roberta Bardini, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino, Laurence Lerch, Ulrich Rührmair, Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu
2023 B conf
EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.
ETS
Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino
2023 — conf
Energy-efficient Computation-In-Memory Architecture using Emerging Technologies.
ICM
Rajendra Bishnoi, Sumit Diware, Anteneh Gebregiorgis, Simon Thomann, Sara Mannaa, Bastien Deveautour, Cédric Marchand, Alberto Bosio, Damien Deleruyelle, Ian O'Connor, Hussam Amrouch, Said Hamdioui
2023 C conf
FeFET based Logic-in-Memory design methodologies, tools and open challenges.
VLSI-SoC
Cédric Marchand, Alban Nicolas, Paul-Antoine Matrangolo, David Navarro, Alberto Bosio, Ian O'Connor
2023 J jnl
NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.
CoRR
Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino
2023 — conf
Non Volatile Operators Emulation Platform.
NANOARCH
Alban Nicolas, Cédric Marchand, David Navarro
2023 J jnl
Security layers and related services within the Horizon Europe NEUROPULS project.
CoRR
Fabio Pavanello, Cédric Marchand, Paul Jiménez, Xavier Letartre, Ricardo Chaves, Niccolò Marastoni, Alberto Lovato, Mariano Ceccato, George Papadimitriou, Vasileios Karakostas, Dimitris Gizopoulos, Roberta Bardini, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino, Laurence Lerch, Ulrich Rührmair, Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu
2022 — conf
A Logic Cell Design and routing Methodology Specific to VNWFET.
NEWCAS
Arnaud Poittevin, Ian O'Connor, Cédric Marchand, Alberto Bosio, Cristell Maneux, Chhandak Mukherjee, Guilhem Larrieu, Abhishek Kumar
2022 — conf
Hardware Emulation of FeFET On FPGA.
ISVLSI
Paul-Antoine Matrangolo, Cédric Marchand, David Navarro, Ian O'Connor
2021 C conf
Emerging Technologies: Challenges and Opportunities for Logic Synthesis.
DDECS
Alberto Bosio, Mayeul Cantan, Cédric Marchand, Ian O'Connor, Petr Fiser, Arnaud Poittevin, Marcello Traiola
2021 — conf
FeFET based Logic-in-Memory: an overview.
DTIS
Cédric Marchand, Ian O'Connor, Mayeul Cantan, Evelyn T. Breyer, Stefan Slesazeck, Thomas Mikolajick
2020 C conf
3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model.
VLSI-SOC
Chhandak Mukherjee, Marina Deng, François Marc, Cristell Maneux, Arnaud Poittevin, Ian O'Connor, Sébastien Le Beux, Cédric Marchand, Abhishek Kumar, Aurélie Lecestre, Guilhem Larrieu
2020 — conf
3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model.
VLSI-SoC (Selected Papers)
Arnaud Poittevin, Chhandak Mukherjee, Ian O'Connor, Cristell Maneux, Guilhem Larrieu, Marina Deng, Sébastien Le Beux, François Marc, Aurélie Lecestre, Cédric Marchand, Abhishek Kumar
2018 J jnl
Implementation and Characterization of a Physical Unclonable Function for IoT: A Case Study With the TERO-PUF.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Cédric Marchand, Lilian Bossuet, Ugo Mureddu, Nathalie Bochard, Abdelkarim Cherkaoui, Viktor Fischer
2018 C conf
Prospects for energy-efficient edge computing with integrated HfO2-based ferroelectric devices.
VLSI-SoC
Ian O'Connor, Mayeul Cantan, Cédric Marchand, Bertrand Vilquin, Stefan Slesazeck, Evelyn T. Breyer, Halid Mulaosmanovic, Thomas Mikolajick, Bastien Giraud, Jean-Philippe Noel, Adrian M. Ionescu, Igor Stolichnov
2017 J jnl
Area-oriented comparison of lightweight block ciphers implemented in hardware for the activation mechanism in the anti-counterfeiting schemes.
Int. J. Circuit Theory Appl.
Cédric Marchand, Lilian Bossuet, Kris Gaj
2017 — conf
On the security evaluation of the ARM TrustZone extension in a heterogeneous SoC.
SoCC
El Mehdi Benhani, Cédric Marchand, Alain Aubert, Lilian Bossuet
2016 — conf
Design and Characterization of the TERO-PUF on SRAM FPGAs.
ISVLSI
Cédric Marchand, Lilian Bossuet, Abdelkarim Cherkaoui
2016 J jnl
Design, Evaluation, and Optimization of Physical Unclonable Functions Based on Transient Effect Ring Oscillators.
IEEE Trans. Inf. Forensics Secur.
Abdelkarim Cherkaoui, Lilian Bossuet, Cédric Marchand
2016 A conf
Enhanced TERO-PUF Implementations and Characterization on FPGAs (Abstract Only).
FPGA
Cédric Marchand, Lilian Bossuet, Abdelkarim Cherkaoui
2016 J jnl
Identification of IP control units by state encoding and side channel verification.
Microprocess. Microsystems
Edward Jung, Lilian Bossuet, Seonho Choi, Cédric Marchand
2015 Misc conf
Identification of embedded control units by state encoding and power consumption analysis.
SAC
Edward Jung, Cédric Marchand, Lilian Bossuet
2014 — conf
IP watermark verification based on power consumption analysis.
SoCC
Cédric Marchand, Lilian Bossuet, Edward Jung
2014 J jnl
Low-level implementation and side-channel detection of stealthy hardware trojans on field programmable gate arrays.
IET Comput. Digit. Tech.
Cédric Marchand, Julien Francq