Cong Hao - RankMe

148 papers A* 16A 10B 2C 1Misc 8Journal 71Unranked 40

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	DGNNFlow: A Streaming Dataflow Architecture for Real-Time Edge-based Dynamic GNN Inference in HL-LHC Trigger Systems. CoRR Davendra Maharaj, Tu Pham, Peter Meiring, Kyungmin Park, Sena Durgut, Cong Hao, Matteo Cremonesi
2026	J	`jnl`	Introduction to the Special Issue on Machine Learning for CAD, Part I. ACM Trans. Design Autom. Electr. Syst. Yibo Lin, Siddharth Garg, Hussam Amrouch, Cong Hao
2025	J	`jnl`	CRYPTONITE: Scalable Accelerator Design for Cryptographic Primitives and Algorithms. CoRR Karthikeya Sharma Maheswaran, Camille Bossut, Andy Wanna, Qirun Zhang, Cong Hao
2025	—	`conf`	Cryptonite: Scalable Accelerator Design for Cryptographic Primitives and Algorithms. ASAP Karthikeya Sharma Maheswaran, Camille Bossut, Andy Wanna, Qirun Zhang, Cong Hao
2025	J	`jnl`	Efficient Mixture-of-Agents Serving via Tree-Structured Routing, Adaptive Pruning, and Dependency-Aware Prefill-Decode Overlap. CoRR Zijun Wang, Yijiahao Qi, Hanqiu Chen, Zishen Wan, Gongjin Sun, Dongyang Li, Shuyi Pei, Cong Hao
2025	—	`conf`	Exploring and Exploiting Runtime Reconfigurable Floating Point Precision in Scientific Computing: a Case Study for Solving PDEs. ASP-DAC Cong Hao
2025	J	`jnl`	ForgeBench: A Machine Learning Benchmark Suite and Auto-Generation Framework for Next-Generation HLS Tools. CoRR Andy Wanna, Hanqiu Chen, Cong Hao
2025	J	`jnl`	HLS-Eval: A Benchmark and Framework for Evaluating LLMs on High-Level Synthesis Design Tasks. CoRR Stefan Abi-Karam, Cong Hao
2025	J	`jnl`	Intelligent experiments through real-time AI: Fast Data Processing and Autonomous Detector Control for sPHENIX and future EIC detectors. CoRR Jakub Kvapil, Giorgian Borca-Tasciuc, H. Bossi, K. Chen, Y. Chen, Yasser Corrales Morales, H. Da Costa, C. Da Silva, C. Dean, J. Durham, S. Fu, Cong Hao, P. Harris, O. Hen, H. Jheng, Y. Lee, P. Li, X. Li, Y. Lin, M. X. Liu, Vladimir Loncar, Jovan Mitrevski, Alejandro Olvera, Martin L. Purschke, Jimmy S. J. Ren, G. Roland, J. Schambach, Z. Shi, N. Tran, N. Wuerfel, B. Xu, D. Yu, H. Zhang
2025	—	`conf`	Invited: Modeling and Design Methodology for Backside Integration of Voltage Converters. ISPD Amaan Rahman, Hang Yang, Cong Hao, Sung Kyu Lim
2025	A	`conf`	LaZagna: An Open-Source Framework for Flexible 3D FPGA Architectural Exploration. ICCAD Ismael Youssef, Hang Yang, Cong Hao
2025	A*	`conf`	OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs. MICRO Rishov Sarkar, Cong Hao
2025	J	`jnl`	OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs. CoRR Rishov Sarkar, Cong Hao
2025	—	`conf`	Pieceformer: Similarity-Driven Knowledge Transfer via Scalable Graph Transformer in VLSI. MLCAD Hang Yang, Yusheng Hu, Yong Liu, Cong Hao
2025	J	`jnl`	Pieceformer: Similarity-Driven Knowledge Transfer via Scalable Graph Transformer in VLSI. CoRR Hang Yang, Yusheng Hu, Yong Liu, Cong Hao
2025	Misc	`conf`	RealProbe: An Automated and Lightweight Performance Profiler for In-FPGA Execution of High-Level Synthesis Designs. FCCM Jiho Kim, Cong Hao
2025	J	`jnl`	RealProbe: An Automated and Lightweight Performance Profiler for In-FPGA Execution of High-Level Synthesis Designs. CoRR Jiho Kim, Cong Hao
2025	Misc	`conf`	TrackGNN: A Highly Parallelized and Self-Adaptive GNN Accelerator for Track Reconstruction on FPGAs. FCCM Shuyang Li, Hanqing Zhang, Ruiqi Chen, Bruno da Silva, Giorgian Borca-Tasciuc, Dantong Yu, Cong Hao
2025	J	`jnl`	Ultra Memory-Efficient On-FPGA Training of Transformers via Tensor-Compressed Optimization. CoRR Jiayi Tian, Jinming Lu, Hai Li, Xiangwei Wang, Cong Hao, Ian A. Young, Zheng Zhang
2024	—	`conf`	Accurate Low-Degree Polynomial Approximation of Non-Polynomial Operators for Fast Private Inference in Homomorphic Encryption. MLSys Jingtian Dang, Jianming Tong, Anupam Golder, Cong Hao, Arijit Raychowdhury, Tushar Krishna
2024	J	`jnl`	AutoAI2C: An Automated Hardware Generator for DNN Acceleration on Both FPGA and ASIC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yongan Zhang, Xiaofan Zhang, Pengfei Xu, Yang Zhao, Cong Hao, Deming Chen, Yingyan Lin
2024	J	`jnl`	Exploring and Exploiting Runtime Reconfigurable Floating Point Precision in Scientific Computing: a Case Study for Solving PDEs. CoRR Cong Hao
2024	—	`conf`	HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond. MLCAD Stefan Abi-Karam, Rishov Sarkar, Allison Seigler, Sean Lowe, Zhigang Wei, Hanqiu Chen, Nanditha Rao, Lizy Kurian John, Aman Arora, Cong Hao
2024	J	`jnl`	HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond. CoRR Stefan Abi-Karam, Rishov Sarkar, Allison Seigler, Sean Lowe, Zhigang Wei, Hanqiu Chen, Nanditha Rao, Lizy Kurian John, Aman Arora, Cong Hao
2024	—	`conf`	Hyperdimensional Computing vs. Neural Networks: Comparing Architecture and Learning Process. ISQED Dongning Ma, Cong Hao, Xun Jiao
2024	A*	`conf`	ICGMM: CXL-enabled Memory Expansion with Intelligent Caching Using Gaussian Mixture Model. DAC Hanqiu Chen, Yitu Wang, Luis Vitorio Cargnini, Mohammadreza Soltaniyeh, Dongyang Li, Gongjin Sun, Pradeep Subedi, Andrew Chang, Yiran Chen, Cong Hao
2024	J	`jnl`	ICGMM: CXL-enabled Memory Expansion with Intelligent Caching Using Gaussian Mixture Model. CoRR Hanqiu Chen, Yitu Wang, Luis Vitorio Cargnini, Mohammadreza Soltaniyeh, Dongyang Li, Gongjin Sun, Pradeep Subedi, Andrew Chang, Yiran Chen, Cong Hao
2024	Misc	`conf`	LightningSimV2: Faster and Scalable Simulation for High-Level Synthesis via Graph Compilation and Optimization. FCCM Rishov Sarkar, Rachel Paul, Cong Hao
2024	J	`jnl`	LightningSimV2: Faster and Scalable Simulation for High-Level Synthesis via Graph Compilation and Optimization. CoRR Rishov Sarkar, Rachel Paul, Cong Hao
2024	J	`jnl`	MEMS Gyroscope Multi-Feature Calibration Using Machine Learning Technique. CoRR Yaoyao Long, Zhenming Liu, Cong Hao, Farrokh Ayazi
2024	Misc	`conf`	Ph.D. Project: Modernizing High-Level Hardware Design Workflows. FCCM Rishov Sarkar, Cong Hao
2024	J	`jnl`	Programmable Analog System Benchmarks Leading to Efficient Analog Computation Synthesis. ACM Trans. Reconfigurable Technol. Syst. Jennifer Hasler, Cong Hao
2024	A	`conf`	Residual-INR: Communication Efficient On-Device Learning Using Implicit Neural Representation. ICCAD Hanqiu Chen, Xuebin Yao, Pradeep Subedi, Cong Hao
2024	J	`jnl`	Residual-INR: Communication Efficient On-Device Learning Using Implicit Neural Representation. CoRR Hanqiu Chen, Xuebin Yao, Pradeep Subedi, Cong Hao
2024	J	`jnl`	Survey of Machine Learning for Software-assisted Hardware Design Verification: Past, Present, and Prospect. ACM Trans. Design Autom. Electr. Syst. Nan Wu, Yingjie Li, Hang Yang, Hanqiu Chen, Steve Dai, Cong Hao, Cunxi Yu, Yuan Xie
2024	J	`jnl`	Understanding the Performance and Estimating the Cost of LLM Fine-Tuning. CoRR Yuchen Xia, Jiho Kim, Yuhan Chen, Haojie Ye, Souvik Kundu, Cong Hao, Nishil Talati
2023	Misc	`conf`	DGNN-Booster: A Generic FPGA Accelerator Framework For Dynamic Graph Neural Network Inference. FCCM Hanqiu Chen, Cong Hao
2023	J	`jnl`	DGNN-Booster: A Generic FPGA Accelerator Framework For Dynamic Graph Neural Network Inference. CoRR Hanqiu Chen, Cong Hao
2023	—	`conf`	Data-Model-Circuit Tri-Design for Ultra-Light Video Intelligence on Edge Devices. ASP-DAC Yimeng Zhang, Akshay Karkal Kamath, Qiucheng Wu, Zhiwen Fan, Wuyang Chen, Zhangyang Wang, Shiyu Chang, Sijia Liu, Cong Hao
2023	A	`conf`	Edge-MoE: Memory-Efficient Multi-Task Vision Transformer Architecture with Task-Level Sparsity via Mixture-of-Experts. ICCAD Rishov Sarkar, Hanxue Liang, Zhiwen Fan, Zhangyang Wang, Cong Hao
2023	J	`jnl`	Edge-MoE: Memory-Efficient Multi-Task Vision Transformer Architecture with Task-level Sparsity via Mixture-of-Experts. CoRR Rishov Sarkar, Hanxue Liang, Zhiwen Fan, Zhangyang Wang, Cong Hao
2023	A*	`conf`	Extensible and Efficient Proxy for Neural Architecture Search. ICCV Yuhong Li, Jiajie Li, Cong Hao, Pan Li, Jinjun Xiong, Deming Chen
2023	A*	`conf`	FlowGNN: A Dataflow Architecture for Real-Time Workload-Agnostic Graph Neural Network Inference. HPCA Rishov Sarkar, Stefan Abi-Karam, Yuqi He, Lakshmi Sathidevi, Cong Hao
2023	Misc	`conf`	From Acceleration to Accelerating Acceleration: Modernizing the Accelerator Landscape using High-Level Synthesis. FCCM Rishov Sarkar, Cong Hao
2023	B	`conf`	GNNBuilder: An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization. FPL Stefan Abi-Karam, Cong Hao
2023	J	`jnl`	GNNBuilder: An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization. CoRR Stefan Abi-Karam, Cong Hao
2023	J	`jnl`	GNNBuilder: An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization. Softw. Pract. Exp. Stefan Abi-Karam, Cong Hao
2023	A*	`conf`	Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks. DAC Nan Wu, Yingjie Li, Cong Hao, Steve Dai, Cunxi Yu, Yuan Xie
2023	J	`jnl`	Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks. CoRR Nan Wu, Yingjie Li, Cong Hao, Steve Dai, Cunxi Yu, Yuan Xie
2023	Misc	`conf`	Hardware/Software Co-design for Machine Learning Accelerators. FCCM Hanqiu Chen, Cong Hao
2023	A	`conf`	INR-Arch: A Dataflow Architecture and Compiler for Arbitrary-Order Gradient Computations in Implicit Neural Representation Processing. ICCAD Stefan Abi-Karam, Rishov Sarkar, Dejia Xu, Zhiwen Fan, Zhangyang Wang, Cong Hao
2023	J	`jnl`	INR-Arch: A Dataflow Architecture and Compiler for Arbitrary-Order Gradient Computations in Implicit Neural Representation Processing. CoRR Stefan Abi-Karam, Rishov Sarkar, Dejia Xu, Zhiwen Fan, Zhangyang Wang, Cong Hao
2023	J	`jnl`	IronMan-Pro: Multiobjective Design Space Exploration in HLS via Reinforcement Learning and Graph Neural Network-Based Modeling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nan Wu, Yuan Xie, Cong Hao
2023	Misc	`conf`	LightningSim: Fast and Accurate Trace-Based Simulation for High-Level Synthesis. FCCM Rishov Sarkar, Cong Hao
2023	J	`jnl`	LightningSim: Fast and Accurate Trace-Based Simulation for High-Level Synthesis. CoRR Rishov Sarkar, Cong Hao
2023	A	`conf`	M5: Multi-modal Multi-task Model Mapping on Multi-FPGA with Accelerator Configuration Search. DATE Akshay Karkal Kamath, Stefan Abi-Karam, Ashwin Bhat, Cong Hao
2023	—	`conf`	PreAxC: Error Distribution Prediction for Approximate Computing Quality Control using Graph Neural Networks. ISQED Lakshmi Sathidevi, Abhinav Sharma, Nan Wu, Xun Jiao, Cong Hao
2023	A	`conf`	Rapid-INR: Storage Efficient CPU-Free DNN Training Using Implicit Neural Representation. ICCAD Hanqiu Chen, Hang Yang, Stephen B. R. Fitzmeyer, Cong Hao
2023	J	`jnl`	Rapid-INR: Storage Efficient CPU-free DNN Training Using Implicit Neural Representation. CoRR Hanqiu Chen, Hang Yang, Stephen B. R. Fitzmeyer, Cong Hao
2022	C	`conf`	AI-assisted Synthesis in Next Generation EDA: Promises, Challenges, and Prospects. ICCD Nan Wu, Yuan Xie, Cong Hao
2022	—	`conf`	Bottleneck Analysis of Dynamic Graph Neural Network Inference on CPU and GPU. IISWC Hanqiu Chen, Yahya Alhinai, Yihan Jiang, Eunjee Na, Cong Hao
2022	J	`jnl`	Bottleneck Analysis of Dynamic Graph Neural Network Inference on CPU and GPU. CoRR Hanqiu Chen, Yahya Alhinai, Yihan Jiang, Eunjee Na, Cong Hao
2022	J	`jnl`	Data-Model-Circuit Tri-Design for Ultra-Light Video Intelligence on Edge Devices. CoRR Yimeng Zhang, Akshay Karkal Kamath, Qiucheng Wu, Zhiwen Fan, Wuyang Chen, Zhangyang Wang, Shiyu Chang, Sijia Liu, Cong Hao
2022	J	`jnl`	Efficient Machine Learning, Compilers, and Optimizations for Embedded Systems. CoRR Xiaofan Zhang, Yao Chen, Cong Hao, Sitao Huang, Yuhong Li, Deming Chen
2022	J	`jnl`	Enabling Flexibility for Sparse Tensor Acceleration via Heterogeneity. CoRR Eric Qin, Raveesh Garg, Abhimanyu Bambhaniya, Michael Pellauer, Angshuman Parashar, Sivasankaran Rajamanickam, Cong Hao, Tushar Krishna
2022	J	`jnl`	FlowGNN: A Dataflow Architecture for Universal Graph Neural Network Inference via Multi-Queue Streaming. CoRR Rishov Sarkar, Stefan Abi-Karam, Yuqi He, Lakshmi Sathidevi, Cong Hao
2022	J	`jnl`	GenGNN: A Generic FPGA Framework for Graph Neural Network Acceleration. CoRR Stefan Abi-Karam, Yuqi He, Rishov Sarkar, Lakshmi Sathidevi, Zihang Qiao, Cong Hao
2022	J	`jnl`	H2H: Heterogeneous Model to Heterogeneous System Mapping with Computation and Communication Awareness. CoRR Xinyi Zhang, Cong Hao, Peipei Zhou, Alex K. Jones, Jingtong Hu
2022	A*	`conf`	H2H: heterogeneous model to heterogeneous system mapping with computation and communication awareness. DAC Xinyi Zhang, Cong Hao, Peipei Zhou, Alex K. Jones, Jingtong Hu
2022	J	`jnl`	High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing. CoRR Nan Wu, Hang Yang, Yuan Xie, Pan Li, Cong Hao
2022	A*	`conf`	High-level synthesis performance prediction using GNNs: benchmarking, modeling, and advancing. DAC Nan Wu, Hang Yang, Yuan Xie, Pan Li, Cong Hao
2022	J	`jnl`	Hybrid Graph Models for Logic Optimization via Spatio-Temporal Information. CoRR Nan Wu, Jiwon Lee, Yuan Xie, Cong Hao
2022	—	`conf`	LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models. ASAP Nan Wu, Jiwon Lee, Yuan Xie, Cong Hao
2022	J	`jnl`	M CoRR Hanxue Liang, Zhiwen Fan, Rishov Sarkar, Ziyu Jiang, Tianlong Chen, Kai Zou, Yu Cheng, Cong Hao, Zhangyang Wang
2022	—	`conf`	Mask-Net: A Hardware-efficient Object Detection Network with Masked Region Proposals. ASAP Hanqiu Chen, Cong Hao
2022	A*	`conf`	M³ViT: Mixture-of-Experts Vision Transformer for Efficient Multi-task Learning with Model-Accelerator Co-design. NeurIPS Hanxue Liang, Zhiwen Fan, Rishov Sarkar, Ziyu Jiang, Tianlong Chen, Kai Zou, Yu Cheng, Cong Hao, Zhangyang Wang
2022	—	`conf`	RT-DNAS: Real-Time Constrained Differentiable Neural Architecture Search for 3D Cardiac Cine MRI Segmentation. MICCAI (5) Qing Lu, Xiaowei Xu, Shunjie Dong, Cong Hao, Lei Yang, Cheng Zhuo, Yiyu Shi
2022	J	`jnl`	RT-DNAS: Real-time Constrained Differentiable Neural Architecture Search for 3D Cardiac Cine MRI Segmentation. CoRR Qing Lu, Xiaowei Xu, Shunjie Dong, Cong Hao, Lei Yang, Cheng Zhuo, Yiyu Shi
2022	—	`conf`	Robotic Computing on FPGAs: Current Progress, Research Challenges, and Opportunities. AICAS Zishen Wan, Ashwin Sanjay Lele, Bo Yu, Shaoshan Liu, Yu Wang, Vijay Janapa Reddi, Cong Hao, Arijit Raychowdhury
2022	J	`jnl`	Robotic Computing on FPGAs: Current Progress, Research Challenges, and Opportunities. CoRR Zishen Wan, Ashwin Sanjay Lele, Bo Yu, Shaoshan Liu, Yu Wang, Vijay Janapa Reddi, Cong Hao, Arijit Raychowdhury
2022	A*	`conf`	ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation. HPCA Hanchen Ye, Cong Hao, Jianyi Cheng, Hyunmin Jeong, Jack Huang, Stephen Neuendorffer, Deming Chen
2022	A*	`conf`	Unsupervised Learning for Combinatorial Optimization with Principled Objective Relaxation. NeurIPS Haoyu Wang, Nan Wu, Hang Yang, Cong Hao, Pan Li
2022	J	`jnl`	Unsupervised Learning for Combinatorial Optimization with Principled Objective Relaxation. CoRR Haoyu Wang, Nan Wu, Hang Yang, Cong Hao, Pan Li
2021	—	`conf`	3U-EdgeAI: Ultra-Low Memory Training, Ultra-Low Bitwidth Quantization, and Ultra-Low Latency Acceleration. ACM Great Lakes Symposium on VLSI Yao Chen, Cole Hawkins, Kaiqi Zhang, Zheng Zhang, Cong Hao
2021	J	`jnl`	3U-EdgeAI: Ultra-Low Memory Training, Ultra-Low BitwidthQuantization, and Ultra-Low Latency Acceleration. CoRR Yao Chen, Cole Hawkins, Kaiqi Zhang, Zheng Zhang, Cong Hao
2021	A*	`conf`	Adversarial Graph Augmentation to Improve Graph Contrastive Learning. NeurIPS Susheel Suresh, Pan Li, Cong Hao, Jennifer Neville
2021	J	`jnl`	Adversarial Graph Augmentation to Improve Graph Contrastive Learning. CoRR Susheel Suresh, Pan Li, Cong Hao, Jennifer Neville
2021	J	`jnl`	Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Co-design. CoRR Cong Hao, Jordan Dotzel, Jinjun Xiong, Luca Benini, Zhiru Zhang, Deming Chen
2021	J	`jnl`	Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Codesign. IEEE Des. Test Cong Hao, Jordan Dotzel, Jinjun Xiong, Luca Benini, Zhiru Zhang, Deming Chen
2021	A*	`conf`	Generic Neural Architecture Search via Regression. NeurIPS Yuhong Li, Cong Hao, Pan Li, Jinjun Xiong, Deming Chen
2021	J	`jnl`	Generic Neural Architecture Search via Regression. CoRR Yuhong Li, Cong Hao, Pan Li, Jinjun Xiong, Deming Chen
2021	A*	`conf`	HW-NAS-Bench: Hardware-Aware Neural Architecture Search Benchmark. ICLR Chaojian Li, Zhongzhi Yu, Yonggan Fu, Yongan Zhang, Yang Zhao, Haoran You, Qixuan Yu, Yue Wang, Cong Hao, Yingyan Lin
2021	—	`conf`	IRONMAN: GNN-assisted Design Space Exploration in High-Level Synthesis via Reinforcement Learning. ACM Great Lakes Symposium on VLSI Nan Wu, Yuan Xie, Cong Hao
2021	J	`jnl`	Improving the Generalization Ability of Deep Neural Networks for Cross-Domain Visual Recognition. IEEE Trans. Cogn. Dev. Syst. Jianwei Zheng, Chao Lu, Cong Hao, Deming Chen, Donghui Guo
2021	J	`jnl`	IronMan: GNN-assisted Design Space Exploration in High-Level Synthesis via Reinforcement Learning. CoRR Nan Wu, Yuan Xie, Cong Hao
2021	A*	`conf`	MELOPPR: Software/Hardware Co-design for Memory-efficient Low-latency Personalized PageRank. DAC Lixiang Li, Yao Chen, Zacharie Zirnheld, Pan Li, Cong Hao
2021	J	`jnl`	MELOPPR: Software/Hardware Co-design for Memory-efficient Low-latency Personalized PageRank. CoRR Lixiang Li, Yao Chen, Zacharie Zirnheld, Pan Li, Cong Hao
2021	J	`jnl`	On-FPGA Training with Ultra Memory Reduction: A Low-Precision Tensor Method. CoRR Kaiqi Zhang, Cole Hawkins, Xiyuan Zhang, Cong Hao, Zheng Zhang
2021	J	`jnl`	Program-to-Circuit: Exploiting GNNs for Program Representation and Circuit Translation. CoRR Nan Wu, Huake He, Yuan Xie, Pan Li, Cong Hao
2021	J	`jnl`	ScaleHLS: Scalable High-Level Synthesis through MLIR. CoRR Hanchen Ye, Cong Hao, Jianyi Cheng, Hyunmin Jeong, Jack Huang, Stephen Neuendorffer, Deming Chen
2021	—	`conf`	Software/Hardware Co-design for Multi-modal Multi-task Learning in Autonomous Systems. AICAS Cong Hao, Deming Chen
2021	J	`jnl`	Software/Hardware Co-design for Multi-modal Multi-task Learning in Autonomous Systems. CoRR Cong Hao, Deming Chen
2021	J	`jnl`	VecQ: Minimal Loss DNN Model Compression With Vectorized Weight Quantization. IEEE Trans. Computers Cheng Gong, Yao Chen, Ye Lu, Tao Li, Cong Hao, Deming Chen
2021	—	`conf`	WinoCNN: Kernel Sharing Winograd Systolic Array for Efficient Convolutional Neural Network Acceleration on FPGAs. ASAP Xinheng Liu, Yao Chen, Cong Hao, Ashutosh Dhar, Deming Chen
2021	J	`jnl`	WinoCNN: Kernel Sharing Winograd Systolic Array for Efficient Convolutional Neural Network Acceleration on FPGAs. CoRR Xinheng Liu, Yao Chen, Cong Hao, Ashutosh Dhar, Deming Chen
2021	A	`conf`	Workload-Aware Approximate Computing Configuration. DATE Dongning Ma, Rahul Thapa, Xingjian Wang, Xun Jiao, Cong Hao
2020	A	`conf`	AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs. FPGA Pengfei Xu, Xiaofan Zhang, Cong Hao, Yang Zhao, Yongan Zhang, Yue Wang, Chaojian Li, Zetong Guan, Deming Chen, Yingyan Lin
2020	J	`jnl`	AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs. CoRR Pengfei Xu, Xiaofan Zhang, Cong Hao, Yang Zhao, Yongan Zhang, Yue Wang, Chaojian Li, Zetong Guan, Deming Chen, Yingyan Lin
2020	A*	`conf`	EDD: Efficient Differentiable DNN Architecture and Implementation Co-search for Embedded AI Solutions. DAC Yuhong Li, Cong Hao, Xiaofan Zhang, Xinheng Liu, Yao Chen, Jinjun Xiong, Wen-mei W. Hwu, Deming Chen
2020	J	`jnl`	EDD: Efficient Differentiable DNN Architecture and Implementation Co-search for Embedded AI Solutions. CoRR Yuhong Li, Cong Hao, Xiaofan Zhang, Xinheng Liu, Yao Chen, Jinjun Xiong, Wen-mei W. Hwu, Deming Chen
2020	—	`conf`	Effective Algorithm-Accelerator Co-design for AI Solutions on Edge Devices. ACM Great Lakes Symposium on VLSI Cong Hao, Yao Chen, Xiaofan Zhang, Yuhong Li, Jinjun Xiong, Wen-Mei Hwu, Deming Chen
2020	J	`jnl`	Effective Algorithm-Accelerator Co-design for AI Solutions on Edge Devices. CoRR Cong Hao, Yao Chen, Xiaofan Zhang, Yuhong Li, Jinjun Xiong, Wen-Mei Hwu, Deming Chen
2020	—	`conf`	SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems. MLSys Xiaofan Zhang, Haoming Lu, Cong Hao, Jiachen Li, Bowen Cheng, Yuhong Li, Kyle Rupnow, Jinjun Xiong, Thomas S. Huang, Honghui Shi, Wen-Mei Hwu, Deming Chen
2020	J	`jnl`	VecQ: Minimal Loss DNN Model Compression With Vectorized Weight Quantization. CoRR Cheng Gong, Yao Chen, Ye Lu, Tao Li, Cong Hao, Deming Chen
2019	J	`jnl`	A Bi-Directional Co-Design Approach to Enable Deep Learning on IoT Devices. CoRR Xiaofan Zhang, Cong Hao, Yuhong Li, Yao Chen, Jinjun Xiong, Wen-mei W. Hwu, Deming Chen
2019	—	`conf`	A Hybrid GPU + FPGA System Design for Autonomous Driving Cars. SiPS Cong Hao, Junli Gu, Deming Chen, Atif Sarwari, Zhijie Jin, Husam Abu-Haimed, Daryl Sew, Yuhong Li, Xinheng Liu, Bryan Wu, Dongdong Fu
2019	A	`conf`	Cloud-DNN: An Open Framework for Mapping DNN Models to Cloud FPGAs. FPGA Yao Chen, Jiong He, Xiaofan Zhang, Cong Hao, Deming Chen
2019	A*	`conf`	FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge. DAC Cong Hao, Xiaofan Zhang, Yuhong Li, Sitao Huang, Jinjun Xiong, Kyle Rupnow, Wen-Mei Hwu, Deming Chen
2019	J	`jnl`	FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge. CoRR Cong Hao, Xiaofan Zhang, Yuhong Li, Sitao Huang, Jinjun Xiong, Kyle Rupnow, Wen-Mei Hwu, Deming Chen
2019	A	`conf`	NAIS: Neural Architecture and Implementation Search and its Applications in Autonomous Driving. ICCAD Cong Hao, Yao Chen, Xinheng Liu, Atif Sarwari, Daryl Sew, Ashutosh Dhar, Bryan Wu, Dongdong Fu, Jinjun Xiong, Wen-Mei Hwu, Junli Gu, Deming Chen
2019	J	`jnl`	NAIS: Neural Architecture and Implementation Search and its Applications in Autonomous Driving. CoRR Cong Hao, Yao Chen, Xinheng Liu, Atif Sarwari, Daryl Sew, Ashutosh Dhar, Bryan Wu, Dongdong Fu, Jinjun Xiong, Wen-Mei Hwu, Junli Gu, Deming Chen
2019	J	`jnl`	SkyNet: A Champion Model for DAC-SDC on Low Power Object Detection. CoRR Xiaofan Zhang, Cong Hao, Haoming Lu, Jiachen Li, Yuhong Li, Yuchen Fan, Kyle Rupnow, Jinjun Xiong, Thomas S. Huang, Honghui Shi, Wen-Mei Hwu, Deming Chen
2019	J	`jnl`	SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems. CoRR Xiaofan Zhang, Haoming Lu, Cong Hao, Jiachen Li, Bowen Cheng, Yuhong Li, Kyle Rupnow, Jinjun Xiong, Thomas S. Huang, Honghui Shi, Wen-mei W. Hwu, Deming Chen
2019	—	`conf`	T-DLA: An Open-source Deep Learning Accelerator for Ternarized DNN Models on Embedded FPGA. ISVLSI Yao Chen, Kai Zhang, Cheng Gong, Cong Hao, Xiaofan Zhang, Tao Li, Deming Chen
2019	B	`conf`	µL2Q: An Ultra-Low Loss Quantization Method for DNN Compression. IJCNN Cheng Gong, Tao Li, Ye Lu, Cong Hao, Xiaofan Zhang, Deming Chen, Yao Chen
2018	—	`conf`	Economical Smart Home Scheduling by Cuckoo Search optimization via Levy Flight. MWSCAS Rujie Lai, Yangyizhou Wang, Cong Hao, Takeshi Yoshimura
2018	—	`conf`	TSV Assignment of Thermal and Wirelength Optimization for 3D-IC Routing. PATMOS Yi Zhao, Cong Hao, Takeshi Yoshimura
2018	—	`conf`	The Sixth Visual Object Tracking VOT2018 Challenge Results. ECCV Workshops (1) Matej Kristan, Ales Leonardis, Jiri Matas, Michael Felsberg, Roman P. Pflugfelder, Luka Cehovin Zajc, Tomás Vojír, Goutam Bhat, Alan Lukezic, Abdelrahman Eldesokey, Gustavo Fernández, Álvaro García-Martín, Álvaro Iglesias-Arias, A. Aydin Alatan, Abel González-García, Alfredo Petrosino, Alireza Memarmoghadam, Andrea Vedaldi, Andrej Muhic, Anfeng He, Arnold W. M. Smeulders, Asanka G. Perera, Bo Li, Boyu Chen, Changick Kim, Changsheng Xu, Changzhen Xiong, Cheng Tian, Chong Luo, Chong Sun, Cong Hao, Daijin Kim, Deepak Mishra, Deming Chen, Dong Wang, Dongyoon Wee, Efstratios Gavves, Erhan Gundogdu, Erik Velasco-Salido, Fahad Shahbaz Khan, Fan Yang, Fei Zhao, Feng Li, Francesco Battistone, George De Ath, Gorthi R. K. Sai Subrahmanyam, Guilherme Sousa Bastos, Haibin Ling, Hamed Kiani Galoogahi, Hankyeol Lee, Haojie Li, Haojie Zhao, Heng Fan, Honggang Zhang, Horst Possegger, Houqiang Li, Huchuan Lu, Hui Zhi, Huiyun Li, Hyemin Lee, Hyung Jin Chang, Isabela Drummond, Jack Valmadre, Jaime Spencer Martin, Javaan Singh Chahl, Jin Young Choi, Jing Li, Jinqiao Wang, Jinqing Qi, Jinyoung Sung, Joakim Johnander, João F. Henriques, Jongwon Choi, Joost van de Weijer, Jorge Rodríguez Herranz, José M. Martínez, Josef Kittler, Junfei Zhuang, Junyu Gao, Klemen Grm, Lichao Zhang, Lijun Wang, Lingxiao Yang, Litu Rout, Liu Si, Luca Bertinetto, Lutao Chu, Manqiang Che, Mario Edoardo Maresca, Martin Danelljan, Ming-Hsuan Yang, Mohamed H. Abdelpakey, Mohamed Shehata, Myunggu Kang, Namhoon Lee, Ning Wang, Ondrej Miksik, Payman Moallem, Pablo Vicente-Moñivar, Pedro Senna, Peixia Li, Philip H. S. Torr, Priya Mariam Raju, Ruihe Qian, Qiang Wang, Qin Zhou, Qing Guo, Rafael Martin Nieto, Rama Krishna Sai Subrahmanyam Gorthi, Ran Tao, Richard Bowden, Richard M. Everson, Runling Wang, Sangdoo Yun, Seokeon Choi, Sergio Vivas, Shuai Bai, Shuangping Huang, Sihang Wu, Simon Hadfield, Siwen Wang, Stuart Golodetz, Ming Tang, Tianyang Xu, Tianzhu Zhang, Tobias Fischer, Vincenzo Santopietro, Vitomir Struc, Wei Wang, Wangmeng Zuo, Wei Feng, Wei Wu, Wei Zou, Weiming Hu, Wengang Zhou, Wenjun Zeng, Xiaofan Zhang, Xiaohe Wu, Xiao-Jun Wu, Xinmei Tian, Yan Li, Yan Lu, Yee Wei Law, Yi Wu, Yiannis Demiris, Yicai Yang, Yifan Jiao, Yuhong Li, Yunhua Zhang, Yuxuan Sun, Zheng Zhang, Zheng Zhu, Zhenhua Feng, Zhihui Wang, Zhiqun He
2018	—	`conf`	Triangle Counting and Truss Decomposition using FPGA. HPEC Sitao Huang, Mohamed El-Hadedy, Cong Hao, Qin Li, Vikram S. Mailthody, Ketan Date, Jinjun Xiong, Deming Chen, Rakesh Nagi, Wen-Mei Hwu
2017	—	`conf`	3D-IC signal TSV assignment for thermal and wirelength optimization. PATMOS Yuxin Qian, Cong Hao, Takeshi Yoshimura
2017	J	`jnl`	A Unified Scheduling Approach for Power and Resource Optimization With Multiple V IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Cong Hao, Nan Wang, Takeshi Yoshimura
2017	—	`conf`	A particle swarm optimization and branch and bound based algorithm for economical smart home scheduling. MWSCAS Yangyizhou Wang, Cong Hao, Takeshi Yoshimura
2017	J	`jnl`	An Efficient Multi-Level Algorithm for 3D-IC TSV Assignment. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Cong Hao, Takeshi Yoshimura
2017	—	`conf`	Application of on-line machine learning in optimization algorithms: A case study for local search. CEEC Cong Hao, Takeshi Yoshimura
2017	J	`jnl`	Interconnection Allocation Between Functional Units and Registers in High-Level Synthesis. IEEE Trans. Very Large Scale Integr. Syst. Cong Hao, Jianmo Ni, Nan Wang, Takeshi Yoshimura
2016	—	`conf`	An efficient algorithm for 3D-IC TSV assignment. NEWCAS Cong Hao, Nan Ding, Takeshi Yoshimura
2016	—	`conf`	Economical smart home scheduling for single and multiple users. MWSCAS Cong Hao, Takeshi Yoshimura
2016	J	`jnl`	Leakage-Power-Aware Scheduling With Dual-Threshold Voltage Design. IEEE Trans. Very Large Scale Integr. Syst. Nan Wang, Wei Zhong, Cong Hao, Song Chen, Takeshi Yoshimura, Yu Zhu
2016	—	`conf`	Power-efficient partitioning and cluster generation design for application-specific Network-on-Chip. ISOCC Jiayi Ma, Cong Hao, Wencan Zhang, Takeshi Yoshimura
2016	—	`conf`	Thermal-aware floorplanning for NoC-sprinting. MWSCAS Hui Zhu, Cong Hao, Takeshi Yoshimura
2015	—	`conf`	Primal-dual method based simultaneous functional unit and register binding. ASICON Jianmo Ni, Cong Hao, Nan Wang, Qian Ai, Takeshi Yoshimura
2015	—	`conf`	Simultaneous scheduling and binding for resource usage and interconnect complexity reduction in high-level synthesis. ASICON Cong Hao, Jianmo Ni, Hui-Tong Wang, Takeshi Yoshimura
2014	J	`jnl`	Leakage Power Aware Scheduling in High-Level Synthesis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Nan Wang, Song Chen, Cong Hao, Haoran Zhang, Takeshi Yoshimura
2013	—	`conf`	Interconnection allocation between functional units and registers in High-Level Synthesis. ASICON Cong Hao, Nan Wang, Song Chen, Takeshi Yoshimura, Min-You Wu
2013	—	`conf`	Network simplex method based Multiple Voltage Scheduling in Power-efficient High-level synthesis. ASP-DAC Cong Hao, Song Chen, Takeshi Yoshimura
2013	—	`conf`	Power and resource aware scheduling with multiple voltages. ASICON Haoran Zhang, Cong Hao, Nan Wang, Song Chen, Takeshi Yoshimura
2013	—	`conf`	Timing and resource constrained leakage power aware scheduling in high-level synthesis. ASICON Nan Wang, Cong Hao, Nan Liu, Haoran Zhang, Takeshi Yoshimura
2012	—	`conf`	Port assignment for interconnect reduction in high-level synthesis. VLSI-DAT Cong Hao, Song Chen, Takeshi Yoshimura