Cong-Kha Pham

165 papers B 2C 31Journal 82Unranked 50
YearRankTypeTitle / Venue / Authors
2026 J jnl
Countering Side-Channel Attacks With a Dynamic S-Box Based on Affine Transformations and Gold Sequences.
IEEE Trans. Very Large Scale Integr. Syst.
Thai-Ha Tran, Duc-Thuan Dam, Tuan-Kiet Dang, Duc-Hung Le, Trong-Thuc Hoang, Cong-Kha Pham
2026 J jnl
Implementation of a Secure 32-bit RISC-V Microcontroller Integrated With a Fast Lightweight Post-Quantum NTRU-HPS Cryptosystem for IoT.
IEEE Access
Tri Duc Ta, Quoc-Thinh Tran, Cong-Kha Pham, Duc-Hung Le
2025 C conf
A Low-Latency Polynomial Arithmetic Unit for ML-KEM and ML-DSA Standards.
ISCAS
Trong-Hung Nguyen, Duc-Thuan Dam, Phuc-Phan Duong, Trong-Thuc Hoang, Cong-Kha Pham
2025 — conf
A Low-Power RISC-V Accelerator with Booth-Based Multiplication for Edge CNN Deployment.
MIWAI (3)
Tran Ngoc Thinh, Huynh Phuc Nghi, Cuong Pham-Quoc, Cong-Kha Pham
2025 J jnl
A Timing-Constrained Design Methodology for Radix- 2
IEEE Trans. Circuits Syst. I Regul. Pap.
Trong-Hung Nguyen, Duc-Thuan Dam, Phuc-Phan Duong, Tuan-Kiet Dang, Trong-Thuc Hoang, Cong-Kha Pham
2025 J jnl
A Unified Approach to Strong PUF and TRNG Using Ring Generator for Cryptography.
IEEE Internet Things J.
Tuan-Kiet Dang, Khai-Duy Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2025 J jnl
ASIC Implementation of ASCON Lightweight Cryptography for IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Khai-Duy Nguyen, Tuan-Kiet Dang, Binh Kieu-Do-Nguyen, Duc-Hung Le, Cong-Kha Pham, Trong-Thuc Hoang
2025 J jnl
An Area-Time Efficient Hardware Architecture for ML-KEM Post-Quantum Cryptography Standard.
IEEE Access
Trong-Hung Nguyen, Tuan-Kiet Dang, Duc-Thuan Dam, Khai-Duy Nguyen, Phuc-Phan Duong, Cong-Kha Pham, Trong-Thuc Hoang
2025 J jnl
Compact 8-Bit S-Boxes Based on Multiplication in a Galois Field GF(24).
Cryptogr.
Phuc-Phan Duong, Tuan-Kiet Dang, Trong-Thuc Hoang, Cong-Kha Pham
2025 C conf
Compact FALCON FFT/NTT Accelerator for Post-Quantum Cryptography.
ISCAS
Duc-Thuan Dam, Thai-Ha Tran, Trong-Hung Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2025 J jnl
Constructing 8 × 8 S-Boxes with Optimal Boolean Function Nonlinearity.
Cryptogr.
Phuc-Phan Duong, Cong-Kha Pham
2025 — conf
Dual-Mode PUF and TRNG Design with Ring Generator on 180nm CMOS.
ICICDT
Tuan-Kiet Dang, Khai-Duy Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2025 J jnl
Dynamic S-Boxes Block Cipher for Side-Channel Attack Resistance.
IEEE Access
Phuc-Phan Duong, Minh Nguyen Hieu, Ba-Anh Dao, Trong-Hung Nguyen, Cong-Kha Pham
2025 J jnl
Early Termination for Integer Motion Estimation via Multi-Level Successive Elimination in Versatile Video Coding.
IEEE Access
Tan-Phat Dang, Nhu-Hoang Nguyen, Tuan-Kiet Tran, Anh-Tuan Hoang, Huu-Thuan Huynh, Cong-Kha Pham
2025 J jnl
Efficient Hardware Implementation of the Lightweight CRYSTALS-Kyber.
IEEE Trans. Circuits Syst. I Regul. Pap.
Trong-Hung Nguyen, Duc-Thuan Dam, Phuc-Phan Duong, Binh Kieu-Do-Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2025 C conf
Enhanced Tower Field Mask Scheme with Affine Transformation-based Dynamic S-box.
ISCAS
Thai-Ha Tran, Duc-Thuan Dam, Van-Phuc Hoang, Trong-Thuc Hoang, Cong-Kha Pham
2025 C conf
Live Demonstration: ASIC Implementation of ASCON Lightweight Cryptography for IoT Applications.
ISCAS
Khai-Duy Nguyen, Tuan-Kiet Dang, Binh Kieu-Do-Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2025 — conf
Low-Overhead Total Memory Encryption and Authentication on a RISC-V Processor.
MIWAI (3)
The-Binh Nguyen, Cuong Pham-Quoc, Tuan-Kiet Dang, Cong-Kha Pham
2025 — conf
Pedestrian Avoidance Simulation by Deep Reinforcement Learning Using Webots.
ICAIIC
Chalumpol Trararak, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
A Novel ECG Signal Quality Index Method Based on Skewness-MODWT Analysis.
IEEE Access
Ta Viet Tai, Ma Pham Nhut Tan, Duong Hoang Tien, Nguyen Viet Ha, Trong-Thuc Hoang, Cong-Kha Pham, Tran Thi Thao Nguyen
2024 — conf
A Resource-Efficient Multi-core Multi-thread RISC-V-based System-on-Chip.
ISOCC
Binh Kieu-Do-Nguyen, Khai-Duy Nguyen, Nguyen The Binh, Tuan-Kiet Dang, Duc-Hung Le, Cuong Pham-Quoc, Ngoc-Thinh Tran, Cong-Kha Pham, Trong-Thuc Hoang
2024 C conf
A Strong 4 × 4 S-Box Using an Enhanced Tent Map.
ISCAS
Phuc-Phan Duong, Trong-Thuc Hoang, Cong-Kha Pham
2024 — conf
A True Random Number Generator on FPGA with Jitter-Sampling by Ring Generator.
AsianHOST
Tuan-Kiet Dang, Trong-Thuc Hoang, Cong-Kha Pham
2024 — conf
A Trusted Execution Environment RISC-V System on Chip.
HCS
Binh Kieu-Do-Nguyen, Khai-Duy Nguyen, Tuan-Kiet Dang, Cong-Kha Pham, Trong-Thuc Hoang
2024 C conf
A Unified OTP and PUF Exploiting Post-Program Current on Standard CMOS Technology.
ISCAS
Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Khai-Duy Nguyen, Tetsuya Iizuka, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
A multimode SHA-3 accelerator based on RISC-V system.
IEICE Electron. Express
Huu-Thuan Huynh, Tan-Phat Dang, Tuan-Kiet Tran, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
Accumulator-Based 16-Bit Processor for Wireless Sensor Nodes.
IEEE Trans. Circuits Syst. II Express Briefs
Tuan-Kiet Dang, Khai-Duy Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2024 C conf
An Efficient Hiding Countermeasure with Xilinx MMCM Primitive in Spread Mode.
ISCAS
Thai-Ha Tran, Van-Phuc Hoang, Duc-Hung Le, Trong-Thuc Hoang, Cong-Kha Pham
2024 C conf
An Efficient Method for Accelerating Kyber and Dilithium Post-Quantum Cryptography.
PST
Duc-Thuan Dam, Trong-Hung Nguyen, Thai-Ha Tran, Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
Compact and Low-Latency FPGA-Based Number Theoretic Transform Architecture for CRYSTALS Kyber Postquantum Cryptography Scheme.
Inf.
Binh Kieu-Do-Nguyen, Nguyen The Binh, Cuong Pham-Quoc, Huynh Phuc Nghi, Ngoc-Thinh Tran, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
Compacting Side-Channel Measurements With Amplitude Peak Location Algorithm.
IEEE Trans. Very Large Scale Integr. Syst.
Thai-Ha Tran, Duc-Thuan Dam, Ba-Anh Dao, Van-Phuc Hoang, Cong-Kha Pham, Trong-Thuc Hoang
2024 J jnl
Construction of Robust Lightweight S-Boxes Using Enhanced Logistic and Enhanced Sine Maps.
IEEE Access
Phuc-Phan Duong, Hieu Minh Nguyen, Ba-Anh Dao, Binh Kieu-Do-Nguyen, Thai-Ha Tran, Trong-Thuc Hoang, Cong-Kha Pham
2024 — conf
Designing and Implementing a 2D Integer DCT Hardware Accelerator Fully Compatible with Versatile Video Coding.
ICCSA (Workshops 1)
Nhu-Hoang Nguyen, Tan-Phat Dang, Thanh-Dat Bui, Trong-Thuc Hoang, Cong-Kha Pham, Huu-Thuan Huynh
2024 C conf
Hardware Implementation of a Hybrid Dynamic Gold Code-Based Countermeasure Against Side-Channel Attacks.
PST
Thai-Ha Tran, Duc-Thuan Dam, Binh Kieu-Do-Nguyen, Van-Phuc Hoang, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
Hardware Software Co-Design for Multi-Threaded Computation on RISC-V-Based Multicore System.
IEEE Access
Binh Kieu-Do-Nguyen, Khai-Duy Nguyen, Nguyen The Binh, Khai-Minh Ma, Tri Duc Ta, Duc-Hung Le, Cong-Kha Pham, Trong-Thuc Hoang
2024 J jnl
High-Efficiency Multi-Standard Polynomial Multiplication Accelerator on RISC-V SoC for Post-Quantum Cryptography.
IEEE Access
Duc-Thuan Dam, Trong-Hung Nguyen, Thai-Ha Tran, Duc-Hung Le, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
High-Speed NTT Accelerator for CRYSTAL-Kyber and CRYSTAL-Dilithium.
IEEE Access
Trong-Hung Nguyen, Binh Kieu-Do-Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2024 — conf
Implementing a Secure Boot System on a 32-Bit RISC-V CPU on FPGA.
RIVF
Quoc-Dang Tran, Khai-Minh Ma, Trong-Tu Bui, Cong-Kha Pham, Duc-Hung Le
2024 — conf
RISC-V-Based System-on-Chips for IoT Applications.
HCS
Khai-Duy Nguyen, Tuan-Kiet Dang, Binh Kieu-Do-Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2024 J jnl
Realization of Authenticated One-Pass Key Establishment on RISC-V Micro-Controller for IoT Applications.
Future Internet
Tuan-Kiet Dang, Khai-Duy Nguyen, Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
Spread Spectrum-Based Countermeasures for Cryptographic RISC-V SoC.
IEEE Trans. Very Large Scale Integr. Syst.
Thai-Ha Tran, Ba-Anh Dao, Duc-Hung Le, Van-Phuc Hoang, Trong-Thuc Hoang, Cong-Kha Pham
2024 C conf
Unified-pipelined NTT Architecture for Polynomial Multiplication in Lattice-based Cryptosystems.
ISCAS
Trong-Hung Nguyen, Nguyen The Binh, Huynh Phuc Nghi, Cong-Kha Pham, Trong-Thuc Hoang
2023 J jnl
A High-Efficiency Modular Multiplication Digital Signal Processing for Lattice-Based Post-Quantum Cryptography.
Cryptogr.
Trong-Hung Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2023 J jnl
A Survey of Post-Quantum Cryptography: Start of a New Race.
Cryptogr.
Duc-Thuan Dam, Thai-Ha Tran, Van-Phuc Hoang, Cong-Kha Pham, Trong-Thuc Hoang
2023 J jnl
A cross-process Spectre attack via cache on RISC-V processor with trusted execution environment.
Comput. Electr. Eng.
Anh-Tien Le, Trong-Thuc Hoang, Ba-Anh Dao, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2023 J jnl
A flexible and efficient FPGA-based random forest architecture for IoT applications.
Internet Things
Trung Dinh Pham, Cuong Pham-Quoc, Tran Ngoc Thinh, Binh Kieu-Do-Nguyen, Cong-Kha Pham
2023 J jnl
Design of a Low-Power and Low-Area 8-Bit Flash ADC Using a Double-Tail Comparator on 180 nm CMOS Process.
Sensors
Hong-Hai Thai, Cong-Kha Pham, Duc-Hung Le
2023 J jnl
Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA.
Future Internet
Khai-Minh Ma, Duc-Hung Le, Cong-Kha Pham, Trong-Thuc Hoang
2023 — conf
Dynamic Gold Code-Based Chaotic Clock for Cryptographic Designs to Counter Power Analysis Attacks.
ACM Great Lakes Symposium on VLSI
Thai-Ha Tran, Anh-Tien Le, Trong-Thuc Hoang, Van-Phuc Hoang, Cong-Kha Pham
2023 — conf
FPGA-Based Secured and Efficient Lightweight IoT Edge Devices with Customized RISC-V.
RIVF
Nguyen The Binh, Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Cong-Kha Pham, Cuong Pham-Quoc
2023 C conf
In-NVRAM Unified PUF and TRNG Based on Standard CMOS Technology.
ISCAS
Ronaldo Serrano, Marco Sarmiento, Ckristian Duran, Tuan-Kiet Dang, Trong-Thuc Hoang, Cong-Kha Pham
2023 J jnl
Multi-Functional Resource-Constrained Elliptic Curve Cryptographic Processor.
IEEE Access
Binh Kieu-Do-Nguyen, Cuong Pham-Quoc, Ngoc-Thinh Tran, Cong-Kha Pham, Trong-Thuc Hoang
2023 J jnl
On the performance of non-profiled side channel attacks based on deep learning techniques.
IET Inf. Secur.
Ngoc-Tuan Do, Van-Phuc Hoang, Van-Sang Doan, Cong-Kha Pham
2023 — conf
Revealing Secret Key from Low Success Rate Deep Learning-Based Side Channel Attacks.
MCSoC
Van-Phuc Hoang, Ngoc-Tuan Do, Trong-Thuc Hoang, Cong-Kha Pham
2023 J jnl
Transition Factors of Power Consumption Models for CPA Attacks on Cryptographic RISC-V SoC.
IEEE Trans. Computers
Thai-Ha Tran, Ba-Anh Dao, Trong-Thuc Hoang, Van-Phuc Hoang, Cong-Kha Pham
2022 — conf
A 3.65 Gb/s Area-Efficiency ChaCha20 Cryptocore.
ISOCC
Ronaldo Serrano, Marco Sarmiento, Ckristian Duran, Trong-Thuc Hoang, Cong-Kha Pham
2022 C conf
A Combined Blinding-Shuffling Online Template Attacks Countermeasure Based on Randomized Domain Montgomery Multiplication.
ICCE
Bien-Cuong Nguyen, Cong-Kha Pham
2022 — conf
A Novel Ring Oscillator PUF for FPGA Based on Feedforward Ring Oscillators.
ISOCC
Tuan-Kiet Dang, Ronaldo Serrano, Trong-Thuc Hoang, Cong-Kha Pham
2022 J jnl
A Robust and Healthy Against PVT Variations TRNG Based on Frequency Collapse.
IEEE Access
Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Trong-Thuc Hoang, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2022 — conf
A System-on-Chip for IoT Applications with 16-bit Tiny Processor.
ICICDT
Tuan-Kiet Dang, Khai-Duy Nguyen, Quynh Nguyen Quang Nhu, Trong-Thuc Hoang, Cong-Kha Pham
2022 J jnl
A Unified NVRAM and TRNG in Standard CMOS Technology.
IEEE Access
Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Cong-Kha Pham
2022 J jnl
A Unified PUF and Crypto Core Exploiting the Metastability in Latches.
Future Internet
Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Tuan-Kiet Dang, Trong-Thuc Hoang, Cong-Kha Pham
2022 J jnl
ChaCha20-Poly1305 Authenticated Encryption with Additional Data for Transport Layer Security 1.3.
Cryptogr.
Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Cong-Kha Pham, Trong-Thuc Hoang
2022 — conf
High-performance Multi-function HMAC-SHA2 FPGA Implementation.
NEWCAS
Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2022 — conf
High-speed FPGA-based Design and Implementation of Text Search Processor.
ICICDT
Binh Kieu-Do-Nguyen, Tuan-Kiet Dang, Trong-Thuc Hoang, Katsumi Inoue, Toshinori Usugi, Masanori Odaka, Shuichi Kameyama, Cong-Kha Pham
2022 J jnl
Low Complexity Correlation Power Analysis by Combining Power Trace Biasing and Correlation Distribution Techniques.
IEEE Access
Ngoc-Tuan Do, Van-Phuc Hoang, Cong-Kha Pham
2022 J jnl
Low-Cost Area-Efficient FPGA-Based Multi-Functional ECDSA/EdDSA.
Cryptogr.
Binh Kieu-Do-Nguyen, Cuong Pham-Quoc, Ngoc-Thinh Tran, Cong-Kha Pham, Trong-Thuc Hoang
2022 C conf
Spectre attack detection with Neutral Network on RISC-V processor.
ISCAS
Anh-Tien Le, Trong-Thuc Hoang, Ba-Anh Dao, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2022 J jnl
Systems on a Chip With 8 and 32 Bits Processors in 0.18-μm Technology for IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Marco Sarmiento, Khai-Duy Nguyen, Ckristian Duran, Ronaldo Serrano, Trong-Thuc Hoang, Koichiro Ishibashi, Cong-Kha Pham
2022 J jnl
Trusted Execution Environment Hardware by Isolated Heterogeneous Architecture for Key Scheduling.
IEEE Access
Trong-Thuc Hoang, Ckristian Duran, Ronaldo Serrano, Marco Sarmiento, Khai-Duy Nguyen, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 — conf
A CORDIC-based Trigonometric Hardware Accelerator with Custom Instruction in 32-bit RISC-V System-on-Chip.
HCS
Khai-Duy Nguyen, Tuan-Kiet Dang, Trong-Thuc Hoang, Quynh Nguyen Quang Nhu, Cong-Kha Pham
2021 J jnl
A Fully Digital True Random Number Generator With Entropy Source Based in Frequency Collapse.
IEEE Access
Ronaldo Serrano, Ckristian Duran, Trong-Thuc Hoang, Marco Sarmiento, Khai-Duy Nguyen, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 — conf
A Low-Power Low-Area SoC based in RISC-V Processor for IoT Applications.
ISOCC
Ronaldo Serrano, Marco Sarmiento, Ckristian Duran, Khai-Duy Nguyen, Trong-Thuc Hoang, Koichiro Ishibashi, Cong-Kha Pham
2021 J jnl
A Real-Time Cache Side-Channel Attack Detection System on RISC-V Out-of-Order Processor.
IEEE Access
Anh-Tien Le, Trong-Thuc Hoang, Ba-Anh Dao, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 J jnl
A Sub-μ W Reversed-Body-Bias 8-bit Processor on 65-nm Silicon-on-Thin-Box (SOTB) for IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Marco Sarmiento, Khai-Duy Nguyen, Ckristian Duran, Trong-Thuc Hoang, Ronaldo Serrano, Van-Phuc Hoang, Xuan-Tu Tran, Koichiro Ishibashi, Cong-Kha Pham
2021 J jnl
A proposal for enhancing training speed in deep learning models based on memory activity survey.
IEICE Electron. Express
Tuan-Kiet Dang, Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Khai-Duy Nguyen, Xuan-Tu Tran, Cong-Kha Pham
2021 J jnl
A trigonometric hardware acceleration in 32-bit RISC-V microcontroller with custom instruction.
IEICE Electron. Express
Khai-Duy Nguyen, Tuan-Kiet Dang, Trong-Thuc Hoang, Quynh Nguyen Quang Nhu, Xuan-Tu Tran, Cong-Kha Pham
2021 — conf
ChaCha20-Poly1305 Crypto Core Compatible with Transport Layer Security 1.3.
ISOCC
Ronaldo Serrano, Ckristian Duran, Trong-Thuc Hoang, Marco Sarmiento, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 J jnl
Convergence of 5G Technologies, Artificial Intelligence and Cybersecurity of Networked Societies for the Cities of Tomorrow.
Mob. Networks Appl.
Trung Q. Duong, Van-Phuc Hoang, Cong-Kha Pham
2021 J jnl
Correlation Power Analysis Attack Resisted Cryptographic RISC-V SoC With Random Dynamic Frequency Scaling Countermeasure.
IEEE Access
Ba-Anh Dao, Trong-Thuc Hoang, Anh-Tien Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 J jnl
Exploiting the Back-Gate Biasing Technique as a Countermeasure Against Power Analysis Attacks.
IEEE Access
Ba-Anh Dao, Trong-Thuc Hoang, Anh-Tien Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 — conf
System-on-Chip Implementation of Trusted Execution Environment with Heterogeneous Architecture.
HCS
Trong-Thuc Hoang, Ckristian Duran, Ronaldo Serrano, Marco Sarmiento, Khai-Duy Nguyen, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2020 J jnl
A 0.9-V 50-MHz 256-bit 1D-to-2D-based single/multi-match priority encoder with 0.67-nW standby power on 65-nm SOTB CMOS.
Microprocess. Microsystems
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2020 C conf
Cryptographic Accelerators for Trusted Execution Environment in RISC-V Processors.
ISCAS
Trong-Thuc Hoang, Ckristian Duran, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2020 — conf
Hardware-assisted High-performance DNA Alignment System.
ICIIT
Binh Kieu-Do-Nguyen, Cuong Pham-Quoc, Cong-Kha Pham
2020 — conf
Heterogeneous Hardware-assisted Parallel Processing for BWA-MEM DNA Alignment.
RIVF
Binh Kieu-Do-Nguyen, Cuong Pham-Quoc, Cong-Kha Pham
2020 J jnl
Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB).
IEICE Electron. Express
Trong-Thuc Hoang, Ckristian Duran, Khai-Duy Nguyen, Tuan-Kiet Dang, Quynh Nguyen Quang Nhu, Phuc Hong Than, Xuan-Tu Tran, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2020 J jnl
Quick Boot of Trusted Execution Environment With Hardware Accelerators.
IEEE Access
Trong-Thuc Hoang, Ckristian Duran, Duc-Thinh Nguyen-Hoang, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2020 J jnl
Reducing Bitrate and Increasing the Quality of Inter Frame by Avoiding Quantization Errors in Stationary Blocks.
EAI Endorsed Trans. Ind. Networks Intell. Syst.
Xuan-Tu Tran, Ngoc-Sinh Nguyen, Duy-Hieu Bui, Minh-Trien Pham, Hung K. Nguyen, Cong-Kha Pham
2019 — conf
A 0.75-V 32-MHz 181-µW SOTB-65nm Floating-point Twiddle Factor Using Adaptive CORDIC.
ICIT
Ngoc-Tu Bui, Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham
2019 J jnl
A 1.05-V 62-MHz with 0.12-nW standby power SOTB-65 nm chip of 32-point DCT based on adaptive CORDIC.
IEICE Electron. Express
Duc-Hung Le, Trong-Thuc Hoang, Cong-Kha Pham
2019 J jnl
A 1.2-V 162.9 pJ/cycle bitmap index creation core with 0.31-pW/bit standby power on 65-nm SOTB.
Microprocess. Microsystems
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2019 C conf
A 1.2-V 90-MHz Bitmap Index Creation Accelerator with 0.27-nW Standby Power on 65-nm Silicon-On-Thin-Box (SOTB) CMOS.
ISCAS
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Katsumi Inoue, Ngoc-Tu Bui, Van-Phuc Hoang, Cong-Kha Pham
2019 — conf
An Efficient Hardware Implementation of Radix-16 Montgomery Multiplication.
GCCE
Bien-Cuong Nguyen, Cong-Kha Pham
2019 J jnl
An Efficient I/O Architecture for RAM-Based Content-Addressable Memory on FPGA.
IEEE Trans. Circuits Syst. II Express Briefs
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2019 C conf
Live Demonstration: Real-Time Auto-Exposure Histogram Equalization Video-System using Frequent Items Counter.
ISCAS
Takahiro Hosaka, Trong-Thuc Hoang, Van-Phuc Hoang, Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham
2019 J jnl
Low-Power Floating-Point Adaptive-CORDIC-Based FFT Twiddle Factor on 65-nm Silicon-on-Thin-BOX (SOTB) With Back-Gate Bias.
IEEE Trans. Circuits Syst. II Express Briefs
Trong-Thuc Hoang, Xuan-Thuan Nguyen, Duc-Hung Le, Cong-Kha Pham
2018 J jnl
A 1.2-V 162.9-pJ/cycle Bitmap Index Creation Core with 0.31-pW/bit Standby Power on 65-nm SOTB.
CoRR
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2018 C conf
A 219-μW 1D-to-2D-Based Priority Encoder on 65-nm SOTB CMOS.
ISCAS
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2018 J jnl
A CORDIC-based QR decomposition for MIMO signal detector.
IEICE Electron. Express
Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2018 J jnl
A High-Throughput Low-Energy Arithmetic Processor.
IEICE Trans. Electron.
Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham
2018 J jnl
A Low-Power Hybrid Adaptive CORDIC.
IEEE Trans. Circuits Syst. II Express Briefs
Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham
2018 — conf
A two-stage-pipeline CPU of SH-2 architecture implemented on FPGA and SoC for IoT, edge AI and robotic applications.
COOL CHIPS
Kesami Hagiwara, Tomoichi Hayashi, Shumpei Kawasaki, Fumio Arakawa, Oleg Endo, Hayato Nomura, Akira Tsukamoto, Duong Nguyen, Binh Nguyen, Anh Tran, Hoan Hyunh, Ikuo Kudoh, Cong-Kha Pham
2018 J jnl
An Efficient I/O Architecture for RAM-based Content-Addressable Memory on FPGA.
CoRR
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2018 J jnl
An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation.
IEEE Access
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2018 J jnl
An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation.
CoRR
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2018 — conf
An efficient fixed-point arithmetic processor using a hybrid CORDIC algorithm.
ASP-DAC
Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham
2018 J jnl
Frequent items counter based on binary decoders.
IEICE Electron. Express
Katsumi Inoue, Trong-Thuc Hoang, Cong-Kha Pham
2018 C conf
Hardware Implementation of Background Calibration Technique for TIADCs with Signals in Any Nyquist Bands.
ISCAS
Han Le Duc, Van-Phuc Hoang, Duc-Minh Nguyen, Cong-Kha Pham
2018 C conf
High-speed 8/16/32-point DCT Architecture Using Fixed-rotation Adaptive CORDIC.
ISCAS
Trong-Thuc Hoang, Cong-Kha Pham, Duc-Hung Le
2018 J jnl
Minimum adder-delay architecture of 8/16/32-point DCT based on fixed-rotation adaptive CORDIC.
IEICE Electron. Express
Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham
2018 — conf
VLSI Design of Floating-Point Twiddle Factor Using Adaptive CORDIC on Various Iteration Limitations.
MCSoC
Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham
2018 — conf
VLSI Design of Frequent Items Counting Using Binary Decoders Applied to 8-bit per Item Case-study.
PRIME
Katsumi Inoue, Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
2017 J jnl
A Flexible High-Bandwidth Low-Latency Multi-Port Memory Controller.
CoRR
Xuan-Thuan Nguyen, Trong-Tu Bui, Huu-Thuan Huynh, Duc-Hung Le, Cong-Kha Pham
2017 J jnl
A Low-Latency Parallel Pipeline CORDIC.
IEICE Trans. Electron.
Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham
2017 J jnl
A Scalable High-Performance Priority Encoder Using 1D-Array to 2D-Array Conversion.
CoRR
Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
2017 J jnl
A Scalable High-Performance Priority Encoder Using 1D-Array to 2D-Array Conversion.
IEEE Trans. Circuits Syst. II Express Briefs
Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
2017 — conf
A low power AES-GCM authenticated encryption core in 65nm SOTB CMOS process.
MWSCAS
Van-Phuc Hoang, Van-Tinh Nguyen, Anh-Thai Nguyen, Cong-Kha Pham
2017 — conf
FPGA-based frequent items counting using matrix of equality comparators.
MWSCAS
Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, Nhu-Quynh Truong, Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham
2017 C conf
Highly parallel bitmap-based regular expression matching for text analytics.
ISCAS
Xuan-Thuan Nguyen, Hong-Thu Nguyen, Katsumi Inoue, Osamu Shimojo, Cong-Kha Pham
2017 — conf
Reliable and energy-efficient transmission on the Internet-of-Video-Things.
ISCIT
Yuichiro Mori, Xuan-Thuan Nguyen, Cong-Kha Pham
2016 C conf
A compact, ultra-low power AES-CCM IP core for wireless body area networks.
VLSI-SoC
Van-Phuc Hoang, Thi-Thanh-Dung Phan, Van-Lan Dao, Cong-Kha Pham
2016 — conf
A high-throughput and low-power design for bitmap indexing on 65-nm SOTB CMOS process.
ICICDT
Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
2016 C conf
A hybrid adaptive CORDIC in 65nm SOTB CMOS process.
ISCAS
Trong-Thuc Hoang, Duc-Hung Le, Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham
2016 J jnl
An FPGA approach for fast bitmap indexing.
IEICE Electron. Express
Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
2016 J jnl
An FPGA approach for high-performance multi-match priority encoder.
IEICE Electron. Express
Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
2016 C conf
An efficient FPGA-based database processor for fast database analytics.
ISCAS
Xuan-Thuan Nguyen, Hong-Thu Nguyen, Trong-Thuc Hoang, Katsumi Inoue, Osamu Shimojo, Toshio Murayama, Kenji Tominaga, Cong-Kha Pham
2016 — conf
An ultra-low power AES encryption core in 65nm SOTB CMOS process.
ISOCC
Van-Phuc Hoang, Van-Lan Dao, Cong-Kha Pham
2015 J jnl
A Perpetuum Mobile 32bit CPU on 65nm SOTB CMOS Technology with Reverse-Body-Bias Assisted Sleep Mode.
IEICE Trans. Electron.
Koichiro Ishibashi, Nobuyuki Sugii, Shiro Kamohara, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong-Kha Pham
2015 — conf
An efficient multi-port memory controller for multimedia applications.
ASP-DAC
Xuan-Thuan Nguyen, Cong-Kha Pham
2015 — conf
Design of a low-power fixed-point 16-bit digital signal processor using 65nm SOTB process.
ICICDT
Duc-Hung Le, Nobuyuki Sugii, Shiro Kamohara, Xuan-Thuan Nguyen, Koichiro Ishibashi, Cong-Kha Pham
2015 J jnl
Design of co-processor for real-time HMM-based text-to-speech on hardware system applied to Vietnamese.
IEICE Electron. Express
Trong-Thuc Hoang, Hong-Kiet Su, Hieu-Binh Nguyen, Duc-Hung Le, Huu-Thuan Huynh, Trong-Tu Bui, Cong-Kha Pham
2015 J jnl
Low-resource low-latency hybrid adaptive CORDIC with floating-point precision.
IEICE Electron. Express
Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham
2015 C conf
Parallel pipelining configurable multi-port memory controller for multimedia applications.
ISCAS
Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
2015 — conf
SAR: A Self-Adaptive and Reliable protocol for wireless multimedia sensor networks.
ICUFN
Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
2014 J jnl
A CAM-Based Information Detection Hardware System for Fast Image Matching on FPGA.
IEICE Trans. Electron.
Duc-Hung Le, Tran Bao Thuong Cao, Katsumi Inoue, Cong-Kha Pham
2014 — conf
A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14µA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology.
COOL Chips
Koichiro Ishibashi, Nobuyuki Sugii, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong-Kha Pham, Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Yasuo Yamaguchi, Hidekazu Oda, Takumi Hasegawa, Shinobu Okanishi, Hiroshi Yanagita, Shiro Kamohara, Masaru Kadoshima, Keiichi Maekawa, Tomohiro Yamashita, Duc-Hung Le, Takumu Yomogita, Masaru Kudo, Kuniaki Kitamori, Shuya Kondo, Yuuki Manzawa
2014 — conf
A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode.
Hot Chips Symposium
Shiro Kamohara, Nobuyuki Sugii, Koichiro Ishibashi, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong-Kha Pham
2013 — conf
A CAM-based Information Detection Hardware System for fast exact pattern matching.
MWSCAS
Duc-Hung Le, Tran Bao Thuong Cao, Katsumi Inoue, Cong-Kha Pham
2013 — conf
A fast CAM-based Watermarking extraction on FPGA.
ICICDT
Duc-Hung Le, Tran Bao Thuong Cao, Katsumi Inoue, Cong-Kha Pham
2013 C conf
A fast CAM-based image matching system on FPGA.
ISCAS
Duc-Hung Le, Tran Bao Thuong Cao, Katsumi Inoue, Cong-Kha Pham
2013 J jnl
Design a Fast CAM-Based Exact Pattern Matching System on FPGA and 0.18µm CMOS Process.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham
2013 J jnl
Low Complexity Logarithmic and Anti-Logarithmic Converters for Hybrid Number System Processors and DSP Applications.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Van-Phuc Hoang, Cong-Kha Pham
2012 J jnl
An FPGA-Based Information Detection Hardware System Employing Multi-Match Content Addressable Memory.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Duc-Hung Le, Katsumi Inoue, Masahiro Sowa, Cong-Kha Pham
2012 J jnl
An Improved Hybrid LUT-Based Architecture for Low-Error and Efficient Fixed-Width Squarer.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Van-Phuc Hoang, Cong-Kha Pham
2012 J jnl
Efficient LUT-Based Truncated Multiplier and Its Application in RGB to YCbCr Color Space Conversion.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Van-Phuc Hoang, Cong-Kha Pham
2011 J jnl
An Improved Linear Difference Method with High ROM Compression Ratio in Direct Digital Frequency Synthesizer.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Van-Phuc Hoang, Cong-Kha Pham
2010 C conf
A DC-DC Converter using a high speed soft-start control circuit.
ISCAS
Kimio Shibata, Cong-Kha Pham
2010 J jnl
A Low-Power High-PSRR Low-Dropout Regulator With Bulk-Gate Controlled Circuit.
IEEE Trans. Circuits Syst. II Express Briefs
Socheat Heng, Cong-Kha Pham
2010 C conf
A compact adaptive slope compensation circuit for Current-Mode DC-DC converter.
ISCAS
Kimio Shibata, Cong-Kha Pham
2009 J jnl
A Low-Power High Accuracy Over Current Protection Circuit for Low Dropout Regulator.
IEICE Trans. Electron.
Socheat Heng, Cong-Kha Pham
2009 C conf
Low Power LDO with Fast Load Transient Response based on Quick Response Circuit.
ISCAS
Socheat Heng, Weichun Tung, Cong-Kha Pham
2007 — conf
An Edge Extraction Method for Color Image Using Multiple-Valued LoG Filter and Color Space.
ACIS-ICIS
Cong-Kha Pham, Koutaro Yamano
2007 — conf
CMOS Schmitt Trigger Circuit with Controllable Hysteresis Using Logical Threshold Voltage Control Circuit.
ACIS-ICIS
Cong-Kha Pham
2007 — conf
Compensated circuit for Low Dropout Regulator having stable load regulation after consideration of bonding wire resistance.
ECCTD
Socheat Heng, Cong-Kha Pham
2006 B conf
A Proposal to Solve N-Queens Problems Using Maximum Neuron Model with A Modified Hill-Climbing Term.
IJCNN
Wataru Noguchi, Cong-Kha Pham
2006 — conf
A hardware accelerator for solving the n-queen problem.
Computational Intelligence
Cong-Kha Pham, Wataru Noguchi
2006 — conf
Simple Logic Threshold Conversion Circuits.
ICECS
Cong-Kha Pham
2005 B conf
A new N-parallel updating method of the Hopfield-type neural network for N-queens problem.
IJCNN
Thanh-Nhat Le, Cong-Kha Pham
2005 — conf
Tolerance on Geometrical Operation as an Attack to Watermarked JPEG Image.
KES (1)
Cong-Kha Pham, Hiroshi Yamashita
2001 — conf
A novel synapses circuit and its application to a neural-based A/D converter.
ISCAS (3)
Cong-Kha Pham
1995 C conf
Associative Dynamics of Competitive Cellular Neural Network.
ISCAS
Mitsuhisa Kanaya, Masako Takahira, Toshirou Watanabe, Cong-Kha Pham, Mamoru Tanaka
1995 — conf
Pulse coded cellular neural network and it's hardware implementation.
ICNN
Cong-Kha Pham, Tetsuya Kimura, Munemitsu Ikegami, Mamoru Tanaka
1994 C conf
Bifurcation and Chaos in CMOS Inverters Ring Oscillator.
ISCAS
Cong-Kha Pham, Mamoru Tanaka, Katsufusa Shono
1993 C conf
CMOS digital retina chip with multi-bit neurons for image coding.
ISCAS
Cong-Kha Pham, Munemitsu Ikegami, Mamoru Tanaka, Katsufusa Shono